[mirror_ubuntu-zesty-kernel.git] / arch / arm / mach-pxa / devices.c

#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/dma-mapping.h>

#include <asm/arch/gpio.h>
#include <asm/arch/udc.h>
#include <asm/arch/pxafb.h>
#include <asm/arch/mmc.h>
#include <asm/arch/irda.h>
#include <asm/arch/i2c.h>
#include <asm/arch/ohci.h>
#include <asm/arch/pxa27x_keypad.h>

#include "devices.h"

void __init pxa_register_device(struct platform_device *dev, void *data)
{
	int ret;

	dev->dev.platform_data = data;

	ret = platform_device_register(dev);
	if (ret)
		dev_err(&dev->dev, "unable to register device: %d\n", ret);
}

static struct resource pxamci_resources[] = {
	[0] = {
		.start	= 0x41100000,
		.end	= 0x41100fff,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_MMC,
		.end	= IRQ_MMC,
		.flags	= IORESOURCE_IRQ,
	},
	[2] = {
		.start	= 21,
		.end	= 21,
		.flags	= IORESOURCE_DMA,
	},
	[3] = {
		.start	= 22,
		.end	= 22,
		.flags	= IORESOURCE_DMA,
	},
};

static u64 pxamci_dmamask = 0xffffffffUL;

struct platform_device pxa_device_mci = {
	.name		= "pxa2xx-mci",
	.id		= 0,
	.dev		= {
		.dma_mask = &pxamci_dmamask,
		.coherent_dma_mask = 0xffffffff,
	},
	.num_resources	= ARRAY_SIZE(pxamci_resources),
	.resource	= pxamci_resources,
};

void __init pxa_set_mci_info(struct pxamci_platform_data *info)
{
	pxa_register_device(&pxa_device_mci, info);
}


static struct pxa2xx_udc_mach_info pxa_udc_info;

void __init pxa_set_udc_info(struct pxa2xx_udc_mach_info *info)
{
	memcpy(&pxa_udc_info, info, sizeof *info);
}

static struct resource pxa2xx_udc_resources[] = {
	[0] = {
		.start	= 0x40600000,
		.end	= 0x4060ffff,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_USB,
		.end	= IRQ_USB,
		.flags	= IORESOURCE_IRQ,
	},
};

static u64 udc_dma_mask = ~(u32)0;

struct platform_device pxa_device_udc = {
	.name		= "pxa2xx-udc",
	.id		= -1,
	.resource	= pxa2xx_udc_resources,
	.num_resources	= ARRAY_SIZE(pxa2xx_udc_resources),
	.dev		=  {
		.platform_data	= &pxa_udc_info,
		.dma_mask	= &udc_dma_mask,
	}
};

static struct resource pxafb_resources[] = {
	[0] = {
		.start	= 0x44000000,
		.end	= 0x4400ffff,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_LCD,
		.end	= IRQ_LCD,
		.flags	= IORESOURCE_IRQ,
	},
};

static u64 fb_dma_mask = ~(u64)0;

struct platform_device pxa_device_fb = {
	.name		= "pxa2xx-fb",
	.id		= -1,
	.dev		= {
		.dma_mask	= &fb_dma_mask,
		.coherent_dma_mask = 0xffffffff,
	},
	.num_resources	= ARRAY_SIZE(pxafb_resources),
	.resource	= pxafb_resources,
};

void __init set_pxa_fb_info(struct pxafb_mach_info *info)
{
	pxa_register_device(&pxa_device_fb, info);
}

void __init set_pxa_fb_parent(struct device *parent_dev)
{
	pxa_device_fb.dev.parent = parent_dev;
}

static struct resource pxa_resource_ffuart[] = {
	{
		.start	= __PREG(FFUART),
		.end	= __PREG(FFUART) + 35,
		.flags	= IORESOURCE_MEM,
	}, {
		.start	= IRQ_FFUART,
		.end	= IRQ_FFUART,
		.flags	= IORESOURCE_IRQ,
	}
};

struct platform_device pxa_device_ffuart= {
	.name		= "pxa2xx-uart",
	.id		= 0,
	.resource	= pxa_resource_ffuart,
	.num_resources	= ARRAY_SIZE(pxa_resource_ffuart),
};

static struct resource pxa_resource_btuart[] = {
	{
		.start	= __PREG(BTUART),
		.end	= __PREG(BTUART) + 35,
		.flags	= IORESOURCE_MEM,
	}, {
		.start	= IRQ_BTUART,
		.end	= IRQ_BTUART,
		.flags	= IORESOURCE_IRQ,
	}
};

struct platform_device pxa_device_btuart = {
	.name		= "pxa2xx-uart",
	.id		= 1,
	.resource	= pxa_resource_btuart,
	.num_resources	= ARRAY_SIZE(pxa_resource_btuart),
};

static struct resource pxa_resource_stuart[] = {
	{
		.start	= __PREG(STUART),
		.end	= __PREG(STUART) + 35,
		.flags	= IORESOURCE_MEM,
	}, {
		.start	= IRQ_STUART,
		.end	= IRQ_STUART,
		.flags	= IORESOURCE_IRQ,
	}
};

struct platform_device pxa_device_stuart = {
	.name		= "pxa2xx-uart",
	.id		= 2,
	.resource	= pxa_resource_stuart,
	.num_resources	= ARRAY_SIZE(pxa_resource_stuart),
};

static struct resource pxa_resource_hwuart[] = {
	{
		.start	= __PREG(HWUART),
		.end	= __PREG(HWUART) + 47,
		.flags	= IORESOURCE_MEM,
	}, {
		.start	= IRQ_HWUART,
		.end	= IRQ_HWUART,
		.flags	= IORESOURCE_IRQ,
	}
};

struct platform_device pxa_device_hwuart = {
	.name		= "pxa2xx-uart",
	.id		= 3,
	.resource	= pxa_resource_hwuart,
	.num_resources	= ARRAY_SIZE(pxa_resource_hwuart),
};

static struct resource pxai2c_resources[] = {
	{
		.start	= 0x40301680,
		.end	= 0x403016a3,
		.flags	= IORESOURCE_MEM,
	}, {
		.start	= IRQ_I2C,
		.end	= IRQ_I2C,
		.flags	= IORESOURCE_IRQ,
	},
};

struct platform_device pxa_device_i2c = {
	.name		= "pxa2xx-i2c",
	.id		= 0,
	.resource	= pxai2c_resources,
	.num_resources	= ARRAY_SIZE(pxai2c_resources),
};

void __init pxa_set_i2c_info(struct i2c_pxa_platform_data *info)
{
	pxa_register_device(&pxa_device_i2c, info);
}

static struct resource pxai2s_resources[] = {
	{
		.start	= 0x40400000,
		.end	= 0x40400083,
		.flags	= IORESOURCE_MEM,
	}, {
		.start	= IRQ_I2S,
		.end	= IRQ_I2S,
		.flags	= IORESOURCE_IRQ,
	},
};

struct platform_device pxa_device_i2s = {
	.name		= "pxa2xx-i2s",
	.id		= -1,
	.resource	= pxai2s_resources,
	.num_resources	= ARRAY_SIZE(pxai2s_resources),
};

static u64 pxaficp_dmamask = ~(u32)0;

struct platform_device pxa_device_ficp = {
	.name		= "pxa2xx-ir",
	.id		= -1,
	.dev		= {
		.dma_mask = &pxaficp_dmamask,
		.coherent_dma_mask = 0xffffffff,
	},
};

void __init pxa_set_ficp_info(struct pxaficp_platform_data *info)
{
	pxa_register_device(&pxa_device_ficp, info);
}

struct platform_device pxa_device_rtc = {
	.name		= "sa1100-rtc",
	.id		= -1,
};

#ifdef CONFIG_PXA25x

static u64 pxa25x_ssp_dma_mask = DMA_BIT_MASK(32);

static struct resource pxa25x_resource_ssp[] = {
	[0] = {
		.start	= 0x41000000,
		.end	= 0x4100001f,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_SSP,
		.end	= IRQ_SSP,
		.flags	= IORESOURCE_IRQ,
	},
	[2] = {
		/* DRCMR for RX */
		.start	= 13,
		.end	= 13,
		.flags	= IORESOURCE_DMA,
	},
	[3] = {
		/* DRCMR for TX */
		.start	= 14,
		.end	= 14,
		.flags	= IORESOURCE_DMA,
	},
};

struct platform_device pxa25x_device_ssp = {
	.name		= "pxa25x-ssp",
	.id		= 0,
	.dev		= {
		.dma_mask = &pxa25x_ssp_dma_mask,
		.coherent_dma_mask = DMA_BIT_MASK(32),
	},
	.resource	= pxa25x_resource_ssp,
	.num_resources	= ARRAY_SIZE(pxa25x_resource_ssp),
};

static u64 pxa25x_nssp_dma_mask = DMA_BIT_MASK(32);

static struct resource pxa25x_resource_nssp[] = {
	[0] = {
		.start	= 0x41400000,
		.end	= 0x4140002f,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_NSSP,
		.end	= IRQ_NSSP,
		.flags	= IORESOURCE_IRQ,
	},
	[2] = {
		/* DRCMR for RX */
		.start	= 15,
		.end	= 15,
		.flags	= IORESOURCE_DMA,
	},
	[3] = {
		/* DRCMR for TX */
		.start	= 16,
		.end	= 16,
		.flags	= IORESOURCE_DMA,
	},
};

struct platform_device pxa25x_device_nssp = {
	.name		= "pxa25x-nssp",
	.id		= 1,
	.dev		= {
		.dma_mask = &pxa25x_nssp_dma_mask,
		.coherent_dma_mask = DMA_BIT_MASK(32),
	},
	.resource	= pxa25x_resource_nssp,
	.num_resources	= ARRAY_SIZE(pxa25x_resource_nssp),
};

static u64 pxa25x_assp_dma_mask = DMA_BIT_MASK(32);

static struct resource pxa25x_resource_assp[] = {
	[0] = {
		.start	= 0x41500000,
		.end	= 0x4150002f,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_ASSP,
		.end	= IRQ_ASSP,
		.flags	= IORESOURCE_IRQ,
	},
	[2] = {
		/* DRCMR for RX */
		.start	= 23,
		.end	= 23,
		.flags	= IORESOURCE_DMA,
	},
	[3] = {
		/* DRCMR for TX */
		.start	= 24,
		.end	= 24,
		.flags	= IORESOURCE_DMA,
	},
};

struct platform_device pxa25x_device_assp = {
	/* ASSP is basically equivalent to NSSP */
	.name		= "pxa25x-nssp",
	.id		= 2,
	.dev		= {
		.dma_mask = &pxa25x_assp_dma_mask,
		.coherent_dma_mask = DMA_BIT_MASK(32),
	},
	.resource	= pxa25x_resource_assp,
	.num_resources	= ARRAY_SIZE(pxa25x_resource_assp),
};
#endif /* CONFIG_PXA25x */

#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)

static struct resource pxa27x_resource_keypad[] = {
	[0] = {
		.start	= 0x41500000,
		.end	= 0x4150004c,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_KEYPAD,
		.end	= IRQ_KEYPAD,
		.flags	= IORESOURCE_IRQ,
	},
};

struct platform_device pxa27x_device_keypad = {
	.name		= "pxa27x-keypad",
	.id		= -1,
	.resource	= pxa27x_resource_keypad,
	.num_resources	= ARRAY_SIZE(pxa27x_resource_keypad),
};

void __init pxa_set_keypad_info(struct pxa27x_keypad_platform_data *info)
{
	pxa_register_device(&pxa27x_device_keypad, info);
}

static u64 pxa27x_ohci_dma_mask = DMA_BIT_MASK(32);

static struct resource pxa27x_resource_ohci[] = {
	[0] = {
		.start  = 0x4C000000,
		.end    = 0x4C00ff6f,
		.flags  = IORESOURCE_MEM,
	},
	[1] = {
		.start  = IRQ_USBH1,
		.end    = IRQ_USBH1,
		.flags  = IORESOURCE_IRQ,
	},
};

struct platform_device pxa27x_device_ohci = {
	.name		= "pxa27x-ohci",
	.id		= -1,
	.dev		= {
		.dma_mask = &pxa27x_ohci_dma_mask,
		.coherent_dma_mask = DMA_BIT_MASK(32),
	},
	.num_resources  = ARRAY_SIZE(pxa27x_resource_ohci),
	.resource       = pxa27x_resource_ohci,
};

void __init pxa_set_ohci_info(struct pxaohci_platform_data *info)
{
	pxa_register_device(&pxa27x_device_ohci, info);
}

static u64 pxa27x_ssp1_dma_mask = DMA_BIT_MASK(32);

static struct resource pxa27x_resource_ssp1[] = {
	[0] = {
		.start	= 0x41000000,
		.end	= 0x4100003f,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_SSP,
		.end	= IRQ_SSP,
		.flags	= IORESOURCE_IRQ,
	},
	[2] = {
		/* DRCMR for RX */
		.start	= 13,
		.end	= 13,
		.flags	= IORESOURCE_DMA,
	},
	[3] = {
		/* DRCMR for TX */
		.start	= 14,
		.end	= 14,
		.flags	= IORESOURCE_DMA,
	},
};

struct platform_device pxa27x_device_ssp1 = {
	.name		= "pxa27x-ssp",
	.id		= 0,
	.dev		= {
		.dma_mask = &pxa27x_ssp1_dma_mask,
		.coherent_dma_mask = DMA_BIT_MASK(32),
	},
	.resource	= pxa27x_resource_ssp1,
	.num_resources	= ARRAY_SIZE(pxa27x_resource_ssp1),
};

static u64 pxa27x_ssp2_dma_mask = DMA_BIT_MASK(32);

static struct resource pxa27x_resource_ssp2[] = {
	[0] = {
		.start	= 0x41700000,
		.end	= 0x4170003f,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_SSP2,
		.end	= IRQ_SSP2,
		.flags	= IORESOURCE_IRQ,
	},
	[2] = {
		/* DRCMR for RX */
		.start	= 15,
		.end	= 15,
		.flags	= IORESOURCE_DMA,
	},
	[3] = {
		/* DRCMR for TX */
		.start	= 16,
		.end	= 16,
		.flags	= IORESOURCE_DMA,
	},
};

struct platform_device pxa27x_device_ssp2 = {
	.name		= "pxa27x-ssp",
	.id		= 1,
	.dev		= {
		.dma_mask = &pxa27x_ssp2_dma_mask,
		.coherent_dma_mask = DMA_BIT_MASK(32),
	},
	.resource	= pxa27x_resource_ssp2,
	.num_resources	= ARRAY_SIZE(pxa27x_resource_ssp2),
};

static u64 pxa27x_ssp3_dma_mask = DMA_BIT_MASK(32);

static struct resource pxa27x_resource_ssp3[] = {
	[0] = {
		.start	= 0x41900000,
		.end	= 0x4190003f,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_SSP3,
		.end	= IRQ_SSP3,
		.flags	= IORESOURCE_IRQ,
	},
	[2] = {
		/* DRCMR for RX */
		.start	= 66,
		.end	= 66,
		.flags	= IORESOURCE_DMA,
	},
	[3] = {
		/* DRCMR for TX */
		.start	= 67,
		.end	= 67,
		.flags	= IORESOURCE_DMA,
	},
};

struct platform_device pxa27x_device_ssp3 = {
	.name		= "pxa27x-ssp",
	.id		= 2,
	.dev		= {
		.dma_mask = &pxa27x_ssp3_dma_mask,
		.coherent_dma_mask = DMA_BIT_MASK(32),
	},
	.resource	= pxa27x_resource_ssp3,
	.num_resources	= ARRAY_SIZE(pxa27x_resource_ssp3),
};
#endif /* CONFIG_PXA27x || CONFIG_PXA3xx */

#ifdef CONFIG_PXA3xx
static u64 pxa3xx_ssp4_dma_mask = DMA_BIT_MASK(32);

static struct resource pxa3xx_resource_ssp4[] = {
	[0] = {
		.start	= 0x41a00000,
		.end	= 0x41a0003f,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_SSP4,
		.end	= IRQ_SSP4,
		.flags	= IORESOURCE_IRQ,
	},
	[2] = {
		/* DRCMR for RX */
		.start	= 2,
		.end	= 2,
		.flags	= IORESOURCE_DMA,
	},
	[3] = {
		/* DRCMR for TX */
		.start	= 3,
		.end	= 3,
		.flags	= IORESOURCE_DMA,
	},
};

struct platform_device pxa3xx_device_ssp4 = {
	/* PXA3xx SSP is basically equivalent to PXA27x */
	.name		= "pxa27x-ssp",
	.id		= 3,
	.dev		= {
		.dma_mask = &pxa3xx_ssp4_dma_mask,
		.coherent_dma_mask = DMA_BIT_MASK(32),
	},
	.resource	= pxa3xx_resource_ssp4,
	.num_resources	= ARRAY_SIZE(pxa3xx_resource_ssp4),
};

static struct resource pxa3xx_resources_mci2[] = {
	[0] = {
		.start	= 0x42000000,
		.end	= 0x42000fff,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_MMC2,
		.end	= IRQ_MMC2,
		.flags	= IORESOURCE_IRQ,
	},
	[2] = {
		.start	= 93,
		.end	= 93,
		.flags	= IORESOURCE_DMA,
	},
	[3] = {
		.start	= 94,
		.end	= 94,
		.flags	= IORESOURCE_DMA,
	},
};

struct platform_device pxa3xx_device_mci2 = {
	.name		= "pxa2xx-mci",
	.id		= 1,
	.dev		= {
		.dma_mask = &pxamci_dmamask,
		.coherent_dma_mask =	0xffffffff,
	},
	.num_resources	= ARRAY_SIZE(pxa3xx_resources_mci2),
	.resource	= pxa3xx_resources_mci2,
};

void __init pxa3xx_set_mci2_info(struct pxamci_platform_data *info)
{
	pxa_register_device(&pxa3xx_device_mci2, info);
}

static struct resource pxa3xx_resources_mci3[] = {
	[0] = {
		.start	= 0x42500000,
		.end	= 0x42500fff,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_MMC3,
		.end	= IRQ_MMC3,
		.flags	= IORESOURCE_IRQ,
	},
	[2] = {
		.start	= 100,
		.end	= 100,
		.flags	= IORESOURCE_DMA,
	},
	[3] = {
		.start	= 101,
		.end	= 101,
		.flags	= IORESOURCE_DMA,
	},
};

struct platform_device pxa3xx_device_mci3 = {
	.name		= "pxa2xx-mci",
	.id		= 2,
	.dev		= {
		.dma_mask = &pxamci_dmamask,
		.coherent_dma_mask = 0xffffffff,
	},
	.num_resources	= ARRAY_SIZE(pxa3xx_resources_mci3),
	.resource	= pxa3xx_resources_mci3,
};

void __init pxa3xx_set_mci3_info(struct pxamci_platform_data *info)
{
	pxa_register_device(&pxa3xx_device_mci3, info);
}

#endif /* CONFIG_PXA3xx */
Commit	Line	Data
8f58de7c	1	#include <linux/module.h>
	2	#include <linux/kernel.h>
	3	#include <linux/init.h>
	4	#include <linux/platform_device.h>
	5	#include <linux/dma-mapping.h>
	6
	7	#include <asm/arch/gpio.h>
	8	#include <asm/arch/udc.h>
	9	#include <asm/arch/pxafb.h>
	10	#include <asm/arch/mmc.h>
	11	#include <asm/arch/irda.h>
	12	#include <asm/arch/i2c.h>
cd5604d5	13	#include <asm/arch/ohci.h>
37320980	14	#include <asm/arch/pxa27x_keypad.h>
8f58de7c	15
	16	#include "devices.h"
	17
	18	void __init pxa_register_device(struct platform_device dev, void data)
	19	{
	20	int ret;
	21
	22	dev->dev.platform_data = data;
	23
	24	ret = platform_device_register(dev);
	25	if (ret)
	26	dev_err(&dev->dev, "unable to register device: %d\n", ret);
	27	}
	28
	29	static struct resource pxamci_resources[] = {
	30	[0] = {
	31	.start = 0x41100000,
	32	.end = 0x41100fff,
	33	.flags = IORESOURCE_MEM,
	34	},
	35	[1] = {
	36	.start = IRQ_MMC,
	37	.end = IRQ_MMC,
	38	.flags = IORESOURCE_IRQ,
	39	},
	40	[2] = {
	41	.start = 21,
	42	.end = 21,
	43	.flags = IORESOURCE_DMA,
	44	},
	45	[3] = {
	46	.start = 22,
	47	.end = 22,
	48	.flags = IORESOURCE_DMA,
	49	},
	50	};
	51
	52	static u64 pxamci_dmamask = 0xffffffffUL;
	53
	54	struct platform_device pxa_device_mci = {
	55	.name = "pxa2xx-mci",
fafc9d3f	56	.id = 0,
8f58de7c	57	.dev = {
	58	.dma_mask = &pxamci_dmamask,
	59	.coherent_dma_mask = 0xffffffff,
	60	},
	61	.num_resources = ARRAY_SIZE(pxamci_resources),
	62	.resource = pxamci_resources,
	63	};
	64
	65	void __init pxa_set_mci_info(struct pxamci_platform_data *info)
	66	{
	67	pxa_register_device(&pxa_device_mci, info);
	68	}
	69
	70
	71	static struct pxa2xx_udc_mach_info pxa_udc_info;
	72
	73	void __init pxa_set_udc_info(struct pxa2xx_udc_mach_info *info)
	74	{
	75	memcpy(&pxa_udc_info, info, sizeof *info);
	76	}
	77
	78	static struct resource pxa2xx_udc_resources[] = {
	79	[0] = {
	80	.start = 0x40600000,
	81	.end = 0x4060ffff,
	82	.flags = IORESOURCE_MEM,
	83	},
	84	[1] = {
	85	.start = IRQ_USB,
	86	.end = IRQ_USB,
	87	.flags = IORESOURCE_IRQ,
	88	},
	89	};
	90
	91	static u64 udc_dma_mask = ~(u32)0;
	92
	93	struct platform_device pxa_device_udc = {
	94	.name = "pxa2xx-udc",
	95	.id = -1,
	96	.resource = pxa2xx_udc_resources,
	97	.num_resources = ARRAY_SIZE(pxa2xx_udc_resources),
	98	.dev = {
	99	.platform_data = &pxa_udc_info,
	100	.dma_mask = &udc_dma_mask,
	101	}
	102	};
	103
	104	static struct resource pxafb_resources[] = {
	105	[0] = {
	106	.start = 0x44000000,
	107	.end = 0x4400ffff,
	108	.flags = IORESOURCE_MEM,
	109	},
	110	[1] = {
	111	.start = IRQ_LCD,
	112	.end = IRQ_LCD,
	113	.flags = IORESOURCE_IRQ,
	114	},
	115	};
	116
	117	static u64 fb_dma_mask = ~(u64)0;
	118
	119	struct platform_device pxa_device_fb = {
	120	.name = "pxa2xx-fb",
121	.id = -1,
122	.dev = {
123	.dma_mask = &fb_dma_mask,
124	.coherent_dma_mask = 0xffffffff,
125	},
126	.num_resources = ARRAY_SIZE(pxafb_resources),
127	.resource = pxafb_resources,
128	};
129
130	void __init set_pxa_fb_info(struct pxafb_mach_info *info)
131	{
132	pxa_register_device(&pxa_device_fb, info);
133	}
134
135	void __init set_pxa_fb_parent(struct device *parent_dev)
136	{
137	pxa_device_fb.dev.parent = parent_dev;
138	}
139
140	static struct resource pxa_resource_ffuart[] = {
141	{
142	.start = __PREG(FFUART),
143	.end = __PREG(FFUART) + 35,
144	.flags = IORESOURCE_MEM,
145	}, {
146	.start = IRQ_FFUART,
147	.end = IRQ_FFUART,
148	.flags = IORESOURCE_IRQ,
149	}
150	};
151
152	struct platform_device pxa_device_ffuart= {
153	.name = "pxa2xx-uart",
154	.id = 0,
155	.resource = pxa_resource_ffuart,
156	.num_resources = ARRAY_SIZE(pxa_resource_ffuart),
157	};
158
159	static struct resource pxa_resource_btuart[] = {
160	{
161	.start = __PREG(BTUART),
162	.end = __PREG(BTUART) + 35,
163	.flags = IORESOURCE_MEM,
164	}, {
165	.start = IRQ_BTUART,
166	.end = IRQ_BTUART,
167	.flags = IORESOURCE_IRQ,
168	}
169	};
170
171	struct platform_device pxa_device_btuart = {
172	.name = "pxa2xx-uart",
173	.id = 1,
174	.resource = pxa_resource_btuart,
175	.num_resources = ARRAY_SIZE(pxa_resource_btuart),
176	};
177
178	static struct resource pxa_resource_stuart[] = {
179	{
180	.start = __PREG(STUART),
181	.end = __PREG(STUART) + 35,
182	.flags = IORESOURCE_MEM,
183	}, {
184	.start = IRQ_STUART,
185	.end = IRQ_STUART,
186	.flags = IORESOURCE_IRQ,
187	}
188	};
189
190	struct platform_device pxa_device_stuart = {
191	.name = "pxa2xx-uart",
192	.id = 2,
193	.resource = pxa_resource_stuart,
194	.num_resources = ARRAY_SIZE(pxa_resource_stuart),
195	};
196
197	static struct resource pxa_resource_hwuart[] = {
198	{
199	.start = __PREG(HWUART),
200	.end = __PREG(HWUART) + 47,
201	.flags = IORESOURCE_MEM,
202	}, {
203	.start = IRQ_HWUART,
204	.end = IRQ_HWUART,
205	.flags = IORESOURCE_IRQ,
206	}
207	};
208
209	struct platform_device pxa_device_hwuart = {
210	.name = "pxa2xx-uart",
211	.id = 3,
212	.resource = pxa_resource_hwuart,
213	.num_resources = ARRAY_SIZE(pxa_resource_hwuart),
214	};
215
216	static struct resource pxai2c_resources[] = {
217	{
218	.start = 0x40301680,
219	.end = 0x403016a3,
220	.flags = IORESOURCE_MEM,
221	}, {
222	.start = IRQ_I2C,
223	.end = IRQ_I2C,
224	.flags = IORESOURCE_IRQ,
225	},
226	};
227
228	struct platform_device pxa_device_i2c = {
229	.name = "pxa2xx-i2c",
230	.id = 0,
231	.resource = pxai2c_resources,
232	.num_resources = ARRAY_SIZE(pxai2c_resources),
233	};
234
235	void __init pxa_set_i2c_info(struct i2c_pxa_platform_data *info)
236	{
237	pxa_register_device(&pxa_device_i2c, info);
238	}
239
240	static struct resource pxai2s_resources[] = {
241	{
242	.start = 0x40400000,
243	.end = 0x40400083,
244	.flags = IORESOURCE_MEM,
245	}, {
246	.start = IRQ_I2S,
247	.end = IRQ_I2S,
248	.flags = IORESOURCE_IRQ,
249	},
250	};
251
252	struct platform_device pxa_device_i2s = {
253	.name = "pxa2xx-i2s",
254	.id = -1,
255	.resource = pxai2s_resources,
256	.num_resources = ARRAY_SIZE(pxai2s_resources),
257	};
258
259	static u64 pxaficp_dmamask = ~(u32)0;
260
261	struct platform_device pxa_device_ficp = {
262	.name = "pxa2xx-ir",
263	.id = -1,
264	.dev = {
265	.dma_mask = &pxaficp_dmamask,
266	.coherent_dma_mask = 0xffffffff,
267	},
268	};
269
270	void __init pxa_set_ficp_info(struct pxaficp_platform_data *info)
271	{
272	pxa_register_device(&pxa_device_ficp, info);
273	}
274
275	struct platform_device pxa_device_rtc = {
276	.name = "sa1100-rtc",
277	.id = -1,
278	};
279
280	#ifdef CONFIG_PXA25x
281
282	static u64 pxa25x_ssp_dma_mask = DMA_BIT_MASK(32);
283
284	static struct resource pxa25x_resource_ssp[] = {
285	[0] = {
286	.start = 0x41000000,
287	.end = 0x4100001f,
288	.flags = IORESOURCE_MEM,
289	},
290	[1] = {
291	.start = IRQ_SSP,
292	.end = IRQ_SSP,
293	.flags = IORESOURCE_IRQ,
294	},
295	[2] = {
296	/* DRCMR for RX */
297	.start = 13,
298	.end = 13,
299	.flags = IORESOURCE_DMA,
300	},
301	[3] = {
302	/* DRCMR for TX */
303	.start = 14,
304	.end = 14,
305	.flags = IORESOURCE_DMA,
306	},
307	};
308
309	struct platform_device pxa25x_device_ssp = {
310	.name = "pxa25x-ssp",
311	.id = 0,
312	.dev = {
313	.dma_mask = &pxa25x_ssp_dma_mask,
314	.coherent_dma_mask = DMA_BIT_MASK(32),
315	},
316	.resource = pxa25x_resource_ssp,
317	.num_resources = ARRAY_SIZE(pxa25x_resource_ssp),
318	};
319
320	static u64 pxa25x_nssp_dma_mask = DMA_BIT_MASK(32);
321
322	static struct resource pxa25x_resource_nssp[] = {
323	[0] = {
324	.start = 0x41400000,
325	.end = 0x4140002f,
326	.flags = IORESOURCE_MEM,
327	},
328	[1] = {
329	.start = IRQ_NSSP,
330	.end = IRQ_NSSP,
331	.flags = IORESOURCE_IRQ,
332	},
333	[2] = {
334	/* DRCMR for RX */
335	.start = 15,
336	.end = 15,
337	.flags = IORESOURCE_DMA,
338	},
339	[3] = {
340	/* DRCMR for TX */
341	.start = 16,
342	.end = 16,
343	.flags = IORESOURCE_DMA,
344	},
345	};
346
347	struct platform_device pxa25x_device_nssp = {
348	.name = "pxa25x-nssp",
349	.id = 1,
350	.dev = {
351	.dma_mask = &pxa25x_nssp_dma_mask,
352	.coherent_dma_mask = DMA_BIT_MASK(32),
353	},
354	.resource = pxa25x_resource_nssp,
355	.num_resources = ARRAY_SIZE(pxa25x_resource_nssp),
356	};
357
358	static u64 pxa25x_assp_dma_mask = DMA_BIT_MASK(32);
359
360	static struct resource pxa25x_resource_assp[] = {
361	[0] = {
362	.start = 0x41500000,
363	.end = 0x4150002f,
364	.flags = IORESOURCE_MEM,
365	},
366	[1] = {
367	.start = IRQ_ASSP,
368	.end = IRQ_ASSP,
369	.flags = IORESOURCE_IRQ,
370	},
371	[2] = {
372	/* DRCMR for RX */
373	.start = 23,
374	.end = 23,
375	.flags = IORESOURCE_DMA,
376	},
377	[3] = {
378	/* DRCMR for TX */
379	.start = 24,
380	.end = 24,
381	.flags = IORESOURCE_DMA,
382	},
383	};
384
385	struct platform_device pxa25x_device_assp = {
386	/* ASSP is basically equivalent to NSSP */
387	.name = "pxa25x-nssp",
388	.id = 2,
389	.dev = {
390	.dma_mask = &pxa25x_assp_dma_mask,
391	.coherent_dma_mask = DMA_BIT_MASK(32),
392	},
393	.resource = pxa25x_resource_assp,
394	.num_resources = ARRAY_SIZE(pxa25x_resource_assp),
395	};
396	#endif /* CONFIG_PXA25x */
397
398	#if defined(CONFIG_PXA27x) \|\| defined(CONFIG_PXA3xx)
399
37320980	400	static struct resource pxa27x_resource_keypad[] = {
	401	[0] = {
	402	.start = 0x41500000,
	403	.end = 0x4150004c,
	404	.flags = IORESOURCE_MEM,
	405	},
	406	[1] = {
	407	.start = IRQ_KEYPAD,
	408	.end = IRQ_KEYPAD,
	409	.flags = IORESOURCE_IRQ,
	410	},
	411	};
	412
	413	struct platform_device pxa27x_device_keypad = {
	414	.name = "pxa27x-keypad",
	415	.id = -1,
	416	.resource = pxa27x_resource_keypad,
	417	.num_resources = ARRAY_SIZE(pxa27x_resource_keypad),
	418	};
	419
	420	void __init pxa_set_keypad_info(struct pxa27x_keypad_platform_data *info)
	421	{
	422	pxa_register_device(&pxa27x_device_keypad, info);
	423	}
	424
ec68e45b	425	static u64 pxa27x_ohci_dma_mask = DMA_BIT_MASK(32);
	426
	427	static struct resource pxa27x_resource_ohci[] = {
	428	[0] = {
	429	.start = 0x4C000000,
	430	.end = 0x4C00ff6f,
	431	.flags = IORESOURCE_MEM,
	432	},
	433	[1] = {
	434	.start = IRQ_USBH1,
	435	.end = IRQ_USBH1,
	436	.flags = IORESOURCE_IRQ,
	437	},
	438	};
	439
	440	struct platform_device pxa27x_device_ohci = {
	441	.name = "pxa27x-ohci",
	442	.id = -1,
	443	.dev = {
	444	.dma_mask = &pxa27x_ohci_dma_mask,
	445	.coherent_dma_mask = DMA_BIT_MASK(32),
	446	},
	447	.num_resources = ARRAY_SIZE(pxa27x_resource_ohci),
	448	.resource = pxa27x_resource_ohci,
	449	};
	450
	451	void __init pxa_set_ohci_info(struct pxaohci_platform_data *info)
	452	{
	453	pxa_register_device(&pxa27x_device_ohci, info);
	454	}
	455
8f58de7c	456	static u64 pxa27x_ssp1_dma_mask = DMA_BIT_MASK(32);
	457
	458	static struct resource pxa27x_resource_ssp1[] = {
	459	[0] = {
	460	.start = 0x41000000,
	461	.end = 0x4100003f,
	462	.flags = IORESOURCE_MEM,
	463	},
	464	[1] = {
	465	.start = IRQ_SSP,
	466	.end = IRQ_SSP,
	467	.flags = IORESOURCE_IRQ,
	468	},
	469	[2] = {
	470	/* DRCMR for RX */
	471	.start = 13,
	472	.end = 13,
	473	.flags = IORESOURCE_DMA,
	474	},
	475	[3] = {
	476	/* DRCMR for TX */
	477	.start = 14,
	478	.end = 14,
	479	.flags = IORESOURCE_DMA,
	480	},
	481	};
	482
	483	struct platform_device pxa27x_device_ssp1 = {
	484	.name = "pxa27x-ssp",
	485	.id = 0,
	486	.dev = {
	487	.dma_mask = &pxa27x_ssp1_dma_mask,
	488	.coherent_dma_mask = DMA_BIT_MASK(32),
	489	},
	490	.resource = pxa27x_resource_ssp1,
	491	.num_resources = ARRAY_SIZE(pxa27x_resource_ssp1),
	492	};
	493
	494	static u64 pxa27x_ssp2_dma_mask = DMA_BIT_MASK(32);
	495
	496	static struct resource pxa27x_resource_ssp2[] = {
	497	[0] = {
	498	.start = 0x41700000,
	499	.end = 0x4170003f,
	500	.flags = IORESOURCE_MEM,
	501	},
	502	[1] = {
	503	.start = IRQ_SSP2,
	504	.end = IRQ_SSP2,
	505	.flags = IORESOURCE_IRQ,
	506	},
	507	[2] = {
	508	/* DRCMR for RX */
	509	.start = 15,
	510	.end = 15,
	511	.flags = IORESOURCE_DMA,
	512	},
	513	[3] = {
	514	/* DRCMR for TX */
	515	.start = 16,
	516	.end = 16,
	517	.flags = IORESOURCE_DMA,
	518	},
	519	};
520
521	struct platform_device pxa27x_device_ssp2 = {
522	.name = "pxa27x-ssp",
523	.id = 1,
524	.dev = {
525	.dma_mask = &pxa27x_ssp2_dma_mask,
526	.coherent_dma_mask = DMA_BIT_MASK(32),
527	},
528	.resource = pxa27x_resource_ssp2,
529	.num_resources = ARRAY_SIZE(pxa27x_resource_ssp2),
530	};
531
532	static u64 pxa27x_ssp3_dma_mask = DMA_BIT_MASK(32);
533
534	static struct resource pxa27x_resource_ssp3[] = {
535	[0] = {
536	.start = 0x41900000,
537	.end = 0x4190003f,
538	.flags = IORESOURCE_MEM,
539	},
540	[1] = {
541	.start = IRQ_SSP3,
542	.end = IRQ_SSP3,
543	.flags = IORESOURCE_IRQ,
544	},
545	[2] = {
546	/* DRCMR for RX */
547	.start = 66,
548	.end = 66,
549	.flags = IORESOURCE_DMA,
550	},
551	[3] = {
552	/* DRCMR for TX */
553	.start = 67,
554	.end = 67,
555	.flags = IORESOURCE_DMA,
556	},
557	};
558
559	struct platform_device pxa27x_device_ssp3 = {
560	.name = "pxa27x-ssp",
561	.id = 2,
562	.dev = {
563	.dma_mask = &pxa27x_ssp3_dma_mask,
564	.coherent_dma_mask = DMA_BIT_MASK(32),
565	},
566	.resource = pxa27x_resource_ssp3,
567	.num_resources = ARRAY_SIZE(pxa27x_resource_ssp3),
568	};
569	#endif /* CONFIG_PXA27x \|\| CONFIG_PXA3xx */
570
571	#ifdef CONFIG_PXA3xx
572	static u64 pxa3xx_ssp4_dma_mask = DMA_BIT_MASK(32);
573
574	static struct resource pxa3xx_resource_ssp4[] = {
575	[0] = {
576	.start = 0x41a00000,
577	.end = 0x41a0003f,
578	.flags = IORESOURCE_MEM,
579	},
580	[1] = {
581	.start = IRQ_SSP4,
582	.end = IRQ_SSP4,
583	.flags = IORESOURCE_IRQ,
584	},
585	[2] = {
586	/* DRCMR for RX */
587	.start = 2,
588	.end = 2,
589	.flags = IORESOURCE_DMA,
590	},
591	[3] = {
592	/* DRCMR for TX */
593	.start = 3,
594	.end = 3,
595	.flags = IORESOURCE_DMA,
596	},
597	};
598
599	struct platform_device pxa3xx_device_ssp4 = {
600	/* PXA3xx SSP is basically equivalent to PXA27x */
601	.name = "pxa27x-ssp",
602	.id = 3,
603	.dev = {
604	.dma_mask = &pxa3xx_ssp4_dma_mask,
605	.coherent_dma_mask = DMA_BIT_MASK(32),
606	},
607	.resource = pxa3xx_resource_ssp4,
608	.num_resources = ARRAY_SIZE(pxa3xx_resource_ssp4),
609	};
8d33b055 BW	610
	611	static struct resource pxa3xx_resources_mci2[] = {
	612	[0] = {
	613	.start = 0x42000000,
	614	.end = 0x42000fff,
	615	.flags = IORESOURCE_MEM,
	616	},
	617	[1] = {
	618	.start = IRQ_MMC2,
	619	.end = IRQ_MMC2,
	620	.flags = IORESOURCE_IRQ,
	621	},
	622	[2] = {
	623	.start = 93,
	624	.end = 93,
	625	.flags = IORESOURCE_DMA,
	626	},
	627	[3] = {
	628	.start = 94,
	629	.end = 94,
	630	.flags = IORESOURCE_DMA,
	631	},
	632	};
	633
	634	struct platform_device pxa3xx_device_mci2 = {
	635	.name = "pxa2xx-mci",
	636	.id = 1,
	637	.dev = {
	638	.dma_mask = &pxamci_dmamask,
	639	.coherent_dma_mask = 0xffffffff,
	640	},
	641	.num_resources = ARRAY_SIZE(pxa3xx_resources_mci2),
	642	.resource = pxa3xx_resources_mci2,
	643	};
	644
	645	void __init pxa3xx_set_mci2_info(struct pxamci_platform_data *info)
	646	{
	647	pxa_register_device(&pxa3xx_device_mci2, info);
	648	}
	649
5a1f21b1 BW	650	static struct resource pxa3xx_resources_mci3[] = {
	651	[0] = {
	652	.start = 0x42500000,
	653	.end = 0x42500fff,
	654	.flags = IORESOURCE_MEM,
	655	},
	656	[1] = {
	657	.start = IRQ_MMC3,
	658	.end = IRQ_MMC3,
	659	.flags = IORESOURCE_IRQ,
	660	},
	661	[2] = {
	662	.start = 100,
	663	.end = 100,
	664	.flags = IORESOURCE_DMA,
	665	},
	666	[3] = {
	667	.start = 101,
	668	.end = 101,
	669	.flags = IORESOURCE_DMA,
	670	},
	671	};
	672
	673	struct platform_device pxa3xx_device_mci3 = {
	674	.name = "pxa2xx-mci",
	675	.id = 2,
	676	.dev = {
	677	.dma_mask = &pxamci_dmamask,
	678	.coherent_dma_mask = 0xffffffff,
	679	},
	680	.num_resources = ARRAY_SIZE(pxa3xx_resources_mci3),
	681	.resource = pxa3xx_resources_mci3,
	682	};
	683
	684	void __init pxa3xx_set_mci3_info(struct pxamci_platform_data *info)
	685	{
	686	pxa_register_device(&pxa3xx_device_mci3, info);
	687	}
	688
8f58de7c	689	#endif /* CONFIG_PXA3xx */