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8f58de7c | 1 | #include <linux/module.h> |
2 | #include <linux/kernel.h> | |
3 | #include <linux/init.h> | |
4 | #include <linux/platform_device.h> | |
5 | #include <linux/dma-mapping.h> | |
6 | ||
7 | #include <asm/arch/gpio.h> | |
8 | #include <asm/arch/udc.h> | |
9 | #include <asm/arch/pxafb.h> | |
10 | #include <asm/arch/mmc.h> | |
11 | #include <asm/arch/irda.h> | |
12 | #include <asm/arch/i2c.h> | |
bc3a5959 | 13 | #include <asm/arch/mfp-pxa27x.h> |
cd5604d5 | 14 | #include <asm/arch/ohci.h> |
37320980 | 15 | #include <asm/arch/pxa27x_keypad.h> |
3f3acefb | 16 | #include <asm/arch/camera.h> |
8f58de7c | 17 | |
18 | #include "devices.h" | |
bc3a5959 | 19 | #include "generic.h" |
8f58de7c | 20 | |
21 | void __init pxa_register_device(struct platform_device *dev, void *data) | |
22 | { | |
23 | int ret; | |
24 | ||
25 | dev->dev.platform_data = data; | |
26 | ||
27 | ret = platform_device_register(dev); | |
28 | if (ret) | |
29 | dev_err(&dev->dev, "unable to register device: %d\n", ret); | |
30 | } | |
31 | ||
32 | static struct resource pxamci_resources[] = { | |
33 | [0] = { | |
34 | .start = 0x41100000, | |
35 | .end = 0x41100fff, | |
36 | .flags = IORESOURCE_MEM, | |
37 | }, | |
38 | [1] = { | |
39 | .start = IRQ_MMC, | |
40 | .end = IRQ_MMC, | |
41 | .flags = IORESOURCE_IRQ, | |
42 | }, | |
43 | [2] = { | |
44 | .start = 21, | |
45 | .end = 21, | |
46 | .flags = IORESOURCE_DMA, | |
47 | }, | |
48 | [3] = { | |
49 | .start = 22, | |
50 | .end = 22, | |
51 | .flags = IORESOURCE_DMA, | |
52 | }, | |
53 | }; | |
54 | ||
55 | static u64 pxamci_dmamask = 0xffffffffUL; | |
56 | ||
57 | struct platform_device pxa_device_mci = { | |
58 | .name = "pxa2xx-mci", | |
fafc9d3f | 59 | .id = 0, |
8f58de7c | 60 | .dev = { |
61 | .dma_mask = &pxamci_dmamask, | |
62 | .coherent_dma_mask = 0xffffffff, | |
63 | }, | |
64 | .num_resources = ARRAY_SIZE(pxamci_resources), | |
65 | .resource = pxamci_resources, | |
66 | }; | |
67 | ||
68 | void __init pxa_set_mci_info(struct pxamci_platform_data *info) | |
69 | { | |
70 | pxa_register_device(&pxa_device_mci, info); | |
71 | } | |
72 | ||
73 | ||
74 | static struct pxa2xx_udc_mach_info pxa_udc_info; | |
75 | ||
76 | void __init pxa_set_udc_info(struct pxa2xx_udc_mach_info *info) | |
77 | { | |
78 | memcpy(&pxa_udc_info, info, sizeof *info); | |
79 | } | |
80 | ||
81 | static struct resource pxa2xx_udc_resources[] = { | |
82 | [0] = { | |
83 | .start = 0x40600000, | |
84 | .end = 0x4060ffff, | |
85 | .flags = IORESOURCE_MEM, | |
86 | }, | |
87 | [1] = { | |
88 | .start = IRQ_USB, | |
89 | .end = IRQ_USB, | |
90 | .flags = IORESOURCE_IRQ, | |
91 | }, | |
92 | }; | |
93 | ||
94 | static u64 udc_dma_mask = ~(u32)0; | |
95 | ||
96 | struct platform_device pxa_device_udc = { | |
97 | .name = "pxa2xx-udc", | |
98 | .id = -1, | |
99 | .resource = pxa2xx_udc_resources, | |
100 | .num_resources = ARRAY_SIZE(pxa2xx_udc_resources), | |
101 | .dev = { | |
102 | .platform_data = &pxa_udc_info, | |
103 | .dma_mask = &udc_dma_mask, | |
104 | } | |
105 | }; | |
106 | ||
107 | static struct resource pxafb_resources[] = { | |
108 | [0] = { | |
109 | .start = 0x44000000, | |
110 | .end = 0x4400ffff, | |
111 | .flags = IORESOURCE_MEM, | |
112 | }, | |
113 | [1] = { | |
114 | .start = IRQ_LCD, | |
115 | .end = IRQ_LCD, | |
116 | .flags = IORESOURCE_IRQ, | |
117 | }, | |
118 | }; | |
119 | ||
120 | static u64 fb_dma_mask = ~(u64)0; | |
121 | ||
122 | struct platform_device pxa_device_fb = { | |
123 | .name = "pxa2xx-fb", | |
124 | .id = -1, | |
125 | .dev = { | |
126 | .dma_mask = &fb_dma_mask, | |
127 | .coherent_dma_mask = 0xffffffff, | |
128 | }, | |
129 | .num_resources = ARRAY_SIZE(pxafb_resources), | |
130 | .resource = pxafb_resources, | |
131 | }; | |
132 | ||
133 | void __init set_pxa_fb_info(struct pxafb_mach_info *info) | |
134 | { | |
135 | pxa_register_device(&pxa_device_fb, info); | |
136 | } | |
137 | ||
138 | void __init set_pxa_fb_parent(struct device *parent_dev) | |
139 | { | |
140 | pxa_device_fb.dev.parent = parent_dev; | |
141 | } | |
142 | ||
143 | static struct resource pxa_resource_ffuart[] = { | |
144 | { | |
145 | .start = __PREG(FFUART), | |
146 | .end = __PREG(FFUART) + 35, | |
147 | .flags = IORESOURCE_MEM, | |
148 | }, { | |
149 | .start = IRQ_FFUART, | |
150 | .end = IRQ_FFUART, | |
151 | .flags = IORESOURCE_IRQ, | |
152 | } | |
153 | }; | |
154 | ||
155 | struct platform_device pxa_device_ffuart= { | |
156 | .name = "pxa2xx-uart", | |
157 | .id = 0, | |
158 | .resource = pxa_resource_ffuart, | |
159 | .num_resources = ARRAY_SIZE(pxa_resource_ffuart), | |
160 | }; | |
161 | ||
162 | static struct resource pxa_resource_btuart[] = { | |
163 | { | |
164 | .start = __PREG(BTUART), | |
165 | .end = __PREG(BTUART) + 35, | |
166 | .flags = IORESOURCE_MEM, | |
167 | }, { | |
168 | .start = IRQ_BTUART, | |
169 | .end = IRQ_BTUART, | |
170 | .flags = IORESOURCE_IRQ, | |
171 | } | |
172 | }; | |
173 | ||
174 | struct platform_device pxa_device_btuart = { | |
175 | .name = "pxa2xx-uart", | |
176 | .id = 1, | |
177 | .resource = pxa_resource_btuart, | |
178 | .num_resources = ARRAY_SIZE(pxa_resource_btuart), | |
179 | }; | |
180 | ||
181 | static struct resource pxa_resource_stuart[] = { | |
182 | { | |
183 | .start = __PREG(STUART), | |
184 | .end = __PREG(STUART) + 35, | |
185 | .flags = IORESOURCE_MEM, | |
186 | }, { | |
187 | .start = IRQ_STUART, | |
188 | .end = IRQ_STUART, | |
189 | .flags = IORESOURCE_IRQ, | |
190 | } | |
191 | }; | |
192 | ||
193 | struct platform_device pxa_device_stuart = { | |
194 | .name = "pxa2xx-uart", | |
195 | .id = 2, | |
196 | .resource = pxa_resource_stuart, | |
197 | .num_resources = ARRAY_SIZE(pxa_resource_stuart), | |
198 | }; | |
199 | ||
200 | static struct resource pxa_resource_hwuart[] = { | |
201 | { | |
202 | .start = __PREG(HWUART), | |
203 | .end = __PREG(HWUART) + 47, | |
204 | .flags = IORESOURCE_MEM, | |
205 | }, { | |
206 | .start = IRQ_HWUART, | |
207 | .end = IRQ_HWUART, | |
208 | .flags = IORESOURCE_IRQ, | |
209 | } | |
210 | }; | |
211 | ||
212 | struct platform_device pxa_device_hwuart = { | |
213 | .name = "pxa2xx-uart", | |
214 | .id = 3, | |
215 | .resource = pxa_resource_hwuart, | |
216 | .num_resources = ARRAY_SIZE(pxa_resource_hwuart), | |
217 | }; | |
218 | ||
219 | static struct resource pxai2c_resources[] = { | |
220 | { | |
221 | .start = 0x40301680, | |
222 | .end = 0x403016a3, | |
223 | .flags = IORESOURCE_MEM, | |
224 | }, { | |
225 | .start = IRQ_I2C, | |
226 | .end = IRQ_I2C, | |
227 | .flags = IORESOURCE_IRQ, | |
228 | }, | |
229 | }; | |
230 | ||
231 | struct platform_device pxa_device_i2c = { | |
232 | .name = "pxa2xx-i2c", | |
233 | .id = 0, | |
234 | .resource = pxai2c_resources, | |
235 | .num_resources = ARRAY_SIZE(pxai2c_resources), | |
236 | }; | |
237 | ||
bc3a5959 PZ |
238 | static unsigned long pxa27x_i2c_mfp_cfg[] = { |
239 | GPIO117_I2C_SCL, | |
240 | GPIO118_I2C_SDA, | |
241 | }; | |
242 | ||
8f58de7c | 243 | void __init pxa_set_i2c_info(struct i2c_pxa_platform_data *info) |
244 | { | |
bc3a5959 PZ |
245 | if (cpu_is_pxa27x()) |
246 | pxa2xx_mfp_config(ARRAY_AND_SIZE(pxa27x_i2c_mfp_cfg)); | |
8f58de7c | 247 | pxa_register_device(&pxa_device_i2c, info); |
248 | } | |
249 | ||
250 | static struct resource pxai2s_resources[] = { | |
251 | { | |
252 | .start = 0x40400000, | |
253 | .end = 0x40400083, | |
254 | .flags = IORESOURCE_MEM, | |
255 | }, { | |
256 | .start = IRQ_I2S, | |
257 | .end = IRQ_I2S, | |
258 | .flags = IORESOURCE_IRQ, | |
259 | }, | |
260 | }; | |
261 | ||
262 | struct platform_device pxa_device_i2s = { | |
263 | .name = "pxa2xx-i2s", | |
264 | .id = -1, | |
265 | .resource = pxai2s_resources, | |
266 | .num_resources = ARRAY_SIZE(pxai2s_resources), | |
267 | }; | |
268 | ||
269 | static u64 pxaficp_dmamask = ~(u32)0; | |
270 | ||
271 | struct platform_device pxa_device_ficp = { | |
272 | .name = "pxa2xx-ir", | |
273 | .id = -1, | |
274 | .dev = { | |
275 | .dma_mask = &pxaficp_dmamask, | |
276 | .coherent_dma_mask = 0xffffffff, | |
277 | }, | |
278 | }; | |
279 | ||
280 | void __init pxa_set_ficp_info(struct pxaficp_platform_data *info) | |
281 | { | |
282 | pxa_register_device(&pxa_device_ficp, info); | |
283 | } | |
284 | ||
285 | struct platform_device pxa_device_rtc = { | |
286 | .name = "sa1100-rtc", | |
287 | .id = -1, | |
288 | }; | |
289 | ||
290 | #ifdef CONFIG_PXA25x | |
291 | ||
75540c1a | 292 | static struct resource pxa25x_resource_pwm0[] = { |
293 | [0] = { | |
294 | .start = 0x40b00000, | |
295 | .end = 0x40b0000f, | |
296 | .flags = IORESOURCE_MEM, | |
297 | }, | |
298 | }; | |
299 | ||
300 | struct platform_device pxa25x_device_pwm0 = { | |
301 | .name = "pxa25x-pwm", | |
302 | .id = 0, | |
303 | .resource = pxa25x_resource_pwm0, | |
304 | .num_resources = ARRAY_SIZE(pxa25x_resource_pwm0), | |
305 | }; | |
306 | ||
307 | static struct resource pxa25x_resource_pwm1[] = { | |
308 | [0] = { | |
309 | .start = 0x40c00000, | |
310 | .end = 0x40c0000f, | |
311 | .flags = IORESOURCE_MEM, | |
312 | }, | |
313 | }; | |
314 | ||
315 | struct platform_device pxa25x_device_pwm1 = { | |
316 | .name = "pxa25x-pwm", | |
317 | .id = 1, | |
318 | .resource = pxa25x_resource_pwm1, | |
319 | .num_resources = ARRAY_SIZE(pxa25x_resource_pwm1), | |
320 | }; | |
321 | ||
8f58de7c | 322 | static u64 pxa25x_ssp_dma_mask = DMA_BIT_MASK(32); |
323 | ||
324 | static struct resource pxa25x_resource_ssp[] = { | |
325 | [0] = { | |
326 | .start = 0x41000000, | |
327 | .end = 0x4100001f, | |
328 | .flags = IORESOURCE_MEM, | |
329 | }, | |
330 | [1] = { | |
331 | .start = IRQ_SSP, | |
332 | .end = IRQ_SSP, | |
333 | .flags = IORESOURCE_IRQ, | |
334 | }, | |
335 | [2] = { | |
336 | /* DRCMR for RX */ | |
337 | .start = 13, | |
338 | .end = 13, | |
339 | .flags = IORESOURCE_DMA, | |
340 | }, | |
341 | [3] = { | |
342 | /* DRCMR for TX */ | |
343 | .start = 14, | |
344 | .end = 14, | |
345 | .flags = IORESOURCE_DMA, | |
346 | }, | |
347 | }; | |
348 | ||
349 | struct platform_device pxa25x_device_ssp = { | |
350 | .name = "pxa25x-ssp", | |
351 | .id = 0, | |
352 | .dev = { | |
353 | .dma_mask = &pxa25x_ssp_dma_mask, | |
354 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
355 | }, | |
356 | .resource = pxa25x_resource_ssp, | |
357 | .num_resources = ARRAY_SIZE(pxa25x_resource_ssp), | |
358 | }; | |
359 | ||
360 | static u64 pxa25x_nssp_dma_mask = DMA_BIT_MASK(32); | |
361 | ||
362 | static struct resource pxa25x_resource_nssp[] = { | |
363 | [0] = { | |
364 | .start = 0x41400000, | |
365 | .end = 0x4140002f, | |
366 | .flags = IORESOURCE_MEM, | |
367 | }, | |
368 | [1] = { | |
369 | .start = IRQ_NSSP, | |
370 | .end = IRQ_NSSP, | |
371 | .flags = IORESOURCE_IRQ, | |
372 | }, | |
373 | [2] = { | |
374 | /* DRCMR for RX */ | |
375 | .start = 15, | |
376 | .end = 15, | |
377 | .flags = IORESOURCE_DMA, | |
378 | }, | |
379 | [3] = { | |
380 | /* DRCMR for TX */ | |
381 | .start = 16, | |
382 | .end = 16, | |
383 | .flags = IORESOURCE_DMA, | |
384 | }, | |
385 | }; | |
386 | ||
387 | struct platform_device pxa25x_device_nssp = { | |
388 | .name = "pxa25x-nssp", | |
389 | .id = 1, | |
390 | .dev = { | |
391 | .dma_mask = &pxa25x_nssp_dma_mask, | |
392 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
393 | }, | |
394 | .resource = pxa25x_resource_nssp, | |
395 | .num_resources = ARRAY_SIZE(pxa25x_resource_nssp), | |
396 | }; | |
397 | ||
398 | static u64 pxa25x_assp_dma_mask = DMA_BIT_MASK(32); | |
399 | ||
400 | static struct resource pxa25x_resource_assp[] = { | |
401 | [0] = { | |
402 | .start = 0x41500000, | |
403 | .end = 0x4150002f, | |
404 | .flags = IORESOURCE_MEM, | |
405 | }, | |
406 | [1] = { | |
407 | .start = IRQ_ASSP, | |
408 | .end = IRQ_ASSP, | |
409 | .flags = IORESOURCE_IRQ, | |
410 | }, | |
411 | [2] = { | |
412 | /* DRCMR for RX */ | |
413 | .start = 23, | |
414 | .end = 23, | |
415 | .flags = IORESOURCE_DMA, | |
416 | }, | |
417 | [3] = { | |
418 | /* DRCMR for TX */ | |
419 | .start = 24, | |
420 | .end = 24, | |
421 | .flags = IORESOURCE_DMA, | |
422 | }, | |
423 | }; | |
424 | ||
425 | struct platform_device pxa25x_device_assp = { | |
426 | /* ASSP is basically equivalent to NSSP */ | |
427 | .name = "pxa25x-nssp", | |
428 | .id = 2, | |
429 | .dev = { | |
430 | .dma_mask = &pxa25x_assp_dma_mask, | |
431 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
432 | }, | |
433 | .resource = pxa25x_resource_assp, | |
434 | .num_resources = ARRAY_SIZE(pxa25x_resource_assp), | |
435 | }; | |
436 | #endif /* CONFIG_PXA25x */ | |
437 | ||
438 | #if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx) | |
439 | ||
37320980 | 440 | static struct resource pxa27x_resource_keypad[] = { |
441 | [0] = { | |
442 | .start = 0x41500000, | |
443 | .end = 0x4150004c, | |
444 | .flags = IORESOURCE_MEM, | |
445 | }, | |
446 | [1] = { | |
447 | .start = IRQ_KEYPAD, | |
448 | .end = IRQ_KEYPAD, | |
449 | .flags = IORESOURCE_IRQ, | |
450 | }, | |
451 | }; | |
452 | ||
453 | struct platform_device pxa27x_device_keypad = { | |
454 | .name = "pxa27x-keypad", | |
455 | .id = -1, | |
456 | .resource = pxa27x_resource_keypad, | |
457 | .num_resources = ARRAY_SIZE(pxa27x_resource_keypad), | |
458 | }; | |
459 | ||
460 | void __init pxa_set_keypad_info(struct pxa27x_keypad_platform_data *info) | |
461 | { | |
462 | pxa_register_device(&pxa27x_device_keypad, info); | |
463 | } | |
464 | ||
ec68e45b | 465 | static u64 pxa27x_ohci_dma_mask = DMA_BIT_MASK(32); |
466 | ||
467 | static struct resource pxa27x_resource_ohci[] = { | |
468 | [0] = { | |
469 | .start = 0x4C000000, | |
470 | .end = 0x4C00ff6f, | |
471 | .flags = IORESOURCE_MEM, | |
472 | }, | |
473 | [1] = { | |
474 | .start = IRQ_USBH1, | |
475 | .end = IRQ_USBH1, | |
476 | .flags = IORESOURCE_IRQ, | |
477 | }, | |
478 | }; | |
479 | ||
480 | struct platform_device pxa27x_device_ohci = { | |
481 | .name = "pxa27x-ohci", | |
482 | .id = -1, | |
483 | .dev = { | |
484 | .dma_mask = &pxa27x_ohci_dma_mask, | |
485 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
486 | }, | |
487 | .num_resources = ARRAY_SIZE(pxa27x_resource_ohci), | |
488 | .resource = pxa27x_resource_ohci, | |
489 | }; | |
490 | ||
491 | void __init pxa_set_ohci_info(struct pxaohci_platform_data *info) | |
492 | { | |
493 | pxa_register_device(&pxa27x_device_ohci, info); | |
494 | } | |
495 | ||
8f58de7c | 496 | static u64 pxa27x_ssp1_dma_mask = DMA_BIT_MASK(32); |
497 | ||
498 | static struct resource pxa27x_resource_ssp1[] = { | |
499 | [0] = { | |
500 | .start = 0x41000000, | |
501 | .end = 0x4100003f, | |
502 | .flags = IORESOURCE_MEM, | |
503 | }, | |
504 | [1] = { | |
505 | .start = IRQ_SSP, | |
506 | .end = IRQ_SSP, | |
507 | .flags = IORESOURCE_IRQ, | |
508 | }, | |
509 | [2] = { | |
510 | /* DRCMR for RX */ | |
511 | .start = 13, | |
512 | .end = 13, | |
513 | .flags = IORESOURCE_DMA, | |
514 | }, | |
515 | [3] = { | |
516 | /* DRCMR for TX */ | |
517 | .start = 14, | |
518 | .end = 14, | |
519 | .flags = IORESOURCE_DMA, | |
520 | }, | |
521 | }; | |
522 | ||
523 | struct platform_device pxa27x_device_ssp1 = { | |
524 | .name = "pxa27x-ssp", | |
525 | .id = 0, | |
526 | .dev = { | |
527 | .dma_mask = &pxa27x_ssp1_dma_mask, | |
528 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
529 | }, | |
530 | .resource = pxa27x_resource_ssp1, | |
531 | .num_resources = ARRAY_SIZE(pxa27x_resource_ssp1), | |
532 | }; | |
533 | ||
534 | static u64 pxa27x_ssp2_dma_mask = DMA_BIT_MASK(32); | |
535 | ||
536 | static struct resource pxa27x_resource_ssp2[] = { | |
537 | [0] = { | |
538 | .start = 0x41700000, | |
539 | .end = 0x4170003f, | |
540 | .flags = IORESOURCE_MEM, | |
541 | }, | |
542 | [1] = { | |
543 | .start = IRQ_SSP2, | |
544 | .end = IRQ_SSP2, | |
545 | .flags = IORESOURCE_IRQ, | |
546 | }, | |
547 | [2] = { | |
548 | /* DRCMR for RX */ | |
549 | .start = 15, | |
550 | .end = 15, | |
551 | .flags = IORESOURCE_DMA, | |
552 | }, | |
553 | [3] = { | |
554 | /* DRCMR for TX */ | |
555 | .start = 16, | |
556 | .end = 16, | |
557 | .flags = IORESOURCE_DMA, | |
558 | }, | |
559 | }; | |
560 | ||
561 | struct platform_device pxa27x_device_ssp2 = { | |
562 | .name = "pxa27x-ssp", | |
563 | .id = 1, | |
564 | .dev = { | |
565 | .dma_mask = &pxa27x_ssp2_dma_mask, | |
566 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
567 | }, | |
568 | .resource = pxa27x_resource_ssp2, | |
569 | .num_resources = ARRAY_SIZE(pxa27x_resource_ssp2), | |
570 | }; | |
571 | ||
572 | static u64 pxa27x_ssp3_dma_mask = DMA_BIT_MASK(32); | |
573 | ||
574 | static struct resource pxa27x_resource_ssp3[] = { | |
575 | [0] = { | |
576 | .start = 0x41900000, | |
577 | .end = 0x4190003f, | |
578 | .flags = IORESOURCE_MEM, | |
579 | }, | |
580 | [1] = { | |
581 | .start = IRQ_SSP3, | |
582 | .end = IRQ_SSP3, | |
583 | .flags = IORESOURCE_IRQ, | |
584 | }, | |
585 | [2] = { | |
586 | /* DRCMR for RX */ | |
587 | .start = 66, | |
588 | .end = 66, | |
589 | .flags = IORESOURCE_DMA, | |
590 | }, | |
591 | [3] = { | |
592 | /* DRCMR for TX */ | |
593 | .start = 67, | |
594 | .end = 67, | |
595 | .flags = IORESOURCE_DMA, | |
596 | }, | |
597 | }; | |
598 | ||
599 | struct platform_device pxa27x_device_ssp3 = { | |
600 | .name = "pxa27x-ssp", | |
601 | .id = 2, | |
602 | .dev = { | |
603 | .dma_mask = &pxa27x_ssp3_dma_mask, | |
604 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
605 | }, | |
606 | .resource = pxa27x_resource_ssp3, | |
607 | .num_resources = ARRAY_SIZE(pxa27x_resource_ssp3), | |
608 | }; | |
3f3acefb | 609 | |
75540c1a | 610 | static struct resource pxa27x_resource_pwm0[] = { |
611 | [0] = { | |
612 | .start = 0x40b00000, | |
613 | .end = 0x40b0001f, | |
614 | .flags = IORESOURCE_MEM, | |
615 | }, | |
616 | }; | |
617 | ||
618 | struct platform_device pxa27x_device_pwm0 = { | |
619 | .name = "pxa27x-pwm", | |
620 | .id = 0, | |
621 | .resource = pxa27x_resource_pwm0, | |
622 | .num_resources = ARRAY_SIZE(pxa27x_resource_pwm0), | |
623 | }; | |
624 | ||
625 | static struct resource pxa27x_resource_pwm1[] = { | |
626 | [0] = { | |
627 | .start = 0x40c00000, | |
628 | .end = 0x40c0001f, | |
629 | .flags = IORESOURCE_MEM, | |
630 | }, | |
631 | }; | |
632 | ||
633 | struct platform_device pxa27x_device_pwm1 = { | |
634 | .name = "pxa27x-pwm", | |
635 | .id = 1, | |
636 | .resource = pxa27x_resource_pwm1, | |
637 | .num_resources = ARRAY_SIZE(pxa27x_resource_pwm1), | |
638 | }; | |
639 | ||
3f3acefb GL |
640 | static struct resource pxa27x_resource_camera[] = { |
641 | [0] = { | |
642 | .start = 0x50000000, | |
643 | .end = 0x50000fff, | |
644 | .flags = IORESOURCE_MEM, | |
645 | }, | |
646 | [1] = { | |
647 | .start = IRQ_CAMERA, | |
648 | .end = IRQ_CAMERA, | |
649 | .flags = IORESOURCE_IRQ, | |
650 | }, | |
651 | }; | |
652 | ||
653 | static u64 pxa27x_dma_mask_camera = DMA_BIT_MASK(32); | |
654 | ||
655 | static struct platform_device pxa27x_device_camera = { | |
656 | .name = "pxa27x-camera", | |
657 | .id = 0, /* This is used to put cameras on this interface */ | |
658 | .dev = { | |
659 | .dma_mask = &pxa27x_dma_mask_camera, | |
660 | .coherent_dma_mask = 0xffffffff, | |
661 | }, | |
662 | .num_resources = ARRAY_SIZE(pxa27x_resource_camera), | |
663 | .resource = pxa27x_resource_camera, | |
664 | }; | |
665 | ||
666 | void __init pxa_set_camera_info(struct pxacamera_platform_data *info) | |
667 | { | |
668 | pxa_register_device(&pxa27x_device_camera, info); | |
669 | } | |
8f58de7c | 670 | #endif /* CONFIG_PXA27x || CONFIG_PXA3xx */ |
671 | ||
672 | #ifdef CONFIG_PXA3xx | |
673 | static u64 pxa3xx_ssp4_dma_mask = DMA_BIT_MASK(32); | |
674 | ||
675 | static struct resource pxa3xx_resource_ssp4[] = { | |
676 | [0] = { | |
677 | .start = 0x41a00000, | |
678 | .end = 0x41a0003f, | |
679 | .flags = IORESOURCE_MEM, | |
680 | }, | |
681 | [1] = { | |
682 | .start = IRQ_SSP4, | |
683 | .end = IRQ_SSP4, | |
684 | .flags = IORESOURCE_IRQ, | |
685 | }, | |
686 | [2] = { | |
687 | /* DRCMR for RX */ | |
688 | .start = 2, | |
689 | .end = 2, | |
690 | .flags = IORESOURCE_DMA, | |
691 | }, | |
692 | [3] = { | |
693 | /* DRCMR for TX */ | |
694 | .start = 3, | |
695 | .end = 3, | |
696 | .flags = IORESOURCE_DMA, | |
697 | }, | |
698 | }; | |
699 | ||
700 | struct platform_device pxa3xx_device_ssp4 = { | |
701 | /* PXA3xx SSP is basically equivalent to PXA27x */ | |
702 | .name = "pxa27x-ssp", | |
703 | .id = 3, | |
704 | .dev = { | |
705 | .dma_mask = &pxa3xx_ssp4_dma_mask, | |
706 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
707 | }, | |
708 | .resource = pxa3xx_resource_ssp4, | |
709 | .num_resources = ARRAY_SIZE(pxa3xx_resource_ssp4), | |
710 | }; | |
8d33b055 BW |
711 | |
712 | static struct resource pxa3xx_resources_mci2[] = { | |
713 | [0] = { | |
714 | .start = 0x42000000, | |
715 | .end = 0x42000fff, | |
716 | .flags = IORESOURCE_MEM, | |
717 | }, | |
718 | [1] = { | |
719 | .start = IRQ_MMC2, | |
720 | .end = IRQ_MMC2, | |
721 | .flags = IORESOURCE_IRQ, | |
722 | }, | |
723 | [2] = { | |
724 | .start = 93, | |
725 | .end = 93, | |
726 | .flags = IORESOURCE_DMA, | |
727 | }, | |
728 | [3] = { | |
729 | .start = 94, | |
730 | .end = 94, | |
731 | .flags = IORESOURCE_DMA, | |
732 | }, | |
733 | }; | |
734 | ||
735 | struct platform_device pxa3xx_device_mci2 = { | |
736 | .name = "pxa2xx-mci", | |
737 | .id = 1, | |
738 | .dev = { | |
739 | .dma_mask = &pxamci_dmamask, | |
740 | .coherent_dma_mask = 0xffffffff, | |
741 | }, | |
742 | .num_resources = ARRAY_SIZE(pxa3xx_resources_mci2), | |
743 | .resource = pxa3xx_resources_mci2, | |
744 | }; | |
745 | ||
746 | void __init pxa3xx_set_mci2_info(struct pxamci_platform_data *info) | |
747 | { | |
748 | pxa_register_device(&pxa3xx_device_mci2, info); | |
749 | } | |
750 | ||
5a1f21b1 BW |
751 | static struct resource pxa3xx_resources_mci3[] = { |
752 | [0] = { | |
753 | .start = 0x42500000, | |
754 | .end = 0x42500fff, | |
755 | .flags = IORESOURCE_MEM, | |
756 | }, | |
757 | [1] = { | |
758 | .start = IRQ_MMC3, | |
759 | .end = IRQ_MMC3, | |
760 | .flags = IORESOURCE_IRQ, | |
761 | }, | |
762 | [2] = { | |
763 | .start = 100, | |
764 | .end = 100, | |
765 | .flags = IORESOURCE_DMA, | |
766 | }, | |
767 | [3] = { | |
768 | .start = 101, | |
769 | .end = 101, | |
770 | .flags = IORESOURCE_DMA, | |
771 | }, | |
772 | }; | |
773 | ||
774 | struct platform_device pxa3xx_device_mci3 = { | |
775 | .name = "pxa2xx-mci", | |
776 | .id = 2, | |
777 | .dev = { | |
778 | .dma_mask = &pxamci_dmamask, | |
779 | .coherent_dma_mask = 0xffffffff, | |
780 | }, | |
781 | .num_resources = ARRAY_SIZE(pxa3xx_resources_mci3), | |
782 | .resource = pxa3xx_resources_mci3, | |
783 | }; | |
784 | ||
785 | void __init pxa3xx_set_mci3_info(struct pxamci_platform_data *info) | |
786 | { | |
787 | pxa_register_device(&pxa3xx_device_mci3, info); | |
788 | } | |
789 | ||
8f58de7c | 790 | #endif /* CONFIG_PXA3xx */ |