[mirror_ubuntu-zesty-kernel.git] / arch / arm / mach-pxa / devices.c

#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/dma-mapping.h>

#include <asm/arch/gpio.h>
#include <asm/arch/udc.h>
#include <asm/arch/pxafb.h>
#include <asm/arch/mmc.h>
#include <asm/arch/irda.h>
#include <asm/arch/i2c.h>
#include <asm/arch/mfp-pxa27x.h>
#include <asm/arch/ohci.h>
#include <asm/arch/pxa27x_keypad.h>
#include <asm/arch/camera.h>

#include "devices.h"
#include "generic.h"

void __init pxa_register_device(struct platform_device *dev, void *data)
{
	int ret;

	dev->dev.platform_data = data;

	ret = platform_device_register(dev);
	if (ret)
		dev_err(&dev->dev, "unable to register device: %d\n", ret);
}

static struct resource pxamci_resources[] = {
	[0] = {
		.start	= 0x41100000,
		.end	= 0x41100fff,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_MMC,
		.end	= IRQ_MMC,
		.flags	= IORESOURCE_IRQ,
	},
	[2] = {
		.start	= 21,
		.end	= 21,
		.flags	= IORESOURCE_DMA,
	},
	[3] = {
		.start	= 22,
		.end	= 22,
		.flags	= IORESOURCE_DMA,
	},
};

static u64 pxamci_dmamask = 0xffffffffUL;

struct platform_device pxa_device_mci = {
	.name		= "pxa2xx-mci",
	.id		= 0,
	.dev		= {
		.dma_mask = &pxamci_dmamask,
		.coherent_dma_mask = 0xffffffff,
	},
	.num_resources	= ARRAY_SIZE(pxamci_resources),
	.resource	= pxamci_resources,
};

void __init pxa_set_mci_info(struct pxamci_platform_data *info)
{
	pxa_register_device(&pxa_device_mci, info);
}


static struct pxa2xx_udc_mach_info pxa_udc_info;

void __init pxa_set_udc_info(struct pxa2xx_udc_mach_info *info)
{
	memcpy(&pxa_udc_info, info, sizeof *info);
}

static struct resource pxa2xx_udc_resources[] = {
	[0] = {
		.start	= 0x40600000,
		.end	= 0x4060ffff,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_USB,
		.end	= IRQ_USB,
		.flags	= IORESOURCE_IRQ,
	},
};

static u64 udc_dma_mask = ~(u32)0;

struct platform_device pxa25x_device_udc = {
	.name		= "pxa25x-udc",
	.id		= -1,
	.resource	= pxa2xx_udc_resources,
	.num_resources	= ARRAY_SIZE(pxa2xx_udc_resources),
	.dev		=  {
		.platform_data	= &pxa_udc_info,
		.dma_mask	= &udc_dma_mask,
	}
};

struct platform_device pxa27x_device_udc = {
	.name		= "pxa27x-udc",
	.id		= -1,
	.resource	= pxa2xx_udc_resources,
	.num_resources	= ARRAY_SIZE(pxa2xx_udc_resources),
	.dev		=  {
		.platform_data	= &pxa_udc_info,
		.dma_mask	= &udc_dma_mask,
	}
};

static struct resource pxafb_resources[] = {
	[0] = {
		.start	= 0x44000000,
		.end	= 0x4400ffff,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_LCD,
		.end	= IRQ_LCD,
		.flags	= IORESOURCE_IRQ,
	},
};

static u64 fb_dma_mask = ~(u64)0;

struct platform_device pxa_device_fb = {
	.name		= "pxa2xx-fb",
	.id		= -1,
	.dev		= {
		.dma_mask	= &fb_dma_mask,
		.coherent_dma_mask = 0xffffffff,
	},
	.num_resources	= ARRAY_SIZE(pxafb_resources),
	.resource	= pxafb_resources,
};

void __init set_pxa_fb_info(struct pxafb_mach_info *info)
{
	pxa_register_device(&pxa_device_fb, info);
}

void __init set_pxa_fb_parent(struct device *parent_dev)
{
	pxa_device_fb.dev.parent = parent_dev;
}

static struct resource pxa_resource_ffuart[] = {
	{
		.start	= __PREG(FFUART),
		.end	= __PREG(FFUART) + 35,
		.flags	= IORESOURCE_MEM,
	}, {
		.start	= IRQ_FFUART,
		.end	= IRQ_FFUART,
		.flags	= IORESOURCE_IRQ,
	}
};

struct platform_device pxa_device_ffuart= {
	.name		= "pxa2xx-uart",
	.id		= 0,
	.resource	= pxa_resource_ffuart,
	.num_resources	= ARRAY_SIZE(pxa_resource_ffuart),
};

static struct resource pxa_resource_btuart[] = {
	{
		.start	= __PREG(BTUART),
		.end	= __PREG(BTUART) + 35,
		.flags	= IORESOURCE_MEM,
	}, {
		.start	= IRQ_BTUART,
		.end	= IRQ_BTUART,
		.flags	= IORESOURCE_IRQ,
	}
};

struct platform_device pxa_device_btuart = {
	.name		= "pxa2xx-uart",
	.id		= 1,
	.resource	= pxa_resource_btuart,
	.num_resources	= ARRAY_SIZE(pxa_resource_btuart),
};

static struct resource pxa_resource_stuart[] = {
	{
		.start	= __PREG(STUART),
		.end	= __PREG(STUART) + 35,
		.flags	= IORESOURCE_MEM,
	}, {
		.start	= IRQ_STUART,
		.end	= IRQ_STUART,
		.flags	= IORESOURCE_IRQ,
	}
};

struct platform_device pxa_device_stuart = {
	.name		= "pxa2xx-uart",
	.id		= 2,
	.resource	= pxa_resource_stuart,
	.num_resources	= ARRAY_SIZE(pxa_resource_stuart),
};

static struct resource pxa_resource_hwuart[] = {
	{
		.start	= __PREG(HWUART),
		.end	= __PREG(HWUART) + 47,
		.flags	= IORESOURCE_MEM,
	}, {
		.start	= IRQ_HWUART,
		.end	= IRQ_HWUART,
		.flags	= IORESOURCE_IRQ,
	}
};

struct platform_device pxa_device_hwuart = {
	.name		= "pxa2xx-uart",
	.id		= 3,
	.resource	= pxa_resource_hwuart,
	.num_resources	= ARRAY_SIZE(pxa_resource_hwuart),
};

static struct resource pxai2c_resources[] = {
	{
		.start	= 0x40301680,
		.end	= 0x403016a3,
		.flags	= IORESOURCE_MEM,
	}, {
		.start	= IRQ_I2C,
		.end	= IRQ_I2C,
		.flags	= IORESOURCE_IRQ,
	},
};

struct platform_device pxa_device_i2c = {
	.name		= "pxa2xx-i2c",
	.id		= 0,
	.resource	= pxai2c_resources,
	.num_resources	= ARRAY_SIZE(pxai2c_resources),
};

static unsigned long pxa27x_i2c_mfp_cfg[] = {
	GPIO117_I2C_SCL,
	GPIO118_I2C_SDA,
};

void __init pxa_set_i2c_info(struct i2c_pxa_platform_data *info)
{
	if (cpu_is_pxa27x())
		pxa2xx_mfp_config(ARRAY_AND_SIZE(pxa27x_i2c_mfp_cfg));
	pxa_register_device(&pxa_device_i2c, info);
}

static struct resource pxai2s_resources[] = {
	{
		.start	= 0x40400000,
		.end	= 0x40400083,
		.flags	= IORESOURCE_MEM,
	}, {
		.start	= IRQ_I2S,
		.end	= IRQ_I2S,
		.flags	= IORESOURCE_IRQ,
	},
};

struct platform_device pxa_device_i2s = {
	.name		= "pxa2xx-i2s",
	.id		= -1,
	.resource	= pxai2s_resources,
	.num_resources	= ARRAY_SIZE(pxai2s_resources),
};

static u64 pxaficp_dmamask = ~(u32)0;

struct platform_device pxa_device_ficp = {
	.name		= "pxa2xx-ir",
	.id		= -1,
	.dev		= {
		.dma_mask = &pxaficp_dmamask,
		.coherent_dma_mask = 0xffffffff,
	},
};

void __init pxa_set_ficp_info(struct pxaficp_platform_data *info)
{
	pxa_register_device(&pxa_device_ficp, info);
}

struct platform_device pxa_device_rtc = {
	.name		= "sa1100-rtc",
	.id		= -1,
};

#ifdef CONFIG_PXA25x

static struct resource pxa25x_resource_pwm0[] = {
	[0] = {
		.start	= 0x40b00000,
		.end	= 0x40b0000f,
		.flags	= IORESOURCE_MEM,
	},
};

struct platform_device pxa25x_device_pwm0 = {
	.name		= "pxa25x-pwm",
	.id		= 0,
	.resource	= pxa25x_resource_pwm0,
	.num_resources	= ARRAY_SIZE(pxa25x_resource_pwm0),
};

static struct resource pxa25x_resource_pwm1[] = {
	[0] = {
		.start	= 0x40c00000,
		.end	= 0x40c0000f,
		.flags	= IORESOURCE_MEM,
	},
};

struct platform_device pxa25x_device_pwm1 = {
	.name		= "pxa25x-pwm",
	.id		= 1,
	.resource	= pxa25x_resource_pwm1,
	.num_resources	= ARRAY_SIZE(pxa25x_resource_pwm1),
};

static u64 pxa25x_ssp_dma_mask = DMA_BIT_MASK(32);

static struct resource pxa25x_resource_ssp[] = {
	[0] = {
		.start	= 0x41000000,
		.end	= 0x4100001f,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_SSP,
		.end	= IRQ_SSP,
		.flags	= IORESOURCE_IRQ,
	},
	[2] = {
		/* DRCMR for RX */
		.start	= 13,
		.end	= 13,
		.flags	= IORESOURCE_DMA,
	},
	[3] = {
		/* DRCMR for TX */
		.start	= 14,
		.end	= 14,
		.flags	= IORESOURCE_DMA,
	},
};

struct platform_device pxa25x_device_ssp = {
	.name		= "pxa25x-ssp",
	.id		= 0,
	.dev		= {
		.dma_mask = &pxa25x_ssp_dma_mask,
		.coherent_dma_mask = DMA_BIT_MASK(32),
	},
	.resource	= pxa25x_resource_ssp,
	.num_resources	= ARRAY_SIZE(pxa25x_resource_ssp),
};

static u64 pxa25x_nssp_dma_mask = DMA_BIT_MASK(32);

static struct resource pxa25x_resource_nssp[] = {
	[0] = {
		.start	= 0x41400000,
		.end	= 0x4140002f,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_NSSP,
		.end	= IRQ_NSSP,
		.flags	= IORESOURCE_IRQ,
	},
	[2] = {
		/* DRCMR for RX */
		.start	= 15,
		.end	= 15,
		.flags	= IORESOURCE_DMA,
	},
	[3] = {
		/* DRCMR for TX */
		.start	= 16,
		.end	= 16,
		.flags	= IORESOURCE_DMA,
	},
};

struct platform_device pxa25x_device_nssp = {
	.name		= "pxa25x-nssp",
	.id		= 1,
	.dev		= {
		.dma_mask = &pxa25x_nssp_dma_mask,
		.coherent_dma_mask = DMA_BIT_MASK(32),
	},
	.resource	= pxa25x_resource_nssp,
	.num_resources	= ARRAY_SIZE(pxa25x_resource_nssp),
};

static u64 pxa25x_assp_dma_mask = DMA_BIT_MASK(32);

static struct resource pxa25x_resource_assp[] = {
	[0] = {
		.start	= 0x41500000,
		.end	= 0x4150002f,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_ASSP,
		.end	= IRQ_ASSP,
		.flags	= IORESOURCE_IRQ,
	},
	[2] = {
		/* DRCMR for RX */
		.start	= 23,
		.end	= 23,
		.flags	= IORESOURCE_DMA,
	},
	[3] = {
		/* DRCMR for TX */
		.start	= 24,
		.end	= 24,
		.flags	= IORESOURCE_DMA,
	},
};

struct platform_device pxa25x_device_assp = {
	/* ASSP is basically equivalent to NSSP */
	.name		= "pxa25x-nssp",
	.id		= 2,
	.dev		= {
		.dma_mask = &pxa25x_assp_dma_mask,
		.coherent_dma_mask = DMA_BIT_MASK(32),
	},
	.resource	= pxa25x_resource_assp,
	.num_resources	= ARRAY_SIZE(pxa25x_resource_assp),
};
#endif /* CONFIG_PXA25x */

#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)

static struct resource pxa27x_resource_keypad[] = {
	[0] = {
		.start	= 0x41500000,
		.end	= 0x4150004c,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_KEYPAD,
		.end	= IRQ_KEYPAD,
		.flags	= IORESOURCE_IRQ,
	},
};

struct platform_device pxa27x_device_keypad = {
	.name		= "pxa27x-keypad",
	.id		= -1,
	.resource	= pxa27x_resource_keypad,
	.num_resources	= ARRAY_SIZE(pxa27x_resource_keypad),
};

void __init pxa_set_keypad_info(struct pxa27x_keypad_platform_data *info)
{
	pxa_register_device(&pxa27x_device_keypad, info);
}

static u64 pxa27x_ohci_dma_mask = DMA_BIT_MASK(32);

static struct resource pxa27x_resource_ohci[] = {
	[0] = {
		.start  = 0x4C000000,
		.end    = 0x4C00ff6f,
		.flags  = IORESOURCE_MEM,
	},
	[1] = {
		.start  = IRQ_USBH1,
		.end    = IRQ_USBH1,
		.flags  = IORESOURCE_IRQ,
	},
};

struct platform_device pxa27x_device_ohci = {
	.name		= "pxa27x-ohci",
	.id		= -1,
	.dev		= {
		.dma_mask = &pxa27x_ohci_dma_mask,
		.coherent_dma_mask = DMA_BIT_MASK(32),
	},
	.num_resources  = ARRAY_SIZE(pxa27x_resource_ohci),
	.resource       = pxa27x_resource_ohci,
};

void __init pxa_set_ohci_info(struct pxaohci_platform_data *info)
{
	pxa_register_device(&pxa27x_device_ohci, info);
}

static u64 pxa27x_ssp1_dma_mask = DMA_BIT_MASK(32);

static struct resource pxa27x_resource_ssp1[] = {
	[0] = {
		.start	= 0x41000000,
		.end	= 0x4100003f,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_SSP,
		.end	= IRQ_SSP,
		.flags	= IORESOURCE_IRQ,
	},
	[2] = {
		/* DRCMR for RX */
		.start	= 13,
		.end	= 13,
		.flags	= IORESOURCE_DMA,
	},
	[3] = {
		/* DRCMR for TX */
		.start	= 14,
		.end	= 14,
		.flags	= IORESOURCE_DMA,
	},
};

struct platform_device pxa27x_device_ssp1 = {
	.name		= "pxa27x-ssp",
	.id		= 0,
	.dev		= {
		.dma_mask = &pxa27x_ssp1_dma_mask,
		.coherent_dma_mask = DMA_BIT_MASK(32),
	},
	.resource	= pxa27x_resource_ssp1,
	.num_resources	= ARRAY_SIZE(pxa27x_resource_ssp1),
};

static u64 pxa27x_ssp2_dma_mask = DMA_BIT_MASK(32);

static struct resource pxa27x_resource_ssp2[] = {
	[0] = {
		.start	= 0x41700000,
		.end	= 0x4170003f,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_SSP2,
		.end	= IRQ_SSP2,
		.flags	= IORESOURCE_IRQ,
	},
	[2] = {
		/* DRCMR for RX */
		.start	= 15,
		.end	= 15,
		.flags	= IORESOURCE_DMA,
	},
	[3] = {
		/* DRCMR for TX */
		.start	= 16,
		.end	= 16,
		.flags	= IORESOURCE_DMA,
	},
};

struct platform_device pxa27x_device_ssp2 = {
	.name		= "pxa27x-ssp",
	.id		= 1,
	.dev		= {
		.dma_mask = &pxa27x_ssp2_dma_mask,
		.coherent_dma_mask = DMA_BIT_MASK(32),
	},
	.resource	= pxa27x_resource_ssp2,
	.num_resources	= ARRAY_SIZE(pxa27x_resource_ssp2),
};

static u64 pxa27x_ssp3_dma_mask = DMA_BIT_MASK(32);

static struct resource pxa27x_resource_ssp3[] = {
	[0] = {
		.start	= 0x41900000,
		.end	= 0x4190003f,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_SSP3,
		.end	= IRQ_SSP3,
		.flags	= IORESOURCE_IRQ,
	},
	[2] = {
		/* DRCMR for RX */
		.start	= 66,
		.end	= 66,
		.flags	= IORESOURCE_DMA,
	},
	[3] = {
		/* DRCMR for TX */
		.start	= 67,
		.end	= 67,
		.flags	= IORESOURCE_DMA,
	},
};

struct platform_device pxa27x_device_ssp3 = {
	.name		= "pxa27x-ssp",
	.id		= 2,
	.dev		= {
		.dma_mask = &pxa27x_ssp3_dma_mask,
		.coherent_dma_mask = DMA_BIT_MASK(32),
	},
	.resource	= pxa27x_resource_ssp3,
	.num_resources	= ARRAY_SIZE(pxa27x_resource_ssp3),
};

static struct resource pxa27x_resource_pwm0[] = {
	[0] = {
		.start	= 0x40b00000,
		.end	= 0x40b0001f,
		.flags	= IORESOURCE_MEM,
	},
};

struct platform_device pxa27x_device_pwm0 = {
	.name		= "pxa27x-pwm",
	.id		= 0,
	.resource	= pxa27x_resource_pwm0,
	.num_resources	= ARRAY_SIZE(pxa27x_resource_pwm0),
};

static struct resource pxa27x_resource_pwm1[] = {
	[0] = {
		.start	= 0x40c00000,
		.end	= 0x40c0001f,
		.flags	= IORESOURCE_MEM,
	},
};

struct platform_device pxa27x_device_pwm1 = {
	.name		= "pxa27x-pwm",
	.id		= 1,
	.resource	= pxa27x_resource_pwm1,
	.num_resources	= ARRAY_SIZE(pxa27x_resource_pwm1),
};

static struct resource pxa27x_resource_camera[] = {
	[0] = {
		.start	= 0x50000000,
		.end	= 0x50000fff,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_CAMERA,
		.end	= IRQ_CAMERA,
		.flags	= IORESOURCE_IRQ,
	},
};

static u64 pxa27x_dma_mask_camera = DMA_BIT_MASK(32);

static struct platform_device pxa27x_device_camera = {
	.name		= "pxa27x-camera",
	.id		= 0, /* This is used to put cameras on this interface */
	.dev		= {
		.dma_mask      		= &pxa27x_dma_mask_camera,
		.coherent_dma_mask	= 0xffffffff,
	},
	.num_resources	= ARRAY_SIZE(pxa27x_resource_camera),
	.resource	= pxa27x_resource_camera,
};

void __init pxa_set_camera_info(struct pxacamera_platform_data *info)
{
	pxa_register_device(&pxa27x_device_camera, info);
}
#endif /* CONFIG_PXA27x || CONFIG_PXA3xx */

#ifdef CONFIG_PXA3xx
static u64 pxa3xx_ssp4_dma_mask = DMA_BIT_MASK(32);

static struct resource pxa3xx_resource_ssp4[] = {
	[0] = {
		.start	= 0x41a00000,
		.end	= 0x41a0003f,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_SSP4,
		.end	= IRQ_SSP4,
		.flags	= IORESOURCE_IRQ,
	},
	[2] = {
		/* DRCMR for RX */
		.start	= 2,
		.end	= 2,
		.flags	= IORESOURCE_DMA,
	},
	[3] = {
		/* DRCMR for TX */
		.start	= 3,
		.end	= 3,
		.flags	= IORESOURCE_DMA,
	},
};

struct platform_device pxa3xx_device_ssp4 = {
	/* PXA3xx SSP is basically equivalent to PXA27x */
	.name		= "pxa27x-ssp",
	.id		= 3,
	.dev		= {
		.dma_mask = &pxa3xx_ssp4_dma_mask,
		.coherent_dma_mask = DMA_BIT_MASK(32),
	},
	.resource	= pxa3xx_resource_ssp4,
	.num_resources	= ARRAY_SIZE(pxa3xx_resource_ssp4),
};

static struct resource pxa3xx_resources_mci2[] = {
	[0] = {
		.start	= 0x42000000,
		.end	= 0x42000fff,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_MMC2,
		.end	= IRQ_MMC2,
		.flags	= IORESOURCE_IRQ,
	},
	[2] = {
		.start	= 93,
		.end	= 93,
		.flags	= IORESOURCE_DMA,
	},
	[3] = {
		.start	= 94,
		.end	= 94,
		.flags	= IORESOURCE_DMA,
	},
};

struct platform_device pxa3xx_device_mci2 = {
	.name		= "pxa2xx-mci",
	.id		= 1,
	.dev		= {
		.dma_mask = &pxamci_dmamask,
		.coherent_dma_mask =	0xffffffff,
	},
	.num_resources	= ARRAY_SIZE(pxa3xx_resources_mci2),
	.resource	= pxa3xx_resources_mci2,
};

void __init pxa3xx_set_mci2_info(struct pxamci_platform_data *info)
{
	pxa_register_device(&pxa3xx_device_mci2, info);
}

static struct resource pxa3xx_resources_mci3[] = {
	[0] = {
		.start	= 0x42500000,
		.end	= 0x42500fff,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_MMC3,
		.end	= IRQ_MMC3,
		.flags	= IORESOURCE_IRQ,
	},
	[2] = {
		.start	= 100,
		.end	= 100,
		.flags	= IORESOURCE_DMA,
	},
	[3] = {
		.start	= 101,
		.end	= 101,
		.flags	= IORESOURCE_DMA,
	},
};

struct platform_device pxa3xx_device_mci3 = {
	.name		= "pxa2xx-mci",
	.id		= 2,
	.dev		= {
		.dma_mask = &pxamci_dmamask,
		.coherent_dma_mask = 0xffffffff,
	},
	.num_resources	= ARRAY_SIZE(pxa3xx_resources_mci3),
	.resource	= pxa3xx_resources_mci3,
};

void __init pxa3xx_set_mci3_info(struct pxamci_platform_data *info)
{
	pxa_register_device(&pxa3xx_device_mci3, info);
}

#endif /* CONFIG_PXA3xx */
Commit	Line	Data
8f58de7c	1	#include <linux/module.h>
	2	#include <linux/kernel.h>
	3	#include <linux/init.h>
	4	#include <linux/platform_device.h>
	5	#include <linux/dma-mapping.h>
	6
	7	#include <asm/arch/gpio.h>
	8	#include <asm/arch/udc.h>
	9	#include <asm/arch/pxafb.h>
	10	#include <asm/arch/mmc.h>
	11	#include <asm/arch/irda.h>
	12	#include <asm/arch/i2c.h>
bc3a5959	13	#include <asm/arch/mfp-pxa27x.h>
cd5604d5	14	#include <asm/arch/ohci.h>
37320980	15	#include <asm/arch/pxa27x_keypad.h>
3f3acefb	16	#include <asm/arch/camera.h>
8f58de7c	17
8f58de7c	18	#include "devices.h"
bc3a5959	19	#include "generic.h"
8f58de7c	20
	21	void __init pxa_register_device(struct platform_device dev, void data)
	22	{
	23	int ret;
	24
	25	dev->dev.platform_data = data;
	26
	27	ret = platform_device_register(dev);
	28	if (ret)
	29	dev_err(&dev->dev, "unable to register device: %d\n", ret);
	30	}
	31
	32	static struct resource pxamci_resources[] = {
	33	[0] = {
	34	.start = 0x41100000,
	35	.end = 0x41100fff,
	36	.flags = IORESOURCE_MEM,
	37	},
	38	[1] = {
	39	.start = IRQ_MMC,
	40	.end = IRQ_MMC,
	41	.flags = IORESOURCE_IRQ,
	42	},
	43	[2] = {
	44	.start = 21,
	45	.end = 21,
	46	.flags = IORESOURCE_DMA,
	47	},
	48	[3] = {
	49	.start = 22,
	50	.end = 22,
	51	.flags = IORESOURCE_DMA,
	52	},
	53	};
	54
	55	static u64 pxamci_dmamask = 0xffffffffUL;
	56
	57	struct platform_device pxa_device_mci = {
	58	.name = "pxa2xx-mci",
fafc9d3f	59	.id = 0,
8f58de7c	60	.dev = {
	61	.dma_mask = &pxamci_dmamask,
	62	.coherent_dma_mask = 0xffffffff,
	63	},
	64	.num_resources = ARRAY_SIZE(pxamci_resources),
	65	.resource = pxamci_resources,
	66	};
	67
	68	void __init pxa_set_mci_info(struct pxamci_platform_data *info)
	69	{
	70	pxa_register_device(&pxa_device_mci, info);
	71	}
	72
	73
	74	static struct pxa2xx_udc_mach_info pxa_udc_info;
	75
	76	void __init pxa_set_udc_info(struct pxa2xx_udc_mach_info *info)
	77	{
	78	memcpy(&pxa_udc_info, info, sizeof *info);
	79	}
	80
	81	static struct resource pxa2xx_udc_resources[] = {
	82	[0] = {
	83	.start = 0x40600000,
	84	.end = 0x4060ffff,
	85	.flags = IORESOURCE_MEM,
	86	},
	87	[1] = {
	88	.start = IRQ_USB,
	89	.end = IRQ_USB,
	90	.flags = IORESOURCE_IRQ,
	91	},
	92	};
	93
	94	static u64 udc_dma_mask = ~(u32)0;
	95
7a857620 PZ	96	struct platform_device pxa25x_device_udc = {
	97	.name = "pxa25x-udc",
	98	.id = -1,
	99	.resource = pxa2xx_udc_resources,
	100	.num_resources = ARRAY_SIZE(pxa2xx_udc_resources),
	101	.dev = {
	102	.platform_data = &pxa_udc_info,
	103	.dma_mask = &udc_dma_mask,
	104	}
	105	};
	106
	107	struct platform_device pxa27x_device_udc = {
	108	.name = "pxa27x-udc",
8f58de7c	109	.id = -1,
	110	.resource = pxa2xx_udc_resources,
	111	.num_resources = ARRAY_SIZE(pxa2xx_udc_resources),
	112	.dev = {
	113	.platform_data = &pxa_udc_info,
	114	.dma_mask = &udc_dma_mask,
	115	}
	116	};
	117
	118	static struct resource pxafb_resources[] = {
	119	[0] = {
	120	.start = 0x44000000,
	121	.end = 0x4400ffff,
	122	.flags = IORESOURCE_MEM,
	123	},
	124	[1] = {
	125	.start = IRQ_LCD,
	126	.end = IRQ_LCD,
	127	.flags = IORESOURCE_IRQ,
	128	},
	129	};
	130
	131	static u64 fb_dma_mask = ~(u64)0;
	132
	133	struct platform_device pxa_device_fb = {
	134	.name = "pxa2xx-fb",
	135	.id = -1,
	136	.dev = {
	137	.dma_mask = &fb_dma_mask,
	138	.coherent_dma_mask = 0xffffffff,
	139	},
	140	.num_resources = ARRAY_SIZE(pxafb_resources),
	141	.resource = pxafb_resources,
	142	};
	143
	144	void __init set_pxa_fb_info(struct pxafb_mach_info *info)
	145	{
	146	pxa_register_device(&pxa_device_fb, info);
	147	}
	148
	149	void __init set_pxa_fb_parent(struct device *parent_dev)
	150	{
	151	pxa_device_fb.dev.parent = parent_dev;
	152	}
	153
	154	static struct resource pxa_resource_ffuart[] = {
	155	{
	156	.start = __PREG(FFUART),
	157	.end = __PREG(FFUART) + 35,
	158	.flags = IORESOURCE_MEM,
	159	}, {
	160	.start = IRQ_FFUART,
	161	.end = IRQ_FFUART,
	162	.flags = IORESOURCE_IRQ,
	163	}
	164	};
	165
	166	struct platform_device pxa_device_ffuart= {
	167	.name = "pxa2xx-uart",
	168	.id = 0,
	169	.resource = pxa_resource_ffuart,
	170	.num_resources = ARRAY_SIZE(pxa_resource_ffuart),
	171	};
	172
173	static struct resource pxa_resource_btuart[] = {
174	{
175	.start = __PREG(BTUART),
176	.end = __PREG(BTUART) + 35,
177	.flags = IORESOURCE_MEM,
178	}, {
179	.start = IRQ_BTUART,
180	.end = IRQ_BTUART,
181	.flags = IORESOURCE_IRQ,
182	}
183	};
184
185	struct platform_device pxa_device_btuart = {
186	.name = "pxa2xx-uart",
187	.id = 1,
188	.resource = pxa_resource_btuart,
189	.num_resources = ARRAY_SIZE(pxa_resource_btuart),
190	};
191
192	static struct resource pxa_resource_stuart[] = {
193	{
194	.start = __PREG(STUART),
195	.end = __PREG(STUART) + 35,
196	.flags = IORESOURCE_MEM,
197	}, {
198	.start = IRQ_STUART,
199	.end = IRQ_STUART,
200	.flags = IORESOURCE_IRQ,
201	}
202	};
203
204	struct platform_device pxa_device_stuart = {
205	.name = "pxa2xx-uart",
206	.id = 2,
207	.resource = pxa_resource_stuart,
208	.num_resources = ARRAY_SIZE(pxa_resource_stuart),
209	};
210
211	static struct resource pxa_resource_hwuart[] = {
212	{
213	.start = __PREG(HWUART),
214	.end = __PREG(HWUART) + 47,
215	.flags = IORESOURCE_MEM,
216	}, {
217	.start = IRQ_HWUART,
218	.end = IRQ_HWUART,
219	.flags = IORESOURCE_IRQ,
220	}
221	};
222
223	struct platform_device pxa_device_hwuart = {
224	.name = "pxa2xx-uart",
225	.id = 3,
226	.resource = pxa_resource_hwuart,
227	.num_resources = ARRAY_SIZE(pxa_resource_hwuart),
228	};
229
230	static struct resource pxai2c_resources[] = {
231	{
232	.start = 0x40301680,
233	.end = 0x403016a3,
234	.flags = IORESOURCE_MEM,
235	}, {
236	.start = IRQ_I2C,
237	.end = IRQ_I2C,
238	.flags = IORESOURCE_IRQ,
239	},
240	};
241
242	struct platform_device pxa_device_i2c = {
243	.name = "pxa2xx-i2c",
244	.id = 0,
245	.resource = pxai2c_resources,
246	.num_resources = ARRAY_SIZE(pxai2c_resources),
247	};
248
bc3a5959 PZ	249	static unsigned long pxa27x_i2c_mfp_cfg[] = {
	250	GPIO117_I2C_SCL,
	251	GPIO118_I2C_SDA,
	252	};
	253
8f58de7c	254	void __init pxa_set_i2c_info(struct i2c_pxa_platform_data *info)
8f58de7c	255	{
bc3a5959 PZ	256	if (cpu_is_pxa27x())
bc3a5959 PZ	257	pxa2xx_mfp_config(ARRAY_AND_SIZE(pxa27x_i2c_mfp_cfg));
8f58de7c	258	pxa_register_device(&pxa_device_i2c, info);
	259	}
	260
	261	static struct resource pxai2s_resources[] = {
	262	{
	263	.start = 0x40400000,
	264	.end = 0x40400083,
	265	.flags = IORESOURCE_MEM,
	266	}, {
	267	.start = IRQ_I2S,
	268	.end = IRQ_I2S,
	269	.flags = IORESOURCE_IRQ,
	270	},
	271	};
	272
	273	struct platform_device pxa_device_i2s = {
	274	.name = "pxa2xx-i2s",
	275	.id = -1,
	276	.resource = pxai2s_resources,
	277	.num_resources = ARRAY_SIZE(pxai2s_resources),
	278	};
	279
	280	static u64 pxaficp_dmamask = ~(u32)0;
	281
	282	struct platform_device pxa_device_ficp = {
	283	.name = "pxa2xx-ir",
	284	.id = -1,
	285	.dev = {
	286	.dma_mask = &pxaficp_dmamask,
	287	.coherent_dma_mask = 0xffffffff,
	288	},
	289	};
	290
	291	void __init pxa_set_ficp_info(struct pxaficp_platform_data *info)
	292	{
	293	pxa_register_device(&pxa_device_ficp, info);
	294	}
	295
	296	struct platform_device pxa_device_rtc = {
	297	.name = "sa1100-rtc",
	298	.id = -1,
	299	};
	300
	301	#ifdef CONFIG_PXA25x
	302
75540c1a	303	static struct resource pxa25x_resource_pwm0[] = {
	304	[0] = {
	305	.start = 0x40b00000,
	306	.end = 0x40b0000f,
	307	.flags = IORESOURCE_MEM,
	308	},
	309	};
	310
	311	struct platform_device pxa25x_device_pwm0 = {
	312	.name = "pxa25x-pwm",
	313	.id = 0,
	314	.resource = pxa25x_resource_pwm0,
	315	.num_resources = ARRAY_SIZE(pxa25x_resource_pwm0),
	316	};
	317
	318	static struct resource pxa25x_resource_pwm1[] = {
	319	[0] = {
	320	.start = 0x40c00000,
	321	.end = 0x40c0000f,
	322	.flags = IORESOURCE_MEM,
	323	},
	324	};
	325
	326	struct platform_device pxa25x_device_pwm1 = {
	327	.name = "pxa25x-pwm",
	328	.id = 1,
	329	.resource = pxa25x_resource_pwm1,
	330	.num_resources = ARRAY_SIZE(pxa25x_resource_pwm1),
	331	};
	332
8f58de7c	333	static u64 pxa25x_ssp_dma_mask = DMA_BIT_MASK(32);
	334
	335	static struct resource pxa25x_resource_ssp[] = {
	336	[0] = {
	337	.start = 0x41000000,
	338	.end = 0x4100001f,
	339	.flags = IORESOURCE_MEM,
	340	},
	341	[1] = {
	342	.start = IRQ_SSP,
	343	.end = IRQ_SSP,
	344	.flags = IORESOURCE_IRQ,
	345	},
	346	[2] = {
	347	/* DRCMR for RX */
	348	.start = 13,
	349	.end = 13,
	350	.flags = IORESOURCE_DMA,
	351	},
	352	[3] = {
	353	/* DRCMR for TX */
	354	.start = 14,
	355	.end = 14,
	356	.flags = IORESOURCE_DMA,
	357	},
	358	};
	359
	360	struct platform_device pxa25x_device_ssp = {
	361	.name = "pxa25x-ssp",
	362	.id = 0,
	363	.dev = {
	364	.dma_mask = &pxa25x_ssp_dma_mask,
	365	.coherent_dma_mask = DMA_BIT_MASK(32),
	366	},
	367	.resource = pxa25x_resource_ssp,
	368	.num_resources = ARRAY_SIZE(pxa25x_resource_ssp),
	369	};
	370
	371	static u64 pxa25x_nssp_dma_mask = DMA_BIT_MASK(32);
	372
	373	static struct resource pxa25x_resource_nssp[] = {
	374	[0] = {
	375	.start = 0x41400000,
	376	.end = 0x4140002f,
	377	.flags = IORESOURCE_MEM,
	378	},
	379	[1] = {
	380	.start = IRQ_NSSP,
	381	.end = IRQ_NSSP,
	382	.flags = IORESOURCE_IRQ,
	383	},
	384	[2] = {
	385	/* DRCMR for RX */
	386	.start = 15,
	387	.end = 15,
	388	.flags = IORESOURCE_DMA,
	389	},
	390	[3] = {
	391	/* DRCMR for TX */
	392	.start = 16,
	393	.end = 16,
	394	.flags = IORESOURCE_DMA,
	395	},
	396	};
397
398	struct platform_device pxa25x_device_nssp = {
399	.name = "pxa25x-nssp",
400	.id = 1,
401	.dev = {
402	.dma_mask = &pxa25x_nssp_dma_mask,
403	.coherent_dma_mask = DMA_BIT_MASK(32),
404	},
405	.resource = pxa25x_resource_nssp,
406	.num_resources = ARRAY_SIZE(pxa25x_resource_nssp),
407	};
408
409	static u64 pxa25x_assp_dma_mask = DMA_BIT_MASK(32);
410
411	static struct resource pxa25x_resource_assp[] = {
412	[0] = {
413	.start = 0x41500000,
414	.end = 0x4150002f,
415	.flags = IORESOURCE_MEM,
416	},
417	[1] = {
418	.start = IRQ_ASSP,
419	.end = IRQ_ASSP,
420	.flags = IORESOURCE_IRQ,
421	},
422	[2] = {
423	/* DRCMR for RX */
424	.start = 23,
425	.end = 23,
426	.flags = IORESOURCE_DMA,
427	},
428	[3] = {
429	/* DRCMR for TX */
430	.start = 24,
431	.end = 24,
432	.flags = IORESOURCE_DMA,
433	},
434	};
435
436	struct platform_device pxa25x_device_assp = {
437	/* ASSP is basically equivalent to NSSP */
438	.name = "pxa25x-nssp",
439	.id = 2,
440	.dev = {
441	.dma_mask = &pxa25x_assp_dma_mask,
442	.coherent_dma_mask = DMA_BIT_MASK(32),
443	},
444	.resource = pxa25x_resource_assp,
445	.num_resources = ARRAY_SIZE(pxa25x_resource_assp),
446	};
447	#endif /* CONFIG_PXA25x */
448
449	#if defined(CONFIG_PXA27x) \|\| defined(CONFIG_PXA3xx)
450
37320980	451	static struct resource pxa27x_resource_keypad[] = {
	452	[0] = {
	453	.start = 0x41500000,
	454	.end = 0x4150004c,
	455	.flags = IORESOURCE_MEM,
	456	},
	457	[1] = {
	458	.start = IRQ_KEYPAD,
	459	.end = IRQ_KEYPAD,
	460	.flags = IORESOURCE_IRQ,
	461	},
	462	};
	463
	464	struct platform_device pxa27x_device_keypad = {
	465	.name = "pxa27x-keypad",
	466	.id = -1,
	467	.resource = pxa27x_resource_keypad,
	468	.num_resources = ARRAY_SIZE(pxa27x_resource_keypad),
	469	};
	470
	471	void __init pxa_set_keypad_info(struct pxa27x_keypad_platform_data *info)
	472	{
	473	pxa_register_device(&pxa27x_device_keypad, info);
	474	}
	475
ec68e45b	476	static u64 pxa27x_ohci_dma_mask = DMA_BIT_MASK(32);
	477
	478	static struct resource pxa27x_resource_ohci[] = {
	479	[0] = {
	480	.start = 0x4C000000,
	481	.end = 0x4C00ff6f,
	482	.flags = IORESOURCE_MEM,
	483	},
	484	[1] = {
	485	.start = IRQ_USBH1,
	486	.end = IRQ_USBH1,
	487	.flags = IORESOURCE_IRQ,
	488	},
	489	};
	490
	491	struct platform_device pxa27x_device_ohci = {
	492	.name = "pxa27x-ohci",
	493	.id = -1,
	494	.dev = {
	495	.dma_mask = &pxa27x_ohci_dma_mask,
	496	.coherent_dma_mask = DMA_BIT_MASK(32),
	497	},
	498	.num_resources = ARRAY_SIZE(pxa27x_resource_ohci),
	499	.resource = pxa27x_resource_ohci,
	500	};
	501
	502	void __init pxa_set_ohci_info(struct pxaohci_platform_data *info)
	503	{
	504	pxa_register_device(&pxa27x_device_ohci, info);
	505	}
	506
8f58de7c	507	static u64 pxa27x_ssp1_dma_mask = DMA_BIT_MASK(32);
	508
	509	static struct resource pxa27x_resource_ssp1[] = {
	510	[0] = {
	511	.start = 0x41000000,
	512	.end = 0x4100003f,
	513	.flags = IORESOURCE_MEM,
	514	},
	515	[1] = {
	516	.start = IRQ_SSP,
	517	.end = IRQ_SSP,
	518	.flags = IORESOURCE_IRQ,
	519	},
	520	[2] = {
	521	/* DRCMR for RX */
	522	.start = 13,
	523	.end = 13,
	524	.flags = IORESOURCE_DMA,
	525	},
	526	[3] = {
	527	/* DRCMR for TX */
	528	.start = 14,
	529	.end = 14,
	530	.flags = IORESOURCE_DMA,
	531	},
	532	};
	533
	534	struct platform_device pxa27x_device_ssp1 = {
	535	.name = "pxa27x-ssp",
	536	.id = 0,
	537	.dev = {
	538	.dma_mask = &pxa27x_ssp1_dma_mask,
	539	.coherent_dma_mask = DMA_BIT_MASK(32),
	540	},
	541	.resource = pxa27x_resource_ssp1,
	542	.num_resources = ARRAY_SIZE(pxa27x_resource_ssp1),
	543	};
	544
	545	static u64 pxa27x_ssp2_dma_mask = DMA_BIT_MASK(32);
	546
	547	static struct resource pxa27x_resource_ssp2[] = {
	548	[0] = {
	549	.start = 0x41700000,
	550	.end = 0x4170003f,
	551	.flags = IORESOURCE_MEM,
	552	},
	553	[1] = {
	554	.start = IRQ_SSP2,
	555	.end = IRQ_SSP2,
	556	.flags = IORESOURCE_IRQ,
	557	},
	558	[2] = {
	559	/* DRCMR for RX */
	560	.start = 15,
	561	.end = 15,
	562	.flags = IORESOURCE_DMA,
	563	},
	564	[3] = {
	565	/* DRCMR for TX */
	566	.start = 16,
	567	.end = 16,
	568	.flags = IORESOURCE_DMA,
	569	},
	570	};
571
572	struct platform_device pxa27x_device_ssp2 = {
573	.name = "pxa27x-ssp",
574	.id = 1,
575	.dev = {
576	.dma_mask = &pxa27x_ssp2_dma_mask,
577	.coherent_dma_mask = DMA_BIT_MASK(32),
578	},
579	.resource = pxa27x_resource_ssp2,
580	.num_resources = ARRAY_SIZE(pxa27x_resource_ssp2),
581	};
582
583	static u64 pxa27x_ssp3_dma_mask = DMA_BIT_MASK(32);
584
585	static struct resource pxa27x_resource_ssp3[] = {
586	[0] = {
587	.start = 0x41900000,
588	.end = 0x4190003f,
589	.flags = IORESOURCE_MEM,
590	},
591	[1] = {
592	.start = IRQ_SSP3,
593	.end = IRQ_SSP3,
594	.flags = IORESOURCE_IRQ,
595	},
596	[2] = {
597	/* DRCMR for RX */
598	.start = 66,
599	.end = 66,
600	.flags = IORESOURCE_DMA,
601	},
602	[3] = {
603	/* DRCMR for TX */
604	.start = 67,
605	.end = 67,
606	.flags = IORESOURCE_DMA,
607	},
608	};
609
610	struct platform_device pxa27x_device_ssp3 = {
611	.name = "pxa27x-ssp",
612	.id = 2,
613	.dev = {
614	.dma_mask = &pxa27x_ssp3_dma_mask,
615	.coherent_dma_mask = DMA_BIT_MASK(32),
616	},
617	.resource = pxa27x_resource_ssp3,
618	.num_resources = ARRAY_SIZE(pxa27x_resource_ssp3),
619	};
3f3acefb	620
75540c1a	621	static struct resource pxa27x_resource_pwm0[] = {
	622	[0] = {
	623	.start = 0x40b00000,
	624	.end = 0x40b0001f,
	625	.flags = IORESOURCE_MEM,
	626	},
	627	};
	628
	629	struct platform_device pxa27x_device_pwm0 = {
	630	.name = "pxa27x-pwm",
	631	.id = 0,
	632	.resource = pxa27x_resource_pwm0,
	633	.num_resources = ARRAY_SIZE(pxa27x_resource_pwm0),
	634	};
	635
	636	static struct resource pxa27x_resource_pwm1[] = {
	637	[0] = {
	638	.start = 0x40c00000,
	639	.end = 0x40c0001f,
	640	.flags = IORESOURCE_MEM,
	641	},
	642	};
	643
	644	struct platform_device pxa27x_device_pwm1 = {
	645	.name = "pxa27x-pwm",
	646	.id = 1,
	647	.resource = pxa27x_resource_pwm1,
	648	.num_resources = ARRAY_SIZE(pxa27x_resource_pwm1),
	649	};
	650
3f3acefb GL	651	static struct resource pxa27x_resource_camera[] = {
	652	[0] = {
	653	.start = 0x50000000,
	654	.end = 0x50000fff,
	655	.flags = IORESOURCE_MEM,
	656	},
	657	[1] = {
	658	.start = IRQ_CAMERA,
	659	.end = IRQ_CAMERA,
	660	.flags = IORESOURCE_IRQ,
	661	},
	662	};
	663
	664	static u64 pxa27x_dma_mask_camera = DMA_BIT_MASK(32);
	665
	666	static struct platform_device pxa27x_device_camera = {
	667	.name = "pxa27x-camera",
	668	.id = 0, /* This is used to put cameras on this interface */
	669	.dev = {
	670	.dma_mask = &pxa27x_dma_mask_camera,
	671	.coherent_dma_mask = 0xffffffff,
	672	},
	673	.num_resources = ARRAY_SIZE(pxa27x_resource_camera),
	674	.resource = pxa27x_resource_camera,
	675	};
	676
	677	void __init pxa_set_camera_info(struct pxacamera_platform_data *info)
	678	{
	679	pxa_register_device(&pxa27x_device_camera, info);
	680	}
8f58de7c	681	#endif /* CONFIG_PXA27x \|\| CONFIG_PXA3xx */
	682
	683	#ifdef CONFIG_PXA3xx
	684	static u64 pxa3xx_ssp4_dma_mask = DMA_BIT_MASK(32);
	685
	686	static struct resource pxa3xx_resource_ssp4[] = {
	687	[0] = {
	688	.start = 0x41a00000,
	689	.end = 0x41a0003f,
	690	.flags = IORESOURCE_MEM,
	691	},
	692	[1] = {
	693	.start = IRQ_SSP4,
	694	.end = IRQ_SSP4,
	695	.flags = IORESOURCE_IRQ,
	696	},
	697	[2] = {
	698	/* DRCMR for RX */
	699	.start = 2,
	700	.end = 2,
	701	.flags = IORESOURCE_DMA,
	702	},
	703	[3] = {
	704	/* DRCMR for TX */
	705	.start = 3,
	706	.end = 3,
	707	.flags = IORESOURCE_DMA,
	708	},
	709	};
	710
	711	struct platform_device pxa3xx_device_ssp4 = {
	712	/* PXA3xx SSP is basically equivalent to PXA27x */
	713	.name = "pxa27x-ssp",
	714	.id = 3,
	715	.dev = {
	716	.dma_mask = &pxa3xx_ssp4_dma_mask,
	717	.coherent_dma_mask = DMA_BIT_MASK(32),
	718	},
	719	.resource = pxa3xx_resource_ssp4,
	720	.num_resources = ARRAY_SIZE(pxa3xx_resource_ssp4),
	721	};
8d33b055 BW	722
	723	static struct resource pxa3xx_resources_mci2[] = {
	724	[0] = {
	725	.start = 0x42000000,
	726	.end = 0x42000fff,
	727	.flags = IORESOURCE_MEM,
	728	},
	729	[1] = {
	730	.start = IRQ_MMC2,
	731	.end = IRQ_MMC2,
	732	.flags = IORESOURCE_IRQ,
	733	},
	734	[2] = {
	735	.start = 93,
	736	.end = 93,
	737	.flags = IORESOURCE_DMA,
	738	},
	739	[3] = {
	740	.start = 94,
	741	.end = 94,
	742	.flags = IORESOURCE_DMA,
	743	},
	744	};
	745
	746	struct platform_device pxa3xx_device_mci2 = {
	747	.name = "pxa2xx-mci",
	748	.id = 1,
	749	.dev = {
	750	.dma_mask = &pxamci_dmamask,
	751	.coherent_dma_mask = 0xffffffff,
	752	},
	753	.num_resources = ARRAY_SIZE(pxa3xx_resources_mci2),
	754	.resource = pxa3xx_resources_mci2,
	755	};
	756
	757	void __init pxa3xx_set_mci2_info(struct pxamci_platform_data *info)
	758	{
	759	pxa_register_device(&pxa3xx_device_mci2, info);
	760	}
	761
5a1f21b1 BW	762	static struct resource pxa3xx_resources_mci3[] = {
	763	[0] = {
	764	.start = 0x42500000,
	765	.end = 0x42500fff,
	766	.flags = IORESOURCE_MEM,
	767	},
	768	[1] = {
	769	.start = IRQ_MMC3,
	770	.end = IRQ_MMC3,
	771	.flags = IORESOURCE_IRQ,
	772	},
	773	[2] = {
	774	.start = 100,
	775	.end = 100,
	776	.flags = IORESOURCE_DMA,
	777	},
	778	[3] = {
	779	.start = 101,
	780	.end = 101,
	781	.flags = IORESOURCE_DMA,
	782	},
	783	};
	784
	785	struct platform_device pxa3xx_device_mci3 = {
	786	.name = "pxa2xx-mci",
	787	.id = 2,
	788	.dev = {
	789	.dma_mask = &pxamci_dmamask,
	790	.coherent_dma_mask = 0xffffffff,
	791	},
	792	.num_resources = ARRAY_SIZE(pxa3xx_resources_mci3),
	793	.resource = pxa3xx_resources_mci3,
	794	};
	795
	796	void __init pxa3xx_set_mci3_info(struct pxamci_platform_data *info)
	797	{
	798	pxa_register_device(&pxa3xx_device_mci3, info);
	799	}
	800
8f58de7c	801	#endif /* CONFIG_PXA3xx */