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[ARM] pxa: add platform device ID table to pxa i2c driver
[mirror_ubuntu-zesty-kernel.git] / arch / arm / mach-pxa / devices.c
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8f58de7c 1#include <linux/module.h>
2#include <linux/kernel.h>
3#include <linux/init.h>
4#include <linux/platform_device.h>
5#include <linux/dma-mapping.h>
6
a09e64fb
RK		 7#include <mach/udc.h>
8#include <mach/pxafb.h>
9#include <mach/mmc.h>
10#include <mach/irda.h>
11#include <mach/i2c.h>
a09e64fb
RK		 12#include <mach/ohci.h>
13#include <mach/pxa27x_keypad.h>
14#include <mach/pxa2xx_spi.h>
15#include <mach/camera.h>
16#include <mach/audio.h>
17#include <mach/pxa3xx_nand.h>
8f58de7c 18
19#include "devices.h"
bc3a5959 20#include "generic.h"
8f58de7c 21
22void __init pxa_register_device(struct platform_device *dev, void *data)
23{
24 int ret;
25
26 dev->dev.platform_data = data;
27
28 ret = platform_device_register(dev);
29 if (ret)
30 dev_err(&dev->dev, "unable to register device: %d\n", ret);
31}
32
33static struct resource pxamci_resources[] = {
34 [0] = {
35 .start = 0x41100000,
36 .end = 0x41100fff,
37 .flags = IORESOURCE_MEM,
38 },
39 [1] = {
40 .start = IRQ_MMC,
41 .end = IRQ_MMC,
42 .flags = IORESOURCE_IRQ,
43 },
44 [2] = {
45 .start = 21,
46 .end = 21,
47 .flags = IORESOURCE_DMA,
48 },
49 [3] = {
50 .start = 22,
51 .end = 22,
52 .flags = IORESOURCE_DMA,
53 },
54};
55
56static u64 pxamci_dmamask = 0xffffffffUL;
57
58struct platform_device pxa_device_mci = {
59 .name = "pxa2xx-mci",
fafc9d3f 60 .id = 0,
8f58de7c 61 .dev = {
62 .dma_mask = &pxamci_dmamask,
63 .coherent_dma_mask = 0xffffffff,
64 },
65 .num_resources = ARRAY_SIZE(pxamci_resources),
66 .resource = pxamci_resources,
67};
68
69void __init pxa_set_mci_info(struct pxamci_platform_data *info)
70{
71 pxa_register_device(&pxa_device_mci, info);
72}
73
74
75static struct pxa2xx_udc_mach_info pxa_udc_info;
76
77void __init pxa_set_udc_info(struct pxa2xx_udc_mach_info *info)
78{
79 memcpy(&pxa_udc_info, info, sizeof *info);
80}
81
82static struct resource pxa2xx_udc_resources[] = {
83 [0] = {
84 .start = 0x40600000,
85 .end = 0x4060ffff,
86 .flags = IORESOURCE_MEM,
87 },
88 [1] = {
89 .start = IRQ_USB,
90 .end = IRQ_USB,
91 .flags = IORESOURCE_IRQ,
92 },
93};
94
95static u64 udc_dma_mask = ~(u32)0;
96
7a857620
PZ		 97struct platform_device pxa25x_device_udc = {
98 .name = "pxa25x-udc",
99 .id = -1,
100 .resource = pxa2xx_udc_resources,
101 .num_resources = ARRAY_SIZE(pxa2xx_udc_resources),
102 .dev = {
103 .platform_data = &pxa_udc_info,
104 .dma_mask = &udc_dma_mask,
105 }
106};
107
108struct platform_device pxa27x_device_udc = {
109 .name = "pxa27x-udc",
8f58de7c 110 .id = -1,
111 .resource = pxa2xx_udc_resources,
112 .num_resources = ARRAY_SIZE(pxa2xx_udc_resources),
113 .dev = {
114 .platform_data = &pxa_udc_info,
115 .dma_mask = &udc_dma_mask,
116 }
117};
118
119static struct resource pxafb_resources[] = {
120 [0] = {
121 .start = 0x44000000,
122 .end = 0x4400ffff,
123 .flags = IORESOURCE_MEM,
124 },
125 [1] = {
126 .start = IRQ_LCD,
127 .end = IRQ_LCD,
128 .flags = IORESOURCE_IRQ,
129 },
130};
131
132static u64 fb_dma_mask = ~(u64)0;
133
134struct platform_device pxa_device_fb = {
135 .name = "pxa2xx-fb",
136 .id = -1,
137 .dev = {
138 .dma_mask = &fb_dma_mask,
139 .coherent_dma_mask = 0xffffffff,
140 },
141 .num_resources = ARRAY_SIZE(pxafb_resources),
142 .resource = pxafb_resources,
143};
144
145void __init set_pxa_fb_info(struct pxafb_mach_info *info)
146{
147 pxa_register_device(&pxa_device_fb, info);
148}
149
150void __init set_pxa_fb_parent(struct device *parent_dev)
151{
152 pxa_device_fb.dev.parent = parent_dev;
153}
154
155static struct resource pxa_resource_ffuart[] = {
156 {
02f65262
EM		 157 .start = 0x40100000,
158 .end = 0x40100023,
8f58de7c 159 .flags = IORESOURCE_MEM,
160 }, {
161 .start = IRQ_FFUART,
162 .end = IRQ_FFUART,
163 .flags = IORESOURCE_IRQ,
164 }
165};
166
167struct platform_device pxa_device_ffuart= {
168 .name = "pxa2xx-uart",
169 .id = 0,
170 .resource = pxa_resource_ffuart,
171 .num_resources = ARRAY_SIZE(pxa_resource_ffuart),
172};
173
174static struct resource pxa_resource_btuart[] = {
175 {
02f65262
EM		 176 .start = 0x40200000,
177 .end = 0x40200023,
8f58de7c 178 .flags = IORESOURCE_MEM,
179 }, {
180 .start = IRQ_BTUART,
181 .end = IRQ_BTUART,
182 .flags = IORESOURCE_IRQ,
183 }
184};
185
186struct platform_device pxa_device_btuart = {
187 .name = "pxa2xx-uart",
188 .id = 1,
189 .resource = pxa_resource_btuart,
190 .num_resources = ARRAY_SIZE(pxa_resource_btuart),
191};
192
193static struct resource pxa_resource_stuart[] = {
194 {
02f65262
EM		 195 .start = 0x40700000,
196 .end = 0x40700023,
8f58de7c 197 .flags = IORESOURCE_MEM,
198 }, {
199 .start = IRQ_STUART,
200 .end = IRQ_STUART,
201 .flags = IORESOURCE_IRQ,
202 }
203};
204
205struct platform_device pxa_device_stuart = {
206 .name = "pxa2xx-uart",
207 .id = 2,
208 .resource = pxa_resource_stuart,
209 .num_resources = ARRAY_SIZE(pxa_resource_stuart),
210};
211
212static struct resource pxa_resource_hwuart[] = {
213 {
02f65262
EM		 214 .start = 0x41600000,
215 .end = 0x4160002F,
8f58de7c 216 .flags = IORESOURCE_MEM,
217 }, {
218 .start = IRQ_HWUART,
219 .end = IRQ_HWUART,
220 .flags = IORESOURCE_IRQ,
221 }
222};
223
224struct platform_device pxa_device_hwuart = {
225 .name = "pxa2xx-uart",
226 .id = 3,
227 .resource = pxa_resource_hwuart,
228 .num_resources = ARRAY_SIZE(pxa_resource_hwuart),
229};
230
231static struct resource pxai2c_resources[] = {
232 {
233 .start = 0x40301680,
234 .end = 0x403016a3,
235 .flags = IORESOURCE_MEM,
236 }, {
237 .start = IRQ_I2C,
238 .end = IRQ_I2C,
239 .flags = IORESOURCE_IRQ,
240 },
241};
242
243struct platform_device pxa_device_i2c = {
244 .name = "pxa2xx-i2c",
245 .id = 0,
246 .resource = pxai2c_resources,
247 .num_resources = ARRAY_SIZE(pxai2c_resources),
248};
249
250void __init pxa_set_i2c_info(struct i2c_pxa_platform_data *info)
251{
252 pxa_register_device(&pxa_device_i2c, info);
253}
254
99464293
EM		 255#ifdef CONFIG_PXA27x
256static struct resource pxa27x_resources_i2c_power[] = {
257 {
258 .start = 0x40f00180,
259 .end = 0x40f001a3,
260 .flags = IORESOURCE_MEM,
261 }, {
262 .start = IRQ_PWRI2C,
263 .end = IRQ_PWRI2C,
264 .flags = IORESOURCE_IRQ,
265 },
266};
267
268struct platform_device pxa27x_device_i2c_power = {
269 .name = "pxa2xx-i2c",
270 .id = 1,
271 .resource = pxa27x_resources_i2c_power,
272 .num_resources = ARRAY_SIZE(pxa27x_resources_i2c_power),
273};
274#endif
275
276#ifdef CONFIG_PXA3xx
277static struct resource pxa3xx_resources_i2c_power[] = {
278 {
279 .start = 0x40f500c0,
280 .end = 0x40f500d3,
281 .flags = IORESOURCE_MEM,
282 }, {
283 .start = IRQ_PWRI2C,
284 .end = IRQ_PWRI2C,
285 .flags = IORESOURCE_IRQ,
286 },
287};
288
289struct platform_device pxa3xx_device_i2c_power = {
f23d4911 290 .name = "pxa3xx-pwri2c",
99464293
EM		 291 .id = 1,
292 .resource = pxa3xx_resources_i2c_power,
293 .num_resources = ARRAY_SIZE(pxa3xx_resources_i2c_power),
294};
295#endif
296
8f58de7c 297static struct resource pxai2s_resources[] = {
298 {
299 .start = 0x40400000,
300 .end = 0x40400083,
301 .flags = IORESOURCE_MEM,
302 }, {
303 .start = IRQ_I2S,
304 .end = IRQ_I2S,
305 .flags = IORESOURCE_IRQ,
306 },
307};
308
309struct platform_device pxa_device_i2s = {
310 .name = "pxa2xx-i2s",
311 .id = -1,
312 .resource = pxai2s_resources,
313 .num_resources = ARRAY_SIZE(pxai2s_resources),
314};
315
316static u64 pxaficp_dmamask = ~(u32)0;
317
318struct platform_device pxa_device_ficp = {
319 .name = "pxa2xx-ir",
320 .id = -1,
321 .dev = {
322 .dma_mask = &pxaficp_dmamask,
323 .coherent_dma_mask = 0xffffffff,
324 },
325};
326
327void __init pxa_set_ficp_info(struct pxaficp_platform_data *info)
328{
329 pxa_register_device(&pxa_device_ficp, info);
330}
331
72493146
RJ		 332static struct resource pxa_rtc_resources[] = {
333 [0] = {
334 .start = 0x40900000,
335 .end = 0x40900000 + 0x3b,
336 .flags = IORESOURCE_MEM,
337 },
338 [1] = {
339 .start = IRQ_RTC1Hz,
340 .end = IRQ_RTC1Hz,
341 .flags = IORESOURCE_IRQ,
342 },
343 [2] = {
344 .start = IRQ_RTCAlrm,
345 .end = IRQ_RTCAlrm,
346 .flags = IORESOURCE_IRQ,
347 },
348};
349
350struct platform_device sa1100_device_rtc = {
8f58de7c 351 .name = "sa1100-rtc",
352 .id = -1,
353};
354
72493146
RJ		 355struct platform_device pxa_device_rtc = {
356 .name = "pxa-rtc",
357 .id = -1,
358 .num_resources = ARRAY_SIZE(pxa_rtc_resources),
359 .resource = pxa_rtc_resources,
360};
361
9f19d638
MB		 362static struct resource pxa_ac97_resources[] = {
363 [0] = {
364 .start = 0x40500000,
365 .end = 0x40500000 + 0xfff,
366 .flags = IORESOURCE_MEM,
367 },
368 [1] = {
369 .start = IRQ_AC97,
370 .end = IRQ_AC97,
371 .flags = IORESOURCE_IRQ,
372 },
373};
374
375static u64 pxa_ac97_dmamask = 0xffffffffUL;
376
377struct platform_device pxa_device_ac97 = {
378 .name = "pxa2xx-ac97",
379 .id = -1,
380 .dev = {
381 .dma_mask = &pxa_ac97_dmamask,
382 .coherent_dma_mask = 0xffffffff,
383 },
384 .num_resources = ARRAY_SIZE(pxa_ac97_resources),
385 .resource = pxa_ac97_resources,
386};
387
388void __init pxa_set_ac97_info(pxa2xx_audio_ops_t *ops)
389{
390 pxa_register_device(&pxa_device_ac97, ops);
391}
392
8f58de7c 393#ifdef CONFIG_PXA25x
394
75540c1a 395static struct resource pxa25x_resource_pwm0[] = {
396 [0] = {
397 .start = 0x40b00000,
398 .end = 0x40b0000f,
399 .flags = IORESOURCE_MEM,
400 },
401};
402
403struct platform_device pxa25x_device_pwm0 = {
404 .name = "pxa25x-pwm",
405 .id = 0,
406 .resource = pxa25x_resource_pwm0,
407 .num_resources = ARRAY_SIZE(pxa25x_resource_pwm0),
408};
409
410static struct resource pxa25x_resource_pwm1[] = {
411 [0] = {
412 .start = 0x40c00000,
413 .end = 0x40c0000f,
414 .flags = IORESOURCE_MEM,
415 },
416};
417
418struct platform_device pxa25x_device_pwm1 = {
419 .name = "pxa25x-pwm",
420 .id = 1,
421 .resource = pxa25x_resource_pwm1,
422 .num_resources = ARRAY_SIZE(pxa25x_resource_pwm1),
423};
424
8f58de7c 425static u64 pxa25x_ssp_dma_mask = DMA_BIT_MASK(32);
426
427static struct resource pxa25x_resource_ssp[] = {
428 [0] = {
429 .start = 0x41000000,
430 .end = 0x4100001f,
431 .flags = IORESOURCE_MEM,
432 },
433 [1] = {
434 .start = IRQ_SSP,
435 .end = IRQ_SSP,
436 .flags = IORESOURCE_IRQ,
437 },
438 [2] = {
439 /* DRCMR for RX */
440 .start = 13,
441 .end = 13,
442 .flags = IORESOURCE_DMA,
443 },
444 [3] = {
445 /* DRCMR for TX */
446 .start = 14,
447 .end = 14,
448 .flags = IORESOURCE_DMA,
449 },
450};
451
452struct platform_device pxa25x_device_ssp = {
453 .name = "pxa25x-ssp",
454 .id = 0,
455 .dev = {
456 .dma_mask = &pxa25x_ssp_dma_mask,
457 .coherent_dma_mask = DMA_BIT_MASK(32),
458 },
459 .resource = pxa25x_resource_ssp,
460 .num_resources = ARRAY_SIZE(pxa25x_resource_ssp),
461};
462
463static u64 pxa25x_nssp_dma_mask = DMA_BIT_MASK(32);
464
465static struct resource pxa25x_resource_nssp[] = {
466 [0] = {
467 .start = 0x41400000,
468 .end = 0x4140002f,
469 .flags = IORESOURCE_MEM,
470 },
471 [1] = {
472 .start = IRQ_NSSP,
473 .end = IRQ_NSSP,
474 .flags = IORESOURCE_IRQ,
475 },
476 [2] = {
477 /* DRCMR for RX */
478 .start = 15,
479 .end = 15,
480 .flags = IORESOURCE_DMA,
481 },
482 [3] = {
483 /* DRCMR for TX */
484 .start = 16,
485 .end = 16,
486 .flags = IORESOURCE_DMA,
487 },
488};
489
490struct platform_device pxa25x_device_nssp = {
491 .name = "pxa25x-nssp",
492 .id = 1,
493 .dev = {
494 .dma_mask = &pxa25x_nssp_dma_mask,
495 .coherent_dma_mask = DMA_BIT_MASK(32),
496 },
497 .resource = pxa25x_resource_nssp,
498 .num_resources = ARRAY_SIZE(pxa25x_resource_nssp),
499};
500
501static u64 pxa25x_assp_dma_mask = DMA_BIT_MASK(32);
502
503static struct resource pxa25x_resource_assp[] = {
504 [0] = {
505 .start = 0x41500000,
506 .end = 0x4150002f,
507 .flags = IORESOURCE_MEM,
508 },
509 [1] = {
510 .start = IRQ_ASSP,
511 .end = IRQ_ASSP,
512 .flags = IORESOURCE_IRQ,
513 },
514 [2] = {
515 /* DRCMR for RX */
516 .start = 23,
517 .end = 23,
518 .flags = IORESOURCE_DMA,
519 },
520 [3] = {
521 /* DRCMR for TX */
522 .start = 24,
523 .end = 24,
524 .flags = IORESOURCE_DMA,
525 },
526};
527
528struct platform_device pxa25x_device_assp = {
529 /* ASSP is basically equivalent to NSSP */
530 .name = "pxa25x-nssp",
531 .id = 2,
532 .dev = {
533 .dma_mask = &pxa25x_assp_dma_mask,
534 .coherent_dma_mask = DMA_BIT_MASK(32),
535 },
536 .resource = pxa25x_resource_assp,
537 .num_resources = ARRAY_SIZE(pxa25x_resource_assp),
538};
539#endif /* CONFIG_PXA25x */
540
541#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
542
37320980 543static struct resource pxa27x_resource_keypad[] = {
544 [0] = {
545 .start = 0x41500000,
546 .end = 0x4150004c,
547 .flags = IORESOURCE_MEM,
548 },
549 [1] = {
550 .start = IRQ_KEYPAD,
551 .end = IRQ_KEYPAD,
552 .flags = IORESOURCE_IRQ,
553 },
554};
555
556struct platform_device pxa27x_device_keypad = {
557 .name = "pxa27x-keypad",
558 .id = -1,
559 .resource = pxa27x_resource_keypad,
560 .num_resources = ARRAY_SIZE(pxa27x_resource_keypad),
561};
562
563void __init pxa_set_keypad_info(struct pxa27x_keypad_platform_data *info)
564{
565 pxa_register_device(&pxa27x_device_keypad, info);
566}
567
ec68e45b 568static u64 pxa27x_ohci_dma_mask = DMA_BIT_MASK(32);
569
570static struct resource pxa27x_resource_ohci[] = {
571 [0] = {
572 .start = 0x4C000000,
573 .end = 0x4C00ff6f,
574 .flags = IORESOURCE_MEM,
575 },
576 [1] = {
577 .start = IRQ_USBH1,
578 .end = IRQ_USBH1,
579 .flags = IORESOURCE_IRQ,
580 },
581};
582
583struct platform_device pxa27x_device_ohci = {
584 .name = "pxa27x-ohci",
585 .id = -1,
586 .dev = {
587 .dma_mask = &pxa27x_ohci_dma_mask,
588 .coherent_dma_mask = DMA_BIT_MASK(32),
589 },
590 .num_resources = ARRAY_SIZE(pxa27x_resource_ohci),
591 .resource = pxa27x_resource_ohci,
592};
593
594void __init pxa_set_ohci_info(struct pxaohci_platform_data *info)
595{
596 pxa_register_device(&pxa27x_device_ohci, info);
597}
598
8f58de7c 599static u64 pxa27x_ssp1_dma_mask = DMA_BIT_MASK(32);
600
601static struct resource pxa27x_resource_ssp1[] = {
602 [0] = {
603 .start = 0x41000000,
604 .end = 0x4100003f,
605 .flags = IORESOURCE_MEM,
606 },
607 [1] = {
608 .start = IRQ_SSP,
609 .end = IRQ_SSP,
610 .flags = IORESOURCE_IRQ,
611 },
612 [2] = {
613 /* DRCMR for RX */
614 .start = 13,
615 .end = 13,
616 .flags = IORESOURCE_DMA,
617 },
618 [3] = {
619 /* DRCMR for TX */
620 .start = 14,
621 .end = 14,
622 .flags = IORESOURCE_DMA,
623 },
624};
625
626struct platform_device pxa27x_device_ssp1 = {
627 .name = "pxa27x-ssp",
628 .id = 0,
629 .dev = {
630 .dma_mask = &pxa27x_ssp1_dma_mask,
631 .coherent_dma_mask = DMA_BIT_MASK(32),
632 },
633 .resource = pxa27x_resource_ssp1,
634 .num_resources = ARRAY_SIZE(pxa27x_resource_ssp1),
635};
636
637static u64 pxa27x_ssp2_dma_mask = DMA_BIT_MASK(32);
638
639static struct resource pxa27x_resource_ssp2[] = {
640 [0] = {
641 .start = 0x41700000,
642 .end = 0x4170003f,
643 .flags = IORESOURCE_MEM,
644 },
645 [1] = {
646 .start = IRQ_SSP2,
647 .end = IRQ_SSP2,
648 .flags = IORESOURCE_IRQ,
649 },
650 [2] = {
651 /* DRCMR for RX */
652 .start = 15,
653 .end = 15,
654 .flags = IORESOURCE_DMA,
655 },
656 [3] = {
657 /* DRCMR for TX */
658 .start = 16,
659 .end = 16,
660 .flags = IORESOURCE_DMA,
661 },
662};
663
664struct platform_device pxa27x_device_ssp2 = {
665 .name = "pxa27x-ssp",
666 .id = 1,
667 .dev = {
668 .dma_mask = &pxa27x_ssp2_dma_mask,
669 .coherent_dma_mask = DMA_BIT_MASK(32),
670 },
671 .resource = pxa27x_resource_ssp2,
672 .num_resources = ARRAY_SIZE(pxa27x_resource_ssp2),
673};
674
675static u64 pxa27x_ssp3_dma_mask = DMA_BIT_MASK(32);
676
677static struct resource pxa27x_resource_ssp3[] = {
678 [0] = {
679 .start = 0x41900000,
680 .end = 0x4190003f,
681 .flags = IORESOURCE_MEM,
682 },
683 [1] = {
684 .start = IRQ_SSP3,
685 .end = IRQ_SSP3,
686 .flags = IORESOURCE_IRQ,
687 },
688 [2] = {
689 /* DRCMR for RX */
690 .start = 66,
691 .end = 66,
692 .flags = IORESOURCE_DMA,
693 },
694 [3] = {
695 /* DRCMR for TX */
696 .start = 67,
697 .end = 67,
698 .flags = IORESOURCE_DMA,
699 },
700};
701
702struct platform_device pxa27x_device_ssp3 = {
703 .name = "pxa27x-ssp",
704 .id = 2,
705 .dev = {
706 .dma_mask = &pxa27x_ssp3_dma_mask,
707 .coherent_dma_mask = DMA_BIT_MASK(32),
708 },
709 .resource = pxa27x_resource_ssp3,
710 .num_resources = ARRAY_SIZE(pxa27x_resource_ssp3),
711};
3f3acefb 712
75540c1a 713static struct resource pxa27x_resource_pwm0[] = {
714 [0] = {
715 .start = 0x40b00000,
716 .end = 0x40b0001f,
717 .flags = IORESOURCE_MEM,
718 },
719};
720
721struct platform_device pxa27x_device_pwm0 = {
722 .name = "pxa27x-pwm",
723 .id = 0,
724 .resource = pxa27x_resource_pwm0,
725 .num_resources = ARRAY_SIZE(pxa27x_resource_pwm0),
726};
727
728static struct resource pxa27x_resource_pwm1[] = {
729 [0] = {
730 .start = 0x40c00000,
731 .end = 0x40c0001f,
732 .flags = IORESOURCE_MEM,
733 },
734};
735
736struct platform_device pxa27x_device_pwm1 = {
737 .name = "pxa27x-pwm",
738 .id = 1,
739 .resource = pxa27x_resource_pwm1,
740 .num_resources = ARRAY_SIZE(pxa27x_resource_pwm1),
741};
742
3f3acefb
GL		 743static struct resource pxa27x_resource_camera[] = {
744 [0] = {
745 .start = 0x50000000,
746 .end = 0x50000fff,
747 .flags = IORESOURCE_MEM,
748 },
749 [1] = {
750 .start = IRQ_CAMERA,
751 .end = IRQ_CAMERA,
752 .flags = IORESOURCE_IRQ,
753 },
754};
755
756static u64 pxa27x_dma_mask_camera = DMA_BIT_MASK(32);
757
758static struct platform_device pxa27x_device_camera = {
759 .name = "pxa27x-camera",
760 .id = 0, /* This is used to put cameras on this interface */
761 .dev = {
762 .dma_mask = &pxa27x_dma_mask_camera,
763 .coherent_dma_mask = 0xffffffff,
764 },
765 .num_resources = ARRAY_SIZE(pxa27x_resource_camera),
766 .resource = pxa27x_resource_camera,
767};
768
769void __init pxa_set_camera_info(struct pxacamera_platform_data *info)
770{
771 pxa_register_device(&pxa27x_device_camera, info);
772}
8f58de7c 773#endif /* CONFIG_PXA27x || CONFIG_PXA3xx */
774
775#ifdef CONFIG_PXA3xx
776static u64 pxa3xx_ssp4_dma_mask = DMA_BIT_MASK(32);
777
778static struct resource pxa3xx_resource_ssp4[] = {
779 [0] = {
780 .start = 0x41a00000,
781 .end = 0x41a0003f,
782 .flags = IORESOURCE_MEM,
783 },
784 [1] = {
785 .start = IRQ_SSP4,
786 .end = IRQ_SSP4,
787 .flags = IORESOURCE_IRQ,
788 },
789 [2] = {
790 /* DRCMR for RX */
791 .start = 2,
792 .end = 2,
793 .flags = IORESOURCE_DMA,
794 },
795 [3] = {
796 /* DRCMR for TX */
797 .start = 3,
798 .end = 3,
799 .flags = IORESOURCE_DMA,
800 },
801};
802
803struct platform_device pxa3xx_device_ssp4 = {
804 /* PXA3xx SSP is basically equivalent to PXA27x */
805 .name = "pxa27x-ssp",
806 .id = 3,
807 .dev = {
808 .dma_mask = &pxa3xx_ssp4_dma_mask,
809 .coherent_dma_mask = DMA_BIT_MASK(32),
810 },
811 .resource = pxa3xx_resource_ssp4,
812 .num_resources = ARRAY_SIZE(pxa3xx_resource_ssp4),
813};
8d33b055
BW		 814
815static struct resource pxa3xx_resources_mci2[] = {
816 [0] = {
817 .start = 0x42000000,
818 .end = 0x42000fff,
819 .flags = IORESOURCE_MEM,
820 },
821 [1] = {
822 .start = IRQ_MMC2,
823 .end = IRQ_MMC2,
824 .flags = IORESOURCE_IRQ,
825 },
826 [2] = {
827 .start = 93,
828 .end = 93,
829 .flags = IORESOURCE_DMA,
830 },
831 [3] = {
832 .start = 94,
833 .end = 94,
834 .flags = IORESOURCE_DMA,
835 },
836};
837
838struct platform_device pxa3xx_device_mci2 = {
839 .name = "pxa2xx-mci",
840 .id = 1,
841 .dev = {
842 .dma_mask = &pxamci_dmamask,
843 .coherent_dma_mask = 0xffffffff,
844 },
845 .num_resources = ARRAY_SIZE(pxa3xx_resources_mci2),
846 .resource = pxa3xx_resources_mci2,
847};
848
849void __init pxa3xx_set_mci2_info(struct pxamci_platform_data *info)
850{
851 pxa_register_device(&pxa3xx_device_mci2, info);
852}
853
5a1f21b1
BW		 854static struct resource pxa3xx_resources_mci3[] = {
855 [0] = {
856 .start = 0x42500000,
857 .end = 0x42500fff,
858 .flags = IORESOURCE_MEM,
859 },
860 [1] = {
861 .start = IRQ_MMC3,
862 .end = IRQ_MMC3,
863 .flags = IORESOURCE_IRQ,
864 },
865 [2] = {
866 .start = 100,
867 .end = 100,
868 .flags = IORESOURCE_DMA,
869 },
870 [3] = {
871 .start = 101,
872 .end = 101,
873 .flags = IORESOURCE_DMA,
874 },
875};
876
877struct platform_device pxa3xx_device_mci3 = {
878 .name = "pxa2xx-mci",
879 .id = 2,
880 .dev = {
881 .dma_mask = &pxamci_dmamask,
882 .coherent_dma_mask = 0xffffffff,
883 },
884 .num_resources = ARRAY_SIZE(pxa3xx_resources_mci3),
885 .resource = pxa3xx_resources_mci3,
886};
887
888void __init pxa3xx_set_mci3_info(struct pxamci_platform_data *info)
889{
890 pxa_register_device(&pxa3xx_device_mci3, info);
891}
892
9ae819a8
EM		 893static struct resource pxa3xx_resources_nand[] = {
894 [0] = {
895 .start = 0x43100000,
896 .end = 0x43100053,
897 .flags = IORESOURCE_MEM,
898 },
899 [1] = {
900 .start = IRQ_NAND,
901 .end = IRQ_NAND,
902 .flags = IORESOURCE_IRQ,
903 },
904 [2] = {
905 /* DRCMR for Data DMA */
906 .start = 97,
907 .end = 97,
908 .flags = IORESOURCE_DMA,
909 },
910 [3] = {
911 /* DRCMR for Command DMA */
912 .start = 99,
913 .end = 99,
914 .flags = IORESOURCE_DMA,
915 },
916};
917
918static u64 pxa3xx_nand_dma_mask = DMA_BIT_MASK(32);
919
920struct platform_device pxa3xx_device_nand = {
921 .name = "pxa3xx-nand",
922 .id = -1,
923 .dev = {
924 .dma_mask = &pxa3xx_nand_dma_mask,
925 .coherent_dma_mask = DMA_BIT_MASK(32),
926 },
927 .num_resources = ARRAY_SIZE(pxa3xx_resources_nand),
928 .resource = pxa3xx_resources_nand,
929};
930
931void __init pxa3xx_set_nand_info(struct pxa3xx_nand_platform_data *info)
932{
933 pxa_register_device(&pxa3xx_device_nand, info);
934}
8f58de7c 935#endif /* CONFIG_PXA3xx */
e172274c
GL		 936
937/* pxa2xx-spi platform-device ID equals respective SSP platform-device ID + 1.
938 * See comment in arch/arm/mach-pxa/ssp.c::ssp_probe() */
939void __init pxa2xx_set_spi_info(unsigned id, struct pxa2xx_spi_master *info)
940{
941 struct platform_device *pd;
942
943 pd = platform_device_alloc("pxa2xx-spi", id);
944 if (pd == NULL) {
945 printk(KERN_ERR "pxa2xx-spi: failed to allocate device id %d\n",
946 id);
947 return;
948 }
949
950 pd->dev.platform_data = info;
951 platform_device_add(pd);
952}
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