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UBUNTU: Ubuntu-5.4.0-117.132
[mirror_ubuntu-focal-kernel.git] / arch / arm / mach-pxa / devices.c
CommitLineData
b2441318 1// SPDX-License-Identifier: GPL-2.0
8f58de7c 2#include <linux/module.h>
3#include <linux/kernel.h>
4#include <linux/init.h>
5#include <linux/platform_device.h>
22abc0d2 6#include <linux/clkdev.h>
8f58de7c 7#include <linux/dma-mapping.h>
1da10c17 8#include <linux/dmaengine.h>
8348c259 9#include <linux/spi/pxa2xx_spi.h>
f15fc9b1 10#include <linux/platform_data/i2c-pxa.h>
8f58de7c 11
4c25c5d2 12#include "udc.h"
293b2da1
AB		 13#include <linux/platform_data/usb-pxa3xx-ulpi.h>
14#include <linux/platform_data/video-pxafb.h>
15#include <linux/platform_data/mmc-pxamci.h>
16#include <linux/platform_data/irda-pxaficp.h>
4e611091 17#include <mach/irqs.h>
293b2da1
AB		 18#include <linux/platform_data/usb-ohci-pxa27x.h>
19#include <linux/platform_data/keypad-pxa27x.h>
a71daaa1 20#include <linux/platform_data/media/camera-pxa.h>
a09e64fb 21#include <mach/audio.h>
75e874c6 22#include <mach/hardware.h>
4be0856f 23#include <linux/platform_data/mmp_dma.h>
293b2da1 24#include <linux/platform_data/mtd-nand-pxa3xx.h>
8f58de7c 25
26#include "devices.h"
bc3a5959 27#include "generic.h"
8f58de7c 28
29void __init pxa_register_device(struct platform_device *dev, void *data)
30{
31 int ret;
32
33 dev->dev.platform_data = data;
34
35 ret = platform_device_register(dev);
36 if (ret)
37 dev_err(&dev->dev, "unable to register device: %d\n", ret);
38}
39
09a5358d
EM		 40static struct resource pxa_resource_pmu = {
41 .start = IRQ_PMU,
42 .end = IRQ_PMU,
43 .flags = IORESOURCE_IRQ,
44};
45
46struct platform_device pxa_device_pmu = {
f9eff219 47 .name = "xscale-pmu",
df3d17e0 48 .id = -1,
09a5358d
EM		 49 .resource = &pxa_resource_pmu,
50 .num_resources = 1,
51};
52
8f58de7c 53static struct resource pxamci_resources[] = {
54 [0] = {
55 .start = 0x41100000,
56 .end = 0x41100fff,
57 .flags = IORESOURCE_MEM,
58 },
59 [1] = {
60 .start = IRQ_MMC,
61 .end = IRQ_MMC,
62 .flags = IORESOURCE_IRQ,
63 },
8f58de7c 64};
65
66static u64 pxamci_dmamask = 0xffffffffUL;
67
68struct platform_device pxa_device_mci = {
69 .name = "pxa2xx-mci",
fafc9d3f 70 .id = 0,
8f58de7c 71 .dev = {
72 .dma_mask = &pxamci_dmamask,
73 .coherent_dma_mask = 0xffffffff,
74 },
75 .num_resources = ARRAY_SIZE(pxamci_resources),
76 .resource = pxamci_resources,
77};
78
79void __init pxa_set_mci_info(struct pxamci_platform_data *info)
80{
81 pxa_register_device(&pxa_device_mci, info);
82}
83
84
1257629b
PZ		 85static struct pxa2xx_udc_mach_info pxa_udc_info = {
86 .gpio_pullup = -1,
1257629b 87};
8f58de7c 88
89void __init pxa_set_udc_info(struct pxa2xx_udc_mach_info *info)
90{
91 memcpy(&pxa_udc_info, info, sizeof *info);
92}
93
94static struct resource pxa2xx_udc_resources[] = {
95 [0] = {
96 .start = 0x40600000,
97 .end = 0x4060ffff,
98 .flags = IORESOURCE_MEM,
99 },
100 [1] = {
101 .start = IRQ_USB,
102 .end = IRQ_USB,
103 .flags = IORESOURCE_IRQ,
104 },
105};
106
107static u64 udc_dma_mask = ~(u32)0;
108
7a857620
PZ		 109struct platform_device pxa25x_device_udc = {
110 .name = "pxa25x-udc",
111 .id = -1,
112 .resource = pxa2xx_udc_resources,
113 .num_resources = ARRAY_SIZE(pxa2xx_udc_resources),
114 .dev = {
115 .platform_data = &pxa_udc_info,
116 .dma_mask = &udc_dma_mask,
117 }
118};
119
120struct platform_device pxa27x_device_udc = {
121 .name = "pxa27x-udc",
8f58de7c 122 .id = -1,
123 .resource = pxa2xx_udc_resources,
124 .num_resources = ARRAY_SIZE(pxa2xx_udc_resources),
125 .dev = {
126 .platform_data = &pxa_udc_info,
127 .dma_mask = &udc_dma_mask,
128 }
129};
130
69f22be7
IG		 131#ifdef CONFIG_PXA3xx
132static struct resource pxa3xx_u2d_resources[] = {
133 [0] = {
134 .start = 0x54100000,
135 .end = 0x54100fff,
136 .flags = IORESOURCE_MEM,
137 },
138 [1] = {
139 .start = IRQ_USB2,
140 .end = IRQ_USB2,
141 .flags = IORESOURCE_IRQ,
142 },
143};
144
145struct platform_device pxa3xx_device_u2d = {
146 .name = "pxa3xx-u2d",
147 .id = -1,
148 .resource = pxa3xx_u2d_resources,
149 .num_resources = ARRAY_SIZE(pxa3xx_u2d_resources),
150};
151
152void __init pxa3xx_set_u2d_info(struct pxa3xx_u2d_platform_data *info)
153{
154 pxa_register_device(&pxa3xx_device_u2d, info);
155}
156#endif /* CONFIG_PXA3xx */
157
8f58de7c 158static struct resource pxafb_resources[] = {
159 [0] = {
160 .start = 0x44000000,
161 .end = 0x4400ffff,
162 .flags = IORESOURCE_MEM,
163 },
164 [1] = {
165 .start = IRQ_LCD,
166 .end = IRQ_LCD,
167 .flags = IORESOURCE_IRQ,
168 },
169};
170
171static u64 fb_dma_mask = ~(u64)0;
172
173struct platform_device pxa_device_fb = {
174 .name = "pxa2xx-fb",
175 .id = -1,
176 .dev = {
177 .dma_mask = &fb_dma_mask,
178 .coherent_dma_mask = 0xffffffff,
179 },
180 .num_resources = ARRAY_SIZE(pxafb_resources),
181 .resource = pxafb_resources,
182};
183
4321e1a1 184void __init pxa_set_fb_info(struct device *parent, struct pxafb_mach_info *info)
8f58de7c 185{
4321e1a1 186 pxa_device_fb.dev.parent = parent;
8f58de7c 187 pxa_register_device(&pxa_device_fb, info);
188}
189
8f58de7c 190static struct resource pxa_resource_ffuart[] = {
191 {
02f65262
EM		 192 .start = 0x40100000,
193 .end = 0x40100023,
8f58de7c 194 .flags = IORESOURCE_MEM,
195 }, {
196 .start = IRQ_FFUART,
197 .end = IRQ_FFUART,
198 .flags = IORESOURCE_IRQ,
199 }
200};
201
cc155c6f 202struct platform_device pxa_device_ffuart = {
8f58de7c 203 .name = "pxa2xx-uart",
204 .id = 0,
205 .resource = pxa_resource_ffuart,
206 .num_resources = ARRAY_SIZE(pxa_resource_ffuart),
207};
208
cc155c6f
RK		 209void __init pxa_set_ffuart_info(void *info)
210{
211 pxa_register_device(&pxa_device_ffuart, info);
212}
213
8f58de7c 214static struct resource pxa_resource_btuart[] = {
215 {
02f65262
EM		 216 .start = 0x40200000,
217 .end = 0x40200023,
8f58de7c 218 .flags = IORESOURCE_MEM,
219 }, {
220 .start = IRQ_BTUART,
221 .end = IRQ_BTUART,
222 .flags = IORESOURCE_IRQ,
223 }
224};
225
226struct platform_device pxa_device_btuart = {
227 .name = "pxa2xx-uart",
228 .id = 1,
229 .resource = pxa_resource_btuart,
230 .num_resources = ARRAY_SIZE(pxa_resource_btuart),
231};
232
cc155c6f
RK		 233void __init pxa_set_btuart_info(void *info)
234{
235 pxa_register_device(&pxa_device_btuart, info);
236}
237
8f58de7c 238static struct resource pxa_resource_stuart[] = {
239 {
02f65262
EM		 240 .start = 0x40700000,
241 .end = 0x40700023,
8f58de7c 242 .flags = IORESOURCE_MEM,
243 }, {
244 .start = IRQ_STUART,
245 .end = IRQ_STUART,
246 .flags = IORESOURCE_IRQ,
247 }
248};
249
250struct platform_device pxa_device_stuart = {
251 .name = "pxa2xx-uart",
252 .id = 2,
253 .resource = pxa_resource_stuart,
254 .num_resources = ARRAY_SIZE(pxa_resource_stuart),
255};
256
cc155c6f
RK		 257void __init pxa_set_stuart_info(void *info)
258{
259 pxa_register_device(&pxa_device_stuart, info);
260}
261
8f58de7c 262static struct resource pxa_resource_hwuart[] = {
263 {
02f65262
EM		 264 .start = 0x41600000,
265 .end = 0x4160002F,
8f58de7c 266 .flags = IORESOURCE_MEM,
267 }, {
268 .start = IRQ_HWUART,
269 .end = IRQ_HWUART,
270 .flags = IORESOURCE_IRQ,
271 }
272};
273
274struct platform_device pxa_device_hwuart = {
275 .name = "pxa2xx-uart",
276 .id = 3,
277 .resource = pxa_resource_hwuart,
278 .num_resources = ARRAY_SIZE(pxa_resource_hwuart),
279};
280
cc155c6f
RK		 281void __init pxa_set_hwuart_info(void *info)
282{
283 if (cpu_is_pxa255())
284 pxa_register_device(&pxa_device_hwuart, info);
285 else
286 pr_info("UART: Ignoring attempt to register HWUART on non-PXA255 hardware");
287}
288
8f58de7c 289static struct resource pxai2c_resources[] = {
290 {
291 .start = 0x40301680,
292 .end = 0x403016a3,
293 .flags = IORESOURCE_MEM,
294 }, {
295 .start = IRQ_I2C,
296 .end = IRQ_I2C,
297 .flags = IORESOURCE_IRQ,
298 },
299};
300
301struct platform_device pxa_device_i2c = {
302 .name = "pxa2xx-i2c",
303 .id = 0,
304 .resource = pxai2c_resources,
305 .num_resources = ARRAY_SIZE(pxai2c_resources),
306};
307
308void __init pxa_set_i2c_info(struct i2c_pxa_platform_data *info)
309{
310 pxa_register_device(&pxa_device_i2c, info);
311}
312
99464293
EM		 313#ifdef CONFIG_PXA27x
314static struct resource pxa27x_resources_i2c_power[] = {
315 {
316 .start = 0x40f00180,
317 .end = 0x40f001a3,
318 .flags = IORESOURCE_MEM,
319 }, {
320 .start = IRQ_PWRI2C,
321 .end = IRQ_PWRI2C,
322 .flags = IORESOURCE_IRQ,
323 },
324};
325
326struct platform_device pxa27x_device_i2c_power = {
327 .name = "pxa2xx-i2c",
328 .id = 1,
329 .resource = pxa27x_resources_i2c_power,
330 .num_resources = ARRAY_SIZE(pxa27x_resources_i2c_power),
331};
332#endif
333
8f58de7c 334static struct resource pxai2s_resources[] = {
335 {
336 .start = 0x40400000,
337 .end = 0x40400083,
338 .flags = IORESOURCE_MEM,
339 }, {
340 .start = IRQ_I2S,
341 .end = IRQ_I2S,
342 .flags = IORESOURCE_IRQ,
343 },
344};
345
346struct platform_device pxa_device_i2s = {
347 .name = "pxa2xx-i2s",
348 .id = -1,
349 .resource = pxai2s_resources,
350 .num_resources = ARRAY_SIZE(pxai2s_resources),
351};
352
f0fba2ad
LG		 353struct platform_device pxa_device_asoc_ssp1 = {
354 .name = "pxa-ssp-dai",
355 .id = 0,
356};
357
358struct platform_device pxa_device_asoc_ssp2= {
359 .name = "pxa-ssp-dai",
360 .id = 1,
361};
362
363struct platform_device pxa_device_asoc_ssp3 = {
364 .name = "pxa-ssp-dai",
365 .id = 2,
366};
367
368struct platform_device pxa_device_asoc_ssp4 = {
369 .name = "pxa-ssp-dai",
370 .id = 3,
371};
372
373struct platform_device pxa_device_asoc_platform = {
374 .name = "pxa-pcm-audio",
375 .id = -1,
376};
377
8f58de7c 378static u64 pxaficp_dmamask = ~(u32)0;
379
121f3f9b
RH		 380static struct resource pxa_ir_resources[] = {
381 [0] = {
382 .start = IRQ_STUART,
383 .end = IRQ_STUART,
384 .flags = IORESOURCE_IRQ,
385 },
386 [1] = {
387 .start = IRQ_ICP,
388 .end = IRQ_ICP,
389 .flags = IORESOURCE_IRQ,
390 },
48a629da
RJ		 391 [3] = {
392 .start = 0x40800000,
393 .end = 0x4080001b,
394 .flags = IORESOURCE_MEM,
395 },
396 [4] = {
397 .start = 0x40700000,
398 .end = 0x40700023,
399 .flags = IORESOURCE_MEM,
400 },
121f3f9b
RH		 401};
402
8f58de7c 403struct platform_device pxa_device_ficp = {
404 .name = "pxa2xx-ir",
405 .id = -1,
121f3f9b
RH		 406 .num_resources = ARRAY_SIZE(pxa_ir_resources),
407 .resource = pxa_ir_resources,
8f58de7c 408 .dev = {
409 .dma_mask = &pxaficp_dmamask,
410 .coherent_dma_mask = 0xffffffff,
411 },
412};
413
414void __init pxa_set_ficp_info(struct pxaficp_platform_data *info)
415{
416 pxa_register_device(&pxa_device_ficp, info);
417}
418
72493146
RJ		 419static struct resource pxa_rtc_resources[] = {
420 [0] = {
421 .start = 0x40900000,
422 .end = 0x40900000 + 0x3b,
423 .flags = IORESOURCE_MEM,
424 },
425 [1] = {
426 .start = IRQ_RTC1Hz,
427 .end = IRQ_RTC1Hz,
3888c090 428 .name = "rtc 1Hz",
72493146
RJ		 429 .flags = IORESOURCE_IRQ,
430 },
431 [2] = {
432 .start = IRQ_RTCAlrm,
433 .end = IRQ_RTCAlrm,
3888c090 434 .name = "rtc alarm",
72493146
RJ		 435 .flags = IORESOURCE_IRQ,
436 },
437};
438
72493146
RJ		 439struct platform_device pxa_device_rtc = {
440 .name = "pxa-rtc",
441 .id = -1,
442 .num_resources = ARRAY_SIZE(pxa_rtc_resources),
443 .resource = pxa_rtc_resources,
444};
445
3888c090
HZ		 446struct platform_device sa1100_device_rtc = {
447 .name = "sa1100-rtc",
448 .id = -1,
2c4fabec
RH		 449 .num_resources = ARRAY_SIZE(pxa_rtc_resources),
450 .resource = pxa_rtc_resources,
3888c090
HZ		 451};
452
9f19d638
MB		 453static struct resource pxa_ac97_resources[] = {
454 [0] = {
455 .start = 0x40500000,
456 .end = 0x40500000 + 0xfff,
457 .flags = IORESOURCE_MEM,
458 },
459 [1] = {
460 .start = IRQ_AC97,
461 .end = IRQ_AC97,
462 .flags = IORESOURCE_IRQ,
463 },
464};
465
466static u64 pxa_ac97_dmamask = 0xffffffffUL;
467
468struct platform_device pxa_device_ac97 = {
469 .name = "pxa2xx-ac97",
470 .id = -1,
471 .dev = {
472 .dma_mask = &pxa_ac97_dmamask,
473 .coherent_dma_mask = 0xffffffff,
474 },
475 .num_resources = ARRAY_SIZE(pxa_ac97_resources),
476 .resource = pxa_ac97_resources,
477};
478
479void __init pxa_set_ac97_info(pxa2xx_audio_ops_t *ops)
480{
22abc0d2
RJ		 481 int ret;
482
483 ret = clk_add_alias("ac97_clk", "pxa2xx-ac97:0", "AC97CLK",
484 &pxa_device_ac97.dev);
485 if (ret)
486 pr_err("PXA AC97 clock1 alias error: %d\n", ret);
487
488 ret = clk_add_alias("ac97_clk", "pxa2xx-ac97:1", "AC97CLK",
489 &pxa_device_ac97.dev);
490 if (ret)
491 pr_err("PXA AC97 clock2 alias error: %d\n", ret);
492
9f19d638
MB		 493 pxa_register_device(&pxa_device_ac97, ops);
494}
495
8f58de7c 496#ifdef CONFIG_PXA25x
497
75540c1a 498static struct resource pxa25x_resource_pwm0[] = {
499 [0] = {
500 .start = 0x40b00000,
501 .end = 0x40b0000f,
502 .flags = IORESOURCE_MEM,
503 },
504};
505
506struct platform_device pxa25x_device_pwm0 = {
507 .name = "pxa25x-pwm",
508 .id = 0,
509 .resource = pxa25x_resource_pwm0,
510 .num_resources = ARRAY_SIZE(pxa25x_resource_pwm0),
511};
512
513static struct resource pxa25x_resource_pwm1[] = {
514 [0] = {
515 .start = 0x40c00000,
516 .end = 0x40c0000f,
517 .flags = IORESOURCE_MEM,
518 },
519};
520
521struct platform_device pxa25x_device_pwm1 = {
522 .name = "pxa25x-pwm",
523 .id = 1,
524 .resource = pxa25x_resource_pwm1,
525 .num_resources = ARRAY_SIZE(pxa25x_resource_pwm1),
526};
527
8f58de7c 528static u64 pxa25x_ssp_dma_mask = DMA_BIT_MASK(32);
529
530static struct resource pxa25x_resource_ssp[] = {
531 [0] = {
532 .start = 0x41000000,
533 .end = 0x4100001f,
534 .flags = IORESOURCE_MEM,
535 },
536 [1] = {
537 .start = IRQ_SSP,
538 .end = IRQ_SSP,
539 .flags = IORESOURCE_IRQ,
540 },
8f58de7c 541};
542
543struct platform_device pxa25x_device_ssp = {
544 .name = "pxa25x-ssp",
545 .id = 0,
546 .dev = {
547 .dma_mask = &pxa25x_ssp_dma_mask,
548 .coherent_dma_mask = DMA_BIT_MASK(32),
549 },
550 .resource = pxa25x_resource_ssp,
551 .num_resources = ARRAY_SIZE(pxa25x_resource_ssp),
552};
553
554static u64 pxa25x_nssp_dma_mask = DMA_BIT_MASK(32);
555
556static struct resource pxa25x_resource_nssp[] = {
557 [0] = {
558 .start = 0x41400000,
559 .end = 0x4140002f,
560 .flags = IORESOURCE_MEM,
561 },
562 [1] = {
563 .start = IRQ_NSSP,
564 .end = IRQ_NSSP,
565 .flags = IORESOURCE_IRQ,
566 },
8f58de7c 567};
568
569struct platform_device pxa25x_device_nssp = {
570 .name = "pxa25x-nssp",
571 .id = 1,
572 .dev = {
573 .dma_mask = &pxa25x_nssp_dma_mask,
574 .coherent_dma_mask = DMA_BIT_MASK(32),
575 },
576 .resource = pxa25x_resource_nssp,
577 .num_resources = ARRAY_SIZE(pxa25x_resource_nssp),
578};
579
580static u64 pxa25x_assp_dma_mask = DMA_BIT_MASK(32);
581
582static struct resource pxa25x_resource_assp[] = {
583 [0] = {
584 .start = 0x41500000,
585 .end = 0x4150002f,
586 .flags = IORESOURCE_MEM,
587 },
588 [1] = {
589 .start = IRQ_ASSP,
590 .end = IRQ_ASSP,
591 .flags = IORESOURCE_IRQ,
592 },
8f58de7c 593};
594
595struct platform_device pxa25x_device_assp = {
596 /* ASSP is basically equivalent to NSSP */
597 .name = "pxa25x-nssp",
598 .id = 2,
599 .dev = {
600 .dma_mask = &pxa25x_assp_dma_mask,
601 .coherent_dma_mask = DMA_BIT_MASK(32),
602 },
603 .resource = pxa25x_resource_assp,
604 .num_resources = ARRAY_SIZE(pxa25x_resource_assp),
605};
606#endif /* CONFIG_PXA25x */
607
608#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
a4553358 609static struct resource pxa27x_resource_camera[] = {
37320980 610 [0] = {
a4553358
HZ		 611 .start = 0x50000000,
612 .end = 0x50000fff,
37320980 613 .flags = IORESOURCE_MEM,
614 },
615 [1] = {
a4553358
HZ		 616 .start = IRQ_CAMERA,
617 .end = IRQ_CAMERA,
37320980 618 .flags = IORESOURCE_IRQ,
619 },
620};
621
a4553358
HZ		 622static u64 pxa27x_dma_mask_camera = DMA_BIT_MASK(32);
623
624static struct platform_device pxa27x_device_camera = {
625 .name = "pxa27x-camera",
626 .id = 0, /* This is used to put cameras on this interface */
627 .dev = {
628 .dma_mask = &pxa27x_dma_mask_camera,
629 .coherent_dma_mask = 0xffffffff,
630 },
631 .num_resources = ARRAY_SIZE(pxa27x_resource_camera),
632 .resource = pxa27x_resource_camera,
37320980 633};
634
a4553358 635void __init pxa_set_camera_info(struct pxacamera_platform_data *info)
37320980 636{
a4553358 637 pxa_register_device(&pxa27x_device_camera, info);
37320980 638}
639
ec68e45b 640static u64 pxa27x_ohci_dma_mask = DMA_BIT_MASK(32);
641
642static struct resource pxa27x_resource_ohci[] = {
643 [0] = {
644 .start = 0x4C000000,
645 .end = 0x4C00ff6f,
646 .flags = IORESOURCE_MEM,
647 },
648 [1] = {
649 .start = IRQ_USBH1,
650 .end = IRQ_USBH1,
651 .flags = IORESOURCE_IRQ,
652 },
653};
654
655struct platform_device pxa27x_device_ohci = {
656 .name = "pxa27x-ohci",
657 .id = -1,
658 .dev = {
659 .dma_mask = &pxa27x_ohci_dma_mask,
660 .coherent_dma_mask = DMA_BIT_MASK(32),
661 },
662 .num_resources = ARRAY_SIZE(pxa27x_resource_ohci),
663 .resource = pxa27x_resource_ohci,
664};
665
666void __init pxa_set_ohci_info(struct pxaohci_platform_data *info)
667{
668 pxa_register_device(&pxa27x_device_ohci, info);
669}
a4553358
HZ		 670#endif /* CONFIG_PXA27x || CONFIG_PXA3xx */
671
49ea7fc0 672#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
a4553358
HZ		 673static struct resource pxa27x_resource_keypad[] = {
674 [0] = {
675 .start = 0x41500000,
676 .end = 0x4150004c,
677 .flags = IORESOURCE_MEM,
678 },
679 [1] = {
680 .start = IRQ_KEYPAD,
681 .end = IRQ_KEYPAD,
682 .flags = IORESOURCE_IRQ,
683 },
684};
685
686struct platform_device pxa27x_device_keypad = {
687 .name = "pxa27x-keypad",
688 .id = -1,
689 .resource = pxa27x_resource_keypad,
690 .num_resources = ARRAY_SIZE(pxa27x_resource_keypad),
691};
692
693void __init pxa_set_keypad_info(struct pxa27x_keypad_platform_data *info)
694{
695 pxa_register_device(&pxa27x_device_keypad, info);
696}
ec68e45b 697
8f58de7c 698static u64 pxa27x_ssp1_dma_mask = DMA_BIT_MASK(32);
699
700static struct resource pxa27x_resource_ssp1[] = {
701 [0] = {
702 .start = 0x41000000,
703 .end = 0x4100003f,
704 .flags = IORESOURCE_MEM,
705 },
706 [1] = {
707 .start = IRQ_SSP,
708 .end = IRQ_SSP,
709 .flags = IORESOURCE_IRQ,
710 },
8f58de7c 711};
712
713struct platform_device pxa27x_device_ssp1 = {
714 .name = "pxa27x-ssp",
715 .id = 0,
716 .dev = {
717 .dma_mask = &pxa27x_ssp1_dma_mask,
718 .coherent_dma_mask = DMA_BIT_MASK(32),
719 },
720 .resource = pxa27x_resource_ssp1,
721 .num_resources = ARRAY_SIZE(pxa27x_resource_ssp1),
722};
723
724static u64 pxa27x_ssp2_dma_mask = DMA_BIT_MASK(32);
725
726static struct resource pxa27x_resource_ssp2[] = {
727 [0] = {
728 .start = 0x41700000,
729 .end = 0x4170003f,
730 .flags = IORESOURCE_MEM,
731 },
732 [1] = {
733 .start = IRQ_SSP2,
734 .end = IRQ_SSP2,
735 .flags = IORESOURCE_IRQ,
736 },
8f58de7c 737};
738
739struct platform_device pxa27x_device_ssp2 = {
740 .name = "pxa27x-ssp",
741 .id = 1,
742 .dev = {
743 .dma_mask = &pxa27x_ssp2_dma_mask,
744 .coherent_dma_mask = DMA_BIT_MASK(32),
745 },
746 .resource = pxa27x_resource_ssp2,
747 .num_resources = ARRAY_SIZE(pxa27x_resource_ssp2),
748};
749
750static u64 pxa27x_ssp3_dma_mask = DMA_BIT_MASK(32);
751
752static struct resource pxa27x_resource_ssp3[] = {
753 [0] = {
754 .start = 0x41900000,
755 .end = 0x4190003f,
756 .flags = IORESOURCE_MEM,
757 },
758 [1] = {
759 .start = IRQ_SSP3,
760 .end = IRQ_SSP3,
761 .flags = IORESOURCE_IRQ,
762 },
8f58de7c 763};
764
765struct platform_device pxa27x_device_ssp3 = {
766 .name = "pxa27x-ssp",
767 .id = 2,
768 .dev = {
769 .dma_mask = &pxa27x_ssp3_dma_mask,
770 .coherent_dma_mask = DMA_BIT_MASK(32),
771 },
772 .resource = pxa27x_resource_ssp3,
773 .num_resources = ARRAY_SIZE(pxa27x_resource_ssp3),
774};
3f3acefb 775
75540c1a 776static struct resource pxa27x_resource_pwm0[] = {
777 [0] = {
778 .start = 0x40b00000,
779 .end = 0x40b0001f,
780 .flags = IORESOURCE_MEM,
781 },
782};
783
784struct platform_device pxa27x_device_pwm0 = {
785 .name = "pxa27x-pwm",
786 .id = 0,
787 .resource = pxa27x_resource_pwm0,
788 .num_resources = ARRAY_SIZE(pxa27x_resource_pwm0),
789};
790
791static struct resource pxa27x_resource_pwm1[] = {
792 [0] = {
793 .start = 0x40c00000,
794 .end = 0x40c0001f,
795 .flags = IORESOURCE_MEM,
796 },
797};
798
799struct platform_device pxa27x_device_pwm1 = {
800 .name = "pxa27x-pwm",
801 .id = 1,
802 .resource = pxa27x_resource_pwm1,
803 .num_resources = ARRAY_SIZE(pxa27x_resource_pwm1),
804};
49ea7fc0 805#endif /* CONFIG_PXA27x || CONFIG_PXA3xx */
8f58de7c 806
807#ifdef CONFIG_PXA3xx
8d33b055
BW		 808static struct resource pxa3xx_resources_mci2[] = {
809 [0] = {
810 .start = 0x42000000,
811 .end = 0x42000fff,
812 .flags = IORESOURCE_MEM,
813 },
814 [1] = {
815 .start = IRQ_MMC2,
816 .end = IRQ_MMC2,
817 .flags = IORESOURCE_IRQ,
818 },
8d33b055
BW		 819};
820
821struct platform_device pxa3xx_device_mci2 = {
822 .name = "pxa2xx-mci",
823 .id = 1,
824 .dev = {
825 .dma_mask = &pxamci_dmamask,
826 .coherent_dma_mask = 0xffffffff,
827 },
828 .num_resources = ARRAY_SIZE(pxa3xx_resources_mci2),
829 .resource = pxa3xx_resources_mci2,
830};
831
832void __init pxa3xx_set_mci2_info(struct pxamci_platform_data *info)
833{
834 pxa_register_device(&pxa3xx_device_mci2, info);
835}
836
5a1f21b1
BW		 837static struct resource pxa3xx_resources_mci3[] = {
838 [0] = {
839 .start = 0x42500000,
840 .end = 0x42500fff,
841 .flags = IORESOURCE_MEM,
842 },
843 [1] = {
844 .start = IRQ_MMC3,
845 .end = IRQ_MMC3,
846 .flags = IORESOURCE_IRQ,
847 },
5a1f21b1
BW		 848};
849
850struct platform_device pxa3xx_device_mci3 = {
851 .name = "pxa2xx-mci",
852 .id = 2,
853 .dev = {
854 .dma_mask = &pxamci_dmamask,
855 .coherent_dma_mask = 0xffffffff,
856 },
857 .num_resources = ARRAY_SIZE(pxa3xx_resources_mci3),
858 .resource = pxa3xx_resources_mci3,
859};
860
861void __init pxa3xx_set_mci3_info(struct pxamci_platform_data *info)
862{
863 pxa_register_device(&pxa3xx_device_mci3, info);
864}
865
a4553358
HZ		 866static struct resource pxa3xx_resources_gcu[] = {
867 {
868 .start = 0x54000000,
869 .end = 0x54000fff,
870 .flags = IORESOURCE_MEM,
871 },
872 {
873 .start = IRQ_GCU,
874 .end = IRQ_GCU,
875 .flags = IORESOURCE_IRQ,
876 },
877};
878
879static u64 pxa3xx_gcu_dmamask = DMA_BIT_MASK(32);
880
881struct platform_device pxa3xx_device_gcu = {
882 .name = "pxa3xx-gcu",
883 .id = -1,
884 .num_resources = ARRAY_SIZE(pxa3xx_resources_gcu),
885 .resource = pxa3xx_resources_gcu,
886 .dev = {
887 .dma_mask = &pxa3xx_gcu_dmamask,
888 .coherent_dma_mask = 0xffffffff,
889 },
890};
891
892#endif /* CONFIG_PXA3xx */
893
49ea7fc0 894#if defined(CONFIG_PXA3xx)
a4553358
HZ		 895static struct resource pxa3xx_resources_i2c_power[] = {
896 {
897 .start = 0x40f500c0,
898 .end = 0x40f500d3,
899 .flags = IORESOURCE_MEM,
900 }, {
901 .start = IRQ_PWRI2C,
902 .end = IRQ_PWRI2C,
903 .flags = IORESOURCE_IRQ,
904 },
905};
906
907struct platform_device pxa3xx_device_i2c_power = {
908 .name = "pxa3xx-pwri2c",
909 .id = 1,
910 .resource = pxa3xx_resources_i2c_power,
911 .num_resources = ARRAY_SIZE(pxa3xx_resources_i2c_power),
912};
913
9ae819a8
EM		 914static struct resource pxa3xx_resources_nand[] = {
915 [0] = {
916 .start = 0x43100000,
917 .end = 0x43100053,
918 .flags = IORESOURCE_MEM,
919 },
920 [1] = {
921 .start = IRQ_NAND,
922 .end = IRQ_NAND,
923 .flags = IORESOURCE_IRQ,
924 },
9ae819a8
EM		 925};
926
927static u64 pxa3xx_nand_dma_mask = DMA_BIT_MASK(32);
928
929struct platform_device pxa3xx_device_nand = {
930 .name = "pxa3xx-nand",
931 .id = -1,
932 .dev = {
933 .dma_mask = &pxa3xx_nand_dma_mask,
934 .coherent_dma_mask = DMA_BIT_MASK(32),
935 },
936 .num_resources = ARRAY_SIZE(pxa3xx_resources_nand),
937 .resource = pxa3xx_resources_nand,
938};
939
940void __init pxa3xx_set_nand_info(struct pxa3xx_nand_platform_data *info)
941{
942 pxa_register_device(&pxa3xx_device_nand, info);
943}
1ff2c33e 944
a4553358
HZ		 945static u64 pxa3xx_ssp4_dma_mask = DMA_BIT_MASK(32);
946
947static struct resource pxa3xx_resource_ssp4[] = {
948 [0] = {
949 .start = 0x41a00000,
950 .end = 0x41a0003f,
1ff2c33e
DM		 951 .flags = IORESOURCE_MEM,
952 },
a4553358
HZ		 953 [1] = {
954 .start = IRQ_SSP4,
955 .end = IRQ_SSP4,
1ff2c33e
DM		 956 .flags = IORESOURCE_IRQ,
957 },
958};
959
0da0e227
DM		 960/*
961 * PXA3xx SSP is basically equivalent to PXA27x.
962 * However, we need to register the device by the correct name in order to
963 * make the driver set the correct internal type, hence we provide specific
964 * platform_devices for each of them.
965 */
966struct platform_device pxa3xx_device_ssp1 = {
967 .name = "pxa3xx-ssp",
968 .id = 0,
969 .dev = {
970 .dma_mask = &pxa27x_ssp1_dma_mask,
971 .coherent_dma_mask = DMA_BIT_MASK(32),
972 },
973 .resource = pxa27x_resource_ssp1,
974 .num_resources = ARRAY_SIZE(pxa27x_resource_ssp1),
975};
976
977struct platform_device pxa3xx_device_ssp2 = {
978 .name = "pxa3xx-ssp",
979 .id = 1,
980 .dev = {
981 .dma_mask = &pxa27x_ssp2_dma_mask,
982 .coherent_dma_mask = DMA_BIT_MASK(32),
983 },
984 .resource = pxa27x_resource_ssp2,
985 .num_resources = ARRAY_SIZE(pxa27x_resource_ssp2),
986};
987
988struct platform_device pxa3xx_device_ssp3 = {
989 .name = "pxa3xx-ssp",
990 .id = 2,
991 .dev = {
992 .dma_mask = &pxa27x_ssp3_dma_mask,
993 .coherent_dma_mask = DMA_BIT_MASK(32),
994 },
995 .resource = pxa27x_resource_ssp3,
996 .num_resources = ARRAY_SIZE(pxa27x_resource_ssp3),
997};
998
a4553358 999struct platform_device pxa3xx_device_ssp4 = {
0da0e227 1000 .name = "pxa3xx-ssp",
a4553358 1001 .id = 3,
1ff2c33e 1002 .dev = {
a4553358
HZ		 1003 .dma_mask = &pxa3xx_ssp4_dma_mask,
1004 .coherent_dma_mask = DMA_BIT_MASK(32),
1ff2c33e 1005 },
a4553358
HZ		 1006 .resource = pxa3xx_resource_ssp4,
1007 .num_resources = ARRAY_SIZE(pxa3xx_resource_ssp4),
1ff2c33e 1008};
49ea7fc0 1009#endif /* CONFIG_PXA3xx */
e172274c 1010
157d2644
HZ		 1011struct resource pxa_resource_gpio[] = {
1012 {
1013 .start = 0x40e00000,
1014 .end = 0x40e0ffff,
1015 .flags = IORESOURCE_MEM,
1016 }, {
1017 .start = IRQ_GPIO0,
1018 .end = IRQ_GPIO0,
1019 .name = "gpio0",
1020 .flags = IORESOURCE_IRQ,
1021 }, {
1022 .start = IRQ_GPIO1,
1023 .end = IRQ_GPIO1,
1024 .name = "gpio1",
1025 .flags = IORESOURCE_IRQ,
1026 }, {
1027 .start = IRQ_GPIO_2_x,
1028 .end = IRQ_GPIO_2_x,
1029 .name = "gpio_mux",
1030 .flags = IORESOURCE_IRQ,
1031 },
1032};
1033
2cab0292
HZ		 1034struct platform_device pxa25x_device_gpio = {
1035#ifdef CONFIG_CPU_PXA26x
1036 .name = "pxa26x-gpio",
1037#else
1038 .name = "pxa25x-gpio",
1039#endif
1040 .id = -1,
1041 .num_resources = ARRAY_SIZE(pxa_resource_gpio),
1042 .resource = pxa_resource_gpio,
1043};
1044
1045struct platform_device pxa27x_device_gpio = {
1046 .name = "pxa27x-gpio",
1047 .id = -1,
1048 .num_resources = ARRAY_SIZE(pxa_resource_gpio),
1049 .resource = pxa_resource_gpio,
1050};
1051
1052struct platform_device pxa3xx_device_gpio = {
1053 .name = "pxa3xx-gpio",
1054 .id = -1,
1055 .num_resources = ARRAY_SIZE(pxa_resource_gpio),
1056 .resource = pxa_resource_gpio,
1057};
1058
1059struct platform_device pxa93x_device_gpio = {
1060 .name = "pxa93x-gpio",
157d2644
HZ		 1061 .id = -1,
1062 .num_resources = ARRAY_SIZE(pxa_resource_gpio),
1063 .resource = pxa_resource_gpio,
1064};
1065
e172274c
GL		 1066/* pxa2xx-spi platform-device ID equals respective SSP platform-device ID + 1.
1067 * See comment in arch/arm/mach-pxa/ssp.c::ssp_probe() */
51eea52d 1068void __init pxa2xx_set_spi_info(unsigned id, struct pxa2xx_spi_controller *info)
e172274c
GL		 1069{
1070 struct platform_device *pd;
1071
1072 pd = platform_device_alloc("pxa2xx-spi", id);
1073 if (pd == NULL) {
1074 printk(KERN_ERR "pxa2xx-spi: failed to allocate device id %d\n",
1075 id);
1076 return;
1077 }
1078
1079 pd->dev.platform_data = info;
1080 platform_device_add(pd);
1081}
4be0856f 1082
4be0856f
RJ		 1083static struct resource pxa_dma_resource[] = {
1084 [0] = {
1085 .start = 0x40000000,
1086 .end = 0x4000ffff,
1087 .flags = IORESOURCE_MEM,
1088 },
1089 [1] = {
1090 .start = IRQ_DMA,
1091 .end = IRQ_DMA,
1092 .flags = IORESOURCE_IRQ,
1093 },
1094};
1095
1096static u64 pxadma_dmamask = 0xffffffffUL;
1097
1098static struct platform_device pxa2xx_pxa_dma = {
1099 .name = "pxa-dma",
1100 .id = 0,
1101 .dev = {
1102 .dma_mask = &pxadma_dmamask,
1103 .coherent_dma_mask = 0xffffffff,
1104 },
1105 .num_resources = ARRAY_SIZE(pxa_dma_resource),
1106 .resource = pxa_dma_resource,
1107};
1108
1da10c17 1109void __init pxa2xx_set_dmac_info(struct mmp_dma_platdata *dma_pdata)
4be0856f 1110{
1da10c17 1111 pxa_register_device(&pxa2xx_pxa_dma, dma_pdata);
4be0856f 1112}
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