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Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * linux/arch/arm/mach-pxa/mainstone.c | |
3 | * | |
4 | * Support for the Intel HCDDBBVA0 Development Platform. | |
5 | * (go figure how they came up with such name...) | |
6 | * | |
7 | * Author: Nicolas Pitre | |
8 | * Created: Nov 05, 2002 | |
9 | * Copyright: MontaVista Software Inc. | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or modify | |
12 | * it under the terms of the GNU General Public License version 2 as | |
13 | * published by the Free Software Foundation. | |
14 | */ | |
2f8163ba | 15 | #include <linux/gpio.h> |
27768863 | 16 | #include <linux/gpio/machine.h> |
1da177e4 | 17 | #include <linux/init.h> |
d052d1be | 18 | #include <linux/platform_device.h> |
2eaa03b5 | 19 | #include <linux/syscore_ops.h> |
1da177e4 LT |
20 | #include <linux/interrupt.h> |
21 | #include <linux/sched.h> | |
22 | #include <linux/bitops.h> | |
23 | #include <linux/fb.h> | |
74ec71e1 TP |
24 | #include <linux/ioport.h> |
25 | #include <linux/mtd/mtd.h> | |
26 | #include <linux/mtd/partitions.h> | |
450d2874 | 27 | #include <linux/input.h> |
28 | #include <linux/gpio_keys.h> | |
402e4909 | 29 | #include <linux/pwm_backlight.h> |
38fd6c38 | 30 | #include <linux/smc91x.h> |
b459396e | 31 | #include <linux/i2c/pxa-i2c.h> |
55f5d8ec BW |
32 | #include <linux/slab.h> |
33 | #include <linux/leds.h> | |
1da177e4 LT |
34 | |
35 | #include <asm/types.h> | |
36 | #include <asm/setup.h> | |
37 | #include <asm/memory.h> | |
38 | #include <asm/mach-types.h> | |
a09e64fb | 39 | #include <mach/hardware.h> |
1da177e4 | 40 | #include <asm/irq.h> |
74ec71e1 | 41 | #include <asm/sizes.h> |
1da177e4 LT |
42 | |
43 | #include <asm/mach/arch.h> | |
44 | #include <asm/mach/map.h> | |
45 | #include <asm/mach/irq.h> | |
74ec71e1 | 46 | #include <asm/mach/flash.h> |
1da177e4 | 47 | |
51c62982 | 48 | #include <mach/pxa27x.h> |
a09e64fb RK |
49 | #include <mach/mainstone.h> |
50 | #include <mach/audio.h> | |
293b2da1 AB |
51 | #include <linux/platform_data/video-pxafb.h> |
52 | #include <linux/platform_data/mmc-pxamci.h> | |
53 | #include <linux/platform_data/irda-pxaficp.h> | |
54 | #include <linux/platform_data/usb-ohci-pxa27x.h> | |
55 | #include <linux/platform_data/keypad-pxa27x.h> | |
ad68bb9f | 56 | #include <mach/smemc.h> |
1da177e4 LT |
57 | |
58 | #include "generic.h" | |
46c41e62 | 59 | #include "devices.h" |
1da177e4 | 60 | |
fef06d27 | 61 | static unsigned long mainstone_pin_config[] = { |
62 | /* Chip Select */ | |
63 | GPIO15_nCS_1, | |
64 | ||
65 | /* LCD - 16bpp Active TFT */ | |
bedbda97 | 66 | GPIOxx_LCD_TFT_16BPP, |
fef06d27 | 67 | GPIO16_PWM0_OUT, /* Backlight */ |
68 | ||
69 | /* MMC */ | |
70 | GPIO32_MMC_CLK, | |
71 | GPIO112_MMC_CMD, | |
72 | GPIO92_MMC_DAT_0, | |
73 | GPIO109_MMC_DAT_1, | |
74 | GPIO110_MMC_DAT_2, | |
75 | GPIO111_MMC_DAT_3, | |
76 | ||
77 | /* USB Host Port 1 */ | |
78 | GPIO88_USBH1_PWR, | |
79 | GPIO89_USBH1_PEN, | |
80 | ||
81 | /* PC Card */ | |
82 | GPIO48_nPOE, | |
83 | GPIO49_nPWE, | |
84 | GPIO50_nPIOR, | |
85 | GPIO51_nPIOW, | |
86 | GPIO85_nPCE_1, | |
87 | GPIO54_nPCE_2, | |
88 | GPIO79_PSKTSEL, | |
89 | GPIO55_nPREG, | |
90 | GPIO56_nPWAIT, | |
91 | GPIO57_nIOIS16, | |
92 | ||
93 | /* AC97 */ | |
c11b6a42 EM |
94 | GPIO28_AC97_BITCLK, |
95 | GPIO29_AC97_SDATA_IN_0, | |
96 | GPIO30_AC97_SDATA_OUT, | |
97 | GPIO31_AC97_SYNC, | |
fef06d27 | 98 | GPIO45_AC97_SYSCLK, |
99 | ||
100 | /* Keypad */ | |
b18773d5 EM |
101 | GPIO93_KP_DKIN_0, |
102 | GPIO94_KP_DKIN_1, | |
103 | GPIO95_KP_DKIN_2, | |
fef06d27 | 104 | GPIO100_KP_MKIN_0 | WAKEUP_ON_LEVEL_HIGH, |
105 | GPIO101_KP_MKIN_1 | WAKEUP_ON_LEVEL_HIGH, | |
106 | GPIO102_KP_MKIN_2 | WAKEUP_ON_LEVEL_HIGH, | |
107 | GPIO97_KP_MKIN_3 | WAKEUP_ON_LEVEL_HIGH, | |
108 | GPIO98_KP_MKIN_4 | WAKEUP_ON_LEVEL_HIGH, | |
109 | GPIO99_KP_MKIN_5 | WAKEUP_ON_LEVEL_HIGH, | |
110 | GPIO103_KP_MKOUT_0, | |
111 | GPIO104_KP_MKOUT_1, | |
112 | GPIO105_KP_MKOUT_2, | |
113 | GPIO106_KP_MKOUT_3, | |
114 | GPIO107_KP_MKOUT_4, | |
115 | GPIO108_KP_MKOUT_5, | |
116 | GPIO96_KP_MKOUT_6, | |
117 | ||
6f584cfa EM |
118 | /* I2C */ |
119 | GPIO117_I2C_SCL, | |
120 | GPIO118_I2C_SDA, | |
121 | ||
fef06d27 | 122 | /* GPIO */ |
123 | GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH, | |
124 | }; | |
1da177e4 | 125 | |
1da177e4 LT |
126 | static struct resource smc91x_resources[] = { |
127 | [0] = { | |
128 | .start = (MST_ETH_PHYS + 0x300), | |
129 | .end = (MST_ETH_PHYS + 0xfffff), | |
130 | .flags = IORESOURCE_MEM, | |
131 | }, | |
132 | [1] = { | |
133 | .start = MAINSTONE_IRQ(3), | |
134 | .end = MAINSTONE_IRQ(3), | |
e7b3dc7e | 135 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, |
1da177e4 LT |
136 | } |
137 | }; | |
138 | ||
38fd6c38 EM |
139 | static struct smc91x_platdata mainstone_smc91x_info = { |
140 | .flags = SMC91X_USE_8BIT | SMC91X_USE_16BIT | SMC91X_USE_32BIT | | |
141 | SMC91X_NOWAIT | SMC91X_USE_DMA, | |
142 | }; | |
143 | ||
1da177e4 LT |
144 | static struct platform_device smc91x_device = { |
145 | .name = "smc91x", | |
146 | .id = 0, | |
147 | .num_resources = ARRAY_SIZE(smc91x_resources), | |
148 | .resource = smc91x_resources, | |
38fd6c38 EM |
149 | .dev = { |
150 | .platform_data = &mainstone_smc91x_info, | |
151 | }, | |
1da177e4 LT |
152 | }; |
153 | ||
f7cbb7fc | 154 | static int mst_audio_startup(struct snd_pcm_substream *substream, void *priv) |
1da177e4 LT |
155 | { |
156 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) | |
157 | MST_MSCWR2 &= ~MST_MSCWR2_AC97_SPKROFF; | |
158 | return 0; | |
159 | } | |
160 | ||
f7cbb7fc | 161 | static void mst_audio_shutdown(struct snd_pcm_substream *substream, void *priv) |
1da177e4 LT |
162 | { |
163 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) | |
164 | MST_MSCWR2 |= MST_MSCWR2_AC97_SPKROFF; | |
165 | } | |
166 | ||
167 | static long mst_audio_suspend_mask; | |
168 | ||
169 | static void mst_audio_suspend(void *priv) | |
170 | { | |
171 | mst_audio_suspend_mask = MST_MSCWR2; | |
172 | MST_MSCWR2 |= MST_MSCWR2_AC97_SPKROFF; | |
173 | } | |
174 | ||
175 | static void mst_audio_resume(void *priv) | |
176 | { | |
177 | MST_MSCWR2 &= mst_audio_suspend_mask | ~MST_MSCWR2_AC97_SPKROFF; | |
178 | } | |
179 | ||
180 | static pxa2xx_audio_ops_t mst_audio_ops = { | |
181 | .startup = mst_audio_startup, | |
182 | .shutdown = mst_audio_shutdown, | |
183 | .suspend = mst_audio_suspend, | |
184 | .resume = mst_audio_resume, | |
185 | }; | |
186 | ||
74ec71e1 TP |
187 | static struct resource flash_resources[] = { |
188 | [0] = { | |
189 | .start = PXA_CS0_PHYS, | |
190 | .end = PXA_CS0_PHYS + SZ_64M - 1, | |
191 | .flags = IORESOURCE_MEM, | |
192 | }, | |
193 | [1] = { | |
194 | .start = PXA_CS1_PHYS, | |
195 | .end = PXA_CS1_PHYS + SZ_64M - 1, | |
196 | .flags = IORESOURCE_MEM, | |
197 | }, | |
198 | }; | |
199 | ||
200 | static struct mtd_partition mainstoneflash0_partitions[] = { | |
201 | { | |
202 | .name = "Bootloader", | |
203 | .size = 0x00040000, | |
204 | .offset = 0, | |
205 | .mask_flags = MTD_WRITEABLE /* force read-only */ | |
206 | },{ | |
207 | .name = "Kernel", | |
208 | .size = 0x00400000, | |
209 | .offset = 0x00040000, | |
210 | },{ | |
211 | .name = "Filesystem", | |
212 | .size = MTDPART_SIZ_FULL, | |
213 | .offset = 0x00440000 | |
214 | } | |
215 | }; | |
216 | ||
217 | static struct flash_platform_data mst_flash_data[2] = { | |
218 | { | |
219 | .map_name = "cfi_probe", | |
220 | .parts = mainstoneflash0_partitions, | |
221 | .nr_parts = ARRAY_SIZE(mainstoneflash0_partitions), | |
222 | }, { | |
223 | .map_name = "cfi_probe", | |
224 | .parts = NULL, | |
225 | .nr_parts = 0, | |
226 | } | |
227 | }; | |
228 | ||
229 | static struct platform_device mst_flash_device[2] = { | |
230 | { | |
231 | .name = "pxa2xx-flash", | |
232 | .id = 0, | |
233 | .dev = { | |
234 | .platform_data = &mst_flash_data[0], | |
235 | }, | |
236 | .resource = &flash_resources[0], | |
237 | .num_resources = 1, | |
238 | }, | |
239 | { | |
240 | .name = "pxa2xx-flash", | |
241 | .id = 1, | |
242 | .dev = { | |
243 | .platform_data = &mst_flash_data[1], | |
244 | }, | |
245 | .resource = &flash_resources[1], | |
246 | .num_resources = 1, | |
247 | }, | |
248 | }; | |
249 | ||
402e4909 RK |
250 | #if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE) |
251 | static struct platform_pwm_backlight_data mainstone_backlight_data = { | |
252 | .pwm_id = 0, | |
253 | .max_brightness = 1023, | |
254 | .dft_brightness = 1023, | |
255 | .pwm_period_ns = 78770, | |
db01120c | 256 | .enable_gpio = -1, |
402e4909 | 257 | }; |
3777f774 | 258 | |
402e4909 RK |
259 | static struct platform_device mainstone_backlight_device = { |
260 | .name = "pwm-backlight", | |
261 | .dev = { | |
262 | .parent = &pxa27x_device_pwm0.dev, | |
263 | .platform_data = &mainstone_backlight_data, | |
264 | }, | |
3777f774 RK |
265 | }; |
266 | ||
267 | static void __init mainstone_backlight_register(void) | |
268 | { | |
402e4909 RK |
269 | int ret = platform_device_register(&mainstone_backlight_device); |
270 | if (ret) | |
271 | printk(KERN_ERR "mainstone: failed to register backlight device: %d\n", ret); | |
1da177e4 | 272 | } |
3777f774 RK |
273 | #else |
274 | #define mainstone_backlight_register() do { } while (0) | |
275 | #endif | |
1da177e4 | 276 | |
d14b272b | 277 | static struct pxafb_mode_info toshiba_ltm04c380k_mode = { |
1da177e4 LT |
278 | .pixclock = 50000, |
279 | .xres = 640, | |
280 | .yres = 480, | |
281 | .bpp = 16, | |
282 | .hsync_len = 1, | |
283 | .left_margin = 0x9f, | |
284 | .right_margin = 1, | |
285 | .vsync_len = 44, | |
286 | .upper_margin = 0, | |
287 | .lower_margin = 0, | |
288 | .sync = FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, | |
1da177e4 LT |
289 | }; |
290 | ||
d14b272b | 291 | static struct pxafb_mode_info toshiba_ltm035a776c_mode = { |
1da177e4 LT |
292 | .pixclock = 110000, |
293 | .xres = 240, | |
294 | .yres = 320, | |
295 | .bpp = 16, | |
296 | .hsync_len = 4, | |
297 | .left_margin = 8, | |
298 | .right_margin = 20, | |
299 | .vsync_len = 3, | |
300 | .upper_margin = 1, | |
301 | .lower_margin = 10, | |
302 | .sync = FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, | |
d14b272b RP |
303 | }; |
304 | ||
305 | static struct pxafb_mach_info mainstone_pxafb_info = { | |
306 | .num_modes = 1, | |
0454bd09 | 307 | .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL, |
1da177e4 LT |
308 | }; |
309 | ||
40220c1a | 310 | static int mainstone_mci_init(struct device *dev, irq_handler_t mstone_detect_int, void *data) |
1da177e4 LT |
311 | { |
312 | int err; | |
313 | ||
1da177e4 LT |
314 | /* make sure SD/Memory Stick multiplexer's signals |
315 | * are routed to MMC controller | |
316 | */ | |
317 | MST_MSCWR1 &= ~MST_MSCWR1_MS_SEL; | |
318 | ||
ed7936f9 | 319 | err = request_irq(MAINSTONE_MMC_IRQ, mstone_detect_int, 0, |
1da177e4 | 320 | "MMC card detect", data); |
2687bd38 | 321 | if (err) |
1da177e4 | 322 | printk(KERN_ERR "mainstone_mci_init: MMC/SD: can't request MMC card detect IRQ\n"); |
1da177e4 | 323 | |
2687bd38 | 324 | return err; |
1da177e4 LT |
325 | } |
326 | ||
a829abf8 | 327 | static int mainstone_mci_setpower(struct device *dev, unsigned int vdd) |
1da177e4 LT |
328 | { |
329 | struct pxamci_platform_data* p_d = dev->platform_data; | |
330 | ||
331 | if (( 1 << vdd) & p_d->ocr_mask) { | |
8e86f427 | 332 | printk(KERN_DEBUG "%s: on\n", __func__); |
1da177e4 LT |
333 | MST_MSCWR1 |= MST_MSCWR1_MMC_ON; |
334 | MST_MSCWR1 &= ~MST_MSCWR1_MS_SEL; | |
335 | } else { | |
8e86f427 | 336 | printk(KERN_DEBUG "%s: off\n", __func__); |
1da177e4 LT |
337 | MST_MSCWR1 &= ~MST_MSCWR1_MMC_ON; |
338 | } | |
a829abf8 | 339 | return 0; |
1da177e4 LT |
340 | } |
341 | ||
342 | static void mainstone_mci_exit(struct device *dev, void *data) | |
343 | { | |
344 | free_irq(MAINSTONE_MMC_IRQ, data); | |
345 | } | |
346 | ||
347 | static struct pxamci_platform_data mainstone_mci_platform_data = { | |
7a648256 RJ |
348 | .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, |
349 | .init = mainstone_mci_init, | |
350 | .setpower = mainstone_mci_setpower, | |
351 | .exit = mainstone_mci_exit, | |
352 | .gpio_card_detect = -1, | |
353 | .gpio_card_ro = -1, | |
354 | .gpio_power = -1, | |
1da177e4 LT |
355 | }; |
356 | ||
6f475c01 NP |
357 | static void mainstone_irda_transceiver_mode(struct device *dev, int mode) |
358 | { | |
359 | unsigned long flags; | |
360 | ||
361 | local_irq_save(flags); | |
362 | if (mode & IR_SIRMODE) { | |
363 | MST_MSCWR1 &= ~MST_MSCWR1_IRDA_FIR; | |
364 | } else if (mode & IR_FIRMODE) { | |
365 | MST_MSCWR1 |= MST_MSCWR1_IRDA_FIR; | |
366 | } | |
0fc3ff31 | 367 | pxa2xx_transceiver_mode(dev, mode); |
6f475c01 NP |
368 | if (mode & IR_OFF) { |
369 | MST_MSCWR1 = (MST_MSCWR1 & ~MST_MSCWR1_IRDA_MASK) | MST_MSCWR1_IRDA_OFF; | |
370 | } else { | |
371 | MST_MSCWR1 = (MST_MSCWR1 & ~MST_MSCWR1_IRDA_MASK) | MST_MSCWR1_IRDA_FULL; | |
372 | } | |
373 | local_irq_restore(flags); | |
374 | } | |
375 | ||
376 | static struct pxaficp_platform_data mainstone_ficp_platform_data = { | |
c4bd0172 MV |
377 | .gpio_pwdown = -1, |
378 | .transceiver_cap = IR_SIRMODE | IR_FIRMODE | IR_OFF, | |
379 | .transceiver_mode = mainstone_irda_transceiver_mode, | |
6f475c01 NP |
380 | }; |
381 | ||
450d2874 | 382 | static struct gpio_keys_button gpio_keys_button[] = { |
383 | [0] = { | |
384 | .desc = "wakeup", | |
385 | .code = KEY_SUSPEND, | |
386 | .type = EV_KEY, | |
387 | .gpio = 1, | |
388 | .wakeup = 1, | |
389 | }, | |
390 | }; | |
391 | ||
392 | static struct gpio_keys_platform_data mainstone_gpio_keys = { | |
393 | .buttons = gpio_keys_button, | |
394 | .nbuttons = 1, | |
395 | }; | |
396 | ||
397 | static struct platform_device mst_gpio_keys_device = { | |
398 | .name = "gpio-keys", | |
399 | .id = -1, | |
400 | .dev = { | |
401 | .platform_data = &mainstone_gpio_keys, | |
402 | }, | |
403 | }; | |
404 | ||
27768863 RJ |
405 | static struct resource mst_cplds_resources[] = { |
406 | [0] = { | |
407 | .start = MST_FPGA_PHYS + 0xc0, | |
408 | .end = MST_FPGA_PHYS + 0xe0 - 1, | |
409 | .flags = IORESOURCE_MEM, | |
410 | }, | |
411 | [1] = { | |
412 | .start = PXA_GPIO_TO_IRQ(0), | |
413 | .end = PXA_GPIO_TO_IRQ(0), | |
414 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE, | |
415 | }, | |
416 | [2] = { | |
417 | .start = MAINSTONE_IRQ(0), | |
418 | .end = MAINSTONE_IRQ(15), | |
419 | .flags = IORESOURCE_IRQ, | |
420 | }, | |
421 | }; | |
422 | ||
423 | static struct platform_device mst_cplds_device = { | |
424 | .name = "pxa_cplds_irqs", | |
425 | .id = -1, | |
426 | .resource = &mst_cplds_resources[0], | |
427 | .num_resources = 3, | |
428 | }; | |
429 | ||
74ec71e1 TP |
430 | static struct platform_device *platform_devices[] __initdata = { |
431 | &smc91x_device, | |
74ec71e1 TP |
432 | &mst_flash_device[0], |
433 | &mst_flash_device[1], | |
450d2874 | 434 | &mst_gpio_keys_device, |
27768863 | 435 | &mst_cplds_device, |
74ec71e1 TP |
436 | }; |
437 | ||
81f280e2 RP |
438 | static struct pxaohci_platform_data mainstone_ohci_platform_data = { |
439 | .port_mode = PMM_PERPORT_MODE, | |
097b5334 | 440 | .flags = ENABLE_PORT_ALL | POWER_CONTROL_LOW | POWER_SENSE_LOW, |
81f280e2 RP |
441 | }; |
442 | ||
36caeb4e | 443 | #if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE) |
0a085a94 | 444 | static const unsigned int mainstone_matrix_keys[] = { |
55c26e40 | 445 | KEY(0, 0, KEY_A), KEY(1, 0, KEY_B), KEY(2, 0, KEY_C), |
446 | KEY(3, 0, KEY_D), KEY(4, 0, KEY_E), KEY(5, 0, KEY_F), | |
447 | KEY(0, 1, KEY_G), KEY(1, 1, KEY_H), KEY(2, 1, KEY_I), | |
448 | KEY(3, 1, KEY_J), KEY(4, 1, KEY_K), KEY(5, 1, KEY_L), | |
449 | KEY(0, 2, KEY_M), KEY(1, 2, KEY_N), KEY(2, 2, KEY_O), | |
450 | KEY(3, 2, KEY_P), KEY(4, 2, KEY_Q), KEY(5, 2, KEY_R), | |
451 | KEY(0, 3, KEY_S), KEY(1, 3, KEY_T), KEY(2, 3, KEY_U), | |
452 | KEY(3, 3, KEY_V), KEY(4, 3, KEY_W), KEY(5, 3, KEY_X), | |
453 | KEY(2, 4, KEY_Y), KEY(3, 4, KEY_Z), | |
454 | ||
455 | KEY(0, 4, KEY_DOT), /* . */ | |
456 | KEY(1, 4, KEY_CLOSE), /* @ */ | |
457 | KEY(4, 4, KEY_SLASH), | |
458 | KEY(5, 4, KEY_BACKSLASH), | |
459 | KEY(0, 5, KEY_HOME), | |
460 | KEY(1, 5, KEY_LEFTSHIFT), | |
461 | KEY(2, 5, KEY_SPACE), | |
462 | KEY(3, 5, KEY_SPACE), | |
463 | KEY(4, 5, KEY_ENTER), | |
464 | KEY(5, 5, KEY_BACKSPACE), | |
465 | ||
466 | KEY(0, 6, KEY_UP), | |
467 | KEY(1, 6, KEY_DOWN), | |
468 | KEY(2, 6, KEY_LEFT), | |
469 | KEY(3, 6, KEY_RIGHT), | |
470 | KEY(4, 6, KEY_SELECT), | |
471 | }; | |
472 | ||
0a085a94 CX |
473 | static struct matrix_keymap_data mainstone_matrix_keymap_data = { |
474 | .keymap = mainstone_matrix_keys, | |
475 | .keymap_size = ARRAY_SIZE(mainstone_matrix_keys), | |
476 | }; | |
477 | ||
55c26e40 | 478 | struct pxa27x_keypad_platform_data mainstone_keypad_info = { |
479 | .matrix_key_rows = 6, | |
480 | .matrix_key_cols = 7, | |
0a085a94 | 481 | .matrix_keymap_data = &mainstone_matrix_keymap_data, |
55c26e40 | 482 | |
483 | .enable_rotary0 = 1, | |
484 | .rotary0_up_key = KEY_UP, | |
485 | .rotary0_down_key = KEY_DOWN, | |
486 | ||
487 | .debounce_interval = 30, | |
488 | }; | |
489 | ||
490 | static void __init mainstone_init_keypad(void) | |
491 | { | |
492 | pxa_set_keypad_info(&mainstone_keypad_info); | |
493 | } | |
494 | #else | |
495 | static inline void mainstone_init_keypad(void) {} | |
496 | #endif | |
497 | ||
1da177e4 LT |
498 | static void __init mainstone_init(void) |
499 | { | |
74ec71e1 TP |
500 | int SW7 = 0; /* FIXME: get from SCR (Mst doc section 3.2.1.1) */ |
501 | ||
fef06d27 | 502 | pxa2xx_mfp_config(ARRAY_AND_SIZE(mainstone_pin_config)); |
503 | ||
cc155c6f RK |
504 | pxa_set_ffuart_info(NULL); |
505 | pxa_set_btuart_info(NULL); | |
506 | pxa_set_stuart_info(NULL); | |
507 | ||
ad68bb9f | 508 | mst_flash_data[0].width = (__raw_readl(BOOT_DEF) & 1) ? 2 : 4; |
74ec71e1 TP |
509 | mst_flash_data[1].width = 4; |
510 | ||
511 | /* Compensate for SW7 which swaps the flash banks */ | |
512 | mst_flash_data[SW7].name = "processor-flash"; | |
513 | mst_flash_data[SW7 ^ 1].name = "mainboard-flash"; | |
514 | ||
515 | printk(KERN_NOTICE "Mainstone configured to boot from %s\n", | |
516 | mst_flash_data[0].name); | |
517 | ||
5b2e98cd JH |
518 | /* system bus arbiter setting |
519 | * - Core_Park | |
520 | * - LCD_wt:DMA_wt:CORE_Wt = 2:3:4 | |
521 | */ | |
522 | ARB_CNTRL = ARB_CORE_PARK | 0x234; | |
523 | ||
74ec71e1 | 524 | platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); |
1da177e4 LT |
525 | |
526 | /* reading Mainstone's "Virtual Configuration Register" | |
527 | might be handy to select LCD type here */ | |
528 | if (0) | |
d14b272b | 529 | mainstone_pxafb_info.modes = &toshiba_ltm04c380k_mode; |
1da177e4 | 530 | else |
d14b272b RP |
531 | mainstone_pxafb_info.modes = &toshiba_ltm035a776c_mode; |
532 | ||
4321e1a1 | 533 | pxa_set_fb_info(NULL, &mainstone_pxafb_info); |
3777f774 | 534 | mainstone_backlight_register(); |
1da177e4 LT |
535 | |
536 | pxa_set_mci_info(&mainstone_mci_platform_data); | |
6f475c01 | 537 | pxa_set_ficp_info(&mainstone_ficp_platform_data); |
81f280e2 | 538 | pxa_set_ohci_info(&mainstone_ohci_platform_data); |
835e7f1c | 539 | pxa_set_i2c_info(NULL); |
9f19d638 | 540 | pxa_set_ac97_info(&mst_audio_ops); |
55c26e40 | 541 | |
542 | mainstone_init_keypad(); | |
1da177e4 LT |
543 | } |
544 | ||
545 | ||
546 | static struct map_desc mainstone_io_desc[] __initdata = { | |
6f9182eb DS |
547 | { /* CPLD */ |
548 | .virtual = MST_FPGA_VIRT, | |
549 | .pfn = __phys_to_pfn(MST_FPGA_PHYS), | |
550 | .length = 0x00100000, | |
551 | .type = MT_DEVICE | |
552 | } | |
1da177e4 LT |
553 | }; |
554 | ||
555 | static void __init mainstone_map_io(void) | |
556 | { | |
851982c1 | 557 | pxa27x_map_io(); |
1da177e4 LT |
558 | iotable_init(mainstone_io_desc, ARRAY_SIZE(mainstone_io_desc)); |
559 | ||
8775420d TP |
560 | /* for use I SRAM as framebuffer. */ |
561 | PSLR |= 0xF04; | |
562 | PCFR = 0x66; | |
1da177e4 LT |
563 | } |
564 | ||
55f5d8ec BW |
565 | /* |
566 | * Driver for the 8 discrete LEDs available for general use: | |
567 | * Note: bits [15-8] are used to enable/blank the 8 7 segment hex displays | |
568 | * so be sure to not monkey with them here. | |
569 | */ | |
570 | ||
571 | #if defined(CONFIG_NEW_LEDS) && defined(CONFIG_LEDS_CLASS) | |
572 | struct mainstone_led { | |
573 | struct led_classdev cdev; | |
574 | u8 mask; | |
575 | }; | |
576 | ||
577 | /* | |
578 | * The triggers lines up below will only be used if the | |
579 | * LED triggers are compiled in. | |
580 | */ | |
581 | static const struct { | |
582 | const char *name; | |
583 | const char *trigger; | |
584 | } mainstone_leds[] = { | |
585 | { "mainstone:D28", "default-on", }, | |
586 | { "mainstone:D27", "cpu0", }, | |
587 | { "mainstone:D26", "heartbeat" }, | |
588 | { "mainstone:D25", }, | |
589 | { "mainstone:D24", }, | |
590 | { "mainstone:D23", }, | |
591 | { "mainstone:D22", }, | |
592 | { "mainstone:D21", }, | |
593 | }; | |
594 | ||
595 | static void mainstone_led_set(struct led_classdev *cdev, | |
596 | enum led_brightness b) | |
597 | { | |
598 | struct mainstone_led *led = container_of(cdev, | |
599 | struct mainstone_led, cdev); | |
600 | u32 reg = MST_LEDCTRL; | |
601 | ||
602 | if (b != LED_OFF) | |
603 | reg |= led->mask; | |
604 | else | |
605 | reg &= ~led->mask; | |
606 | ||
607 | MST_LEDCTRL = reg; | |
608 | } | |
609 | ||
610 | static enum led_brightness mainstone_led_get(struct led_classdev *cdev) | |
611 | { | |
612 | struct mainstone_led *led = container_of(cdev, | |
613 | struct mainstone_led, cdev); | |
614 | u32 reg = MST_LEDCTRL; | |
615 | ||
616 | return (reg & led->mask) ? LED_FULL : LED_OFF; | |
617 | } | |
618 | ||
619 | static int __init mainstone_leds_init(void) | |
620 | { | |
621 | int i; | |
622 | ||
623 | if (!machine_is_mainstone()) | |
624 | return -ENODEV; | |
625 | ||
626 | /* All ON */ | |
627 | MST_LEDCTRL |= 0xff; | |
628 | for (i = 0; i < ARRAY_SIZE(mainstone_leds); i++) { | |
629 | struct mainstone_led *led; | |
630 | ||
631 | led = kzalloc(sizeof(*led), GFP_KERNEL); | |
632 | if (!led) | |
633 | break; | |
634 | ||
635 | led->cdev.name = mainstone_leds[i].name; | |
636 | led->cdev.brightness_set = mainstone_led_set; | |
637 | led->cdev.brightness_get = mainstone_led_get; | |
638 | led->cdev.default_trigger = mainstone_leds[i].trigger; | |
639 | led->mask = BIT(i); | |
640 | ||
641 | if (led_classdev_register(NULL, &led->cdev) < 0) { | |
642 | kfree(led); | |
643 | break; | |
644 | } | |
645 | } | |
646 | ||
647 | return 0; | |
648 | } | |
649 | ||
650 | /* | |
651 | * Since we may have triggers on any subsystem, defer registration | |
652 | * until after subsystem_init. | |
653 | */ | |
654 | fs_initcall(mainstone_leds_init); | |
655 | #endif | |
656 | ||
1da177e4 | 657 | MACHINE_START(MAINSTONE, "Intel HCDDBBVA0 Development Platform (aka Mainstone)") |
e9dea0c6 | 658 | /* Maintainer: MontaVista Software Inc. */ |
7375aba6 | 659 | .atag_offset = 0x100, /* BLOB boot parameter setting */ |
e9dea0c6 | 660 | .map_io = mainstone_map_io, |
6ac6b817 | 661 | .nr_irqs = MAINSTONE_NR_IRQS, |
27768863 | 662 | .init_irq = pxa27x_init_irq, |
8a97ae2f | 663 | .handle_irq = pxa27x_handle_irq, |
6bb27d73 | 664 | .init_time = pxa_timer_init, |
e9dea0c6 | 665 | .init_machine = mainstone_init, |
271a74fc | 666 | .restart = pxa_restart, |
1da177e4 | 667 | MACHINE_END |