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1da177e4 LT |
1 | /* |
2 | * linux/arch/arm/mach-pxa/mainstone.c | |
3 | * | |
4 | * Support for the Intel HCDDBBVA0 Development Platform. | |
5 | * (go figure how they came up with such name...) | |
6 | * | |
7 | * Author: Nicolas Pitre | |
8 | * Created: Nov 05, 2002 | |
9 | * Copyright: MontaVista Software Inc. | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or modify | |
12 | * it under the terms of the GNU General Public License version 2 as | |
13 | * published by the Free Software Foundation. | |
14 | */ | |
15 | ||
16 | #include <linux/init.h> | |
d052d1be | 17 | #include <linux/platform_device.h> |
22f11c4e | 18 | #include <linux/sysdev.h> |
1da177e4 LT |
19 | #include <linux/interrupt.h> |
20 | #include <linux/sched.h> | |
21 | #include <linux/bitops.h> | |
22 | #include <linux/fb.h> | |
74ec71e1 TP |
23 | #include <linux/ioport.h> |
24 | #include <linux/mtd/mtd.h> | |
25 | #include <linux/mtd/partitions.h> | |
450d2874 | 26 | #include <linux/input.h> |
27 | #include <linux/gpio_keys.h> | |
402e4909 | 28 | #include <linux/pwm_backlight.h> |
38fd6c38 | 29 | #include <linux/smc91x.h> |
b459396e | 30 | #include <linux/i2c/pxa-i2c.h> |
1da177e4 LT |
31 | |
32 | #include <asm/types.h> | |
33 | #include <asm/setup.h> | |
34 | #include <asm/memory.h> | |
35 | #include <asm/mach-types.h> | |
a09e64fb | 36 | #include <mach/hardware.h> |
1da177e4 | 37 | #include <asm/irq.h> |
74ec71e1 | 38 | #include <asm/sizes.h> |
1da177e4 LT |
39 | |
40 | #include <asm/mach/arch.h> | |
41 | #include <asm/mach/map.h> | |
42 | #include <asm/mach/irq.h> | |
74ec71e1 | 43 | #include <asm/mach/flash.h> |
1da177e4 | 44 | |
51c62982 | 45 | #include <mach/pxa27x.h> |
da065a0b | 46 | #include <mach/gpio.h> |
a09e64fb RK |
47 | #include <mach/mainstone.h> |
48 | #include <mach/audio.h> | |
49 | #include <mach/pxafb.h> | |
a09e64fb RK |
50 | #include <mach/mmc.h> |
51 | #include <mach/irda.h> | |
52 | #include <mach/ohci.h> | |
4a2490ea | 53 | #include <plat/pxa27x_keypad.h> |
ad68bb9f | 54 | #include <mach/smemc.h> |
1da177e4 LT |
55 | |
56 | #include "generic.h" | |
46c41e62 | 57 | #include "devices.h" |
1da177e4 | 58 | |
fef06d27 | 59 | static unsigned long mainstone_pin_config[] = { |
60 | /* Chip Select */ | |
61 | GPIO15_nCS_1, | |
62 | ||
63 | /* LCD - 16bpp Active TFT */ | |
bedbda97 | 64 | GPIOxx_LCD_TFT_16BPP, |
fef06d27 | 65 | GPIO16_PWM0_OUT, /* Backlight */ |
66 | ||
67 | /* MMC */ | |
68 | GPIO32_MMC_CLK, | |
69 | GPIO112_MMC_CMD, | |
70 | GPIO92_MMC_DAT_0, | |
71 | GPIO109_MMC_DAT_1, | |
72 | GPIO110_MMC_DAT_2, | |
73 | GPIO111_MMC_DAT_3, | |
74 | ||
75 | /* USB Host Port 1 */ | |
76 | GPIO88_USBH1_PWR, | |
77 | GPIO89_USBH1_PEN, | |
78 | ||
79 | /* PC Card */ | |
80 | GPIO48_nPOE, | |
81 | GPIO49_nPWE, | |
82 | GPIO50_nPIOR, | |
83 | GPIO51_nPIOW, | |
84 | GPIO85_nPCE_1, | |
85 | GPIO54_nPCE_2, | |
86 | GPIO79_PSKTSEL, | |
87 | GPIO55_nPREG, | |
88 | GPIO56_nPWAIT, | |
89 | GPIO57_nIOIS16, | |
90 | ||
91 | /* AC97 */ | |
c11b6a42 EM |
92 | GPIO28_AC97_BITCLK, |
93 | GPIO29_AC97_SDATA_IN_0, | |
94 | GPIO30_AC97_SDATA_OUT, | |
95 | GPIO31_AC97_SYNC, | |
fef06d27 | 96 | GPIO45_AC97_SYSCLK, |
97 | ||
98 | /* Keypad */ | |
b18773d5 EM |
99 | GPIO93_KP_DKIN_0, |
100 | GPIO94_KP_DKIN_1, | |
101 | GPIO95_KP_DKIN_2, | |
fef06d27 | 102 | GPIO100_KP_MKIN_0 | WAKEUP_ON_LEVEL_HIGH, |
103 | GPIO101_KP_MKIN_1 | WAKEUP_ON_LEVEL_HIGH, | |
104 | GPIO102_KP_MKIN_2 | WAKEUP_ON_LEVEL_HIGH, | |
105 | GPIO97_KP_MKIN_3 | WAKEUP_ON_LEVEL_HIGH, | |
106 | GPIO98_KP_MKIN_4 | WAKEUP_ON_LEVEL_HIGH, | |
107 | GPIO99_KP_MKIN_5 | WAKEUP_ON_LEVEL_HIGH, | |
108 | GPIO103_KP_MKOUT_0, | |
109 | GPIO104_KP_MKOUT_1, | |
110 | GPIO105_KP_MKOUT_2, | |
111 | GPIO106_KP_MKOUT_3, | |
112 | GPIO107_KP_MKOUT_4, | |
113 | GPIO108_KP_MKOUT_5, | |
114 | GPIO96_KP_MKOUT_6, | |
115 | ||
6f584cfa EM |
116 | /* I2C */ |
117 | GPIO117_I2C_SCL, | |
118 | GPIO118_I2C_SDA, | |
119 | ||
fef06d27 | 120 | /* GPIO */ |
121 | GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH, | |
122 | }; | |
1da177e4 LT |
123 | |
124 | static unsigned long mainstone_irq_enabled; | |
125 | ||
a3f4c927 | 126 | static void mainstone_mask_irq(struct irq_data *d) |
1da177e4 | 127 | { |
a3f4c927 | 128 | int mainstone_irq = (d->irq - MAINSTONE_IRQ(0)); |
1da177e4 LT |
129 | MST_INTMSKENA = (mainstone_irq_enabled &= ~(1 << mainstone_irq)); |
130 | } | |
131 | ||
a3f4c927 | 132 | static void mainstone_unmask_irq(struct irq_data *d) |
1da177e4 | 133 | { |
a3f4c927 | 134 | int mainstone_irq = (d->irq - MAINSTONE_IRQ(0)); |
1da177e4 LT |
135 | /* the irq can be acknowledged only if deasserted, so it's done here */ |
136 | MST_INTSETCLR &= ~(1 << mainstone_irq); | |
137 | MST_INTMSKENA = (mainstone_irq_enabled |= (1 << mainstone_irq)); | |
138 | } | |
139 | ||
38c677cb DB |
140 | static struct irq_chip mainstone_irq_chip = { |
141 | .name = "FPGA", | |
a3f4c927 LB |
142 | .irq_ack = mainstone_mask_irq, |
143 | .irq_mask = mainstone_mask_irq, | |
144 | .irq_unmask = mainstone_unmask_irq, | |
1da177e4 LT |
145 | }; |
146 | ||
10dd5ce2 | 147 | static void mainstone_irq_handler(unsigned int irq, struct irq_desc *desc) |
1da177e4 LT |
148 | { |
149 | unsigned long pending = MST_INTSETCLR & mainstone_irq_enabled; | |
150 | do { | |
a3f4c927 LB |
151 | /* clear useless edge notification */ |
152 | desc->irq_data.chip->irq_ack(&desc->irq_data); | |
1da177e4 LT |
153 | if (likely(pending)) { |
154 | irq = MAINSTONE_IRQ(0) + __ffs(pending); | |
d8aa0251 | 155 | generic_handle_irq(irq); |
1da177e4 LT |
156 | } |
157 | pending = MST_INTSETCLR & mainstone_irq_enabled; | |
158 | } while (pending); | |
159 | } | |
160 | ||
161 | static void __init mainstone_init_irq(void) | |
162 | { | |
163 | int irq; | |
164 | ||
cd49104d | 165 | pxa27x_init_irq(); |
1da177e4 LT |
166 | |
167 | /* setup extra Mainstone irqs */ | |
168 | for(irq = MAINSTONE_IRQ(0); irq <= MAINSTONE_IRQ(15); irq++) { | |
f38c02f3 TG |
169 | irq_set_chip_and_handler(irq, &mainstone_irq_chip, |
170 | handle_level_irq); | |
ec64152f TG |
171 | if (irq == MAINSTONE_IRQ(10) || irq == MAINSTONE_IRQ(14)) |
172 | set_irq_flags(irq, IRQF_VALID | IRQF_PROBE | IRQF_NOAUTOEN); | |
173 | else | |
174 | set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); | |
1da177e4 LT |
175 | } |
176 | set_irq_flags(MAINSTONE_IRQ(8), 0); | |
177 | set_irq_flags(MAINSTONE_IRQ(12), 0); | |
178 | ||
179 | MST_INTMSKENA = 0; | |
180 | MST_INTSETCLR = 0; | |
181 | ||
6845664a TG |
182 | irq_set_chained_handler(IRQ_GPIO(0), mainstone_irq_handler); |
183 | irq_set_irq_type(IRQ_GPIO(0), IRQ_TYPE_EDGE_FALLING); | |
1da177e4 LT |
184 | } |
185 | ||
22f11c4e NP |
186 | #ifdef CONFIG_PM |
187 | ||
188 | static int mainstone_irq_resume(struct sys_device *dev) | |
189 | { | |
190 | MST_INTMSKENA = mainstone_irq_enabled; | |
191 | return 0; | |
192 | } | |
193 | ||
194 | static struct sysdev_class mainstone_irq_sysclass = { | |
af5ca3f4 | 195 | .name = "cpld_irq", |
22f11c4e NP |
196 | .resume = mainstone_irq_resume, |
197 | }; | |
198 | ||
199 | static struct sys_device mainstone_irq_device = { | |
200 | .cls = &mainstone_irq_sysclass, | |
201 | }; | |
202 | ||
203 | static int __init mainstone_irq_device_init(void) | |
204 | { | |
16f159b1 RK |
205 | int ret = -ENODEV; |
206 | ||
207 | if (machine_is_mainstone()) { | |
208 | ret = sysdev_class_register(&mainstone_irq_sysclass); | |
209 | if (ret == 0) | |
210 | ret = sysdev_register(&mainstone_irq_device); | |
211 | } | |
22f11c4e NP |
212 | return ret; |
213 | } | |
214 | ||
215 | device_initcall(mainstone_irq_device_init); | |
216 | ||
217 | #endif | |
218 | ||
1da177e4 LT |
219 | |
220 | static struct resource smc91x_resources[] = { | |
221 | [0] = { | |
222 | .start = (MST_ETH_PHYS + 0x300), | |
223 | .end = (MST_ETH_PHYS + 0xfffff), | |
224 | .flags = IORESOURCE_MEM, | |
225 | }, | |
226 | [1] = { | |
227 | .start = MAINSTONE_IRQ(3), | |
228 | .end = MAINSTONE_IRQ(3), | |
e7b3dc7e | 229 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, |
1da177e4 LT |
230 | } |
231 | }; | |
232 | ||
38fd6c38 EM |
233 | static struct smc91x_platdata mainstone_smc91x_info = { |
234 | .flags = SMC91X_USE_8BIT | SMC91X_USE_16BIT | SMC91X_USE_32BIT | | |
235 | SMC91X_NOWAIT | SMC91X_USE_DMA, | |
236 | }; | |
237 | ||
1da177e4 LT |
238 | static struct platform_device smc91x_device = { |
239 | .name = "smc91x", | |
240 | .id = 0, | |
241 | .num_resources = ARRAY_SIZE(smc91x_resources), | |
242 | .resource = smc91x_resources, | |
38fd6c38 EM |
243 | .dev = { |
244 | .platform_data = &mainstone_smc91x_info, | |
245 | }, | |
1da177e4 LT |
246 | }; |
247 | ||
f7cbb7fc | 248 | static int mst_audio_startup(struct snd_pcm_substream *substream, void *priv) |
1da177e4 LT |
249 | { |
250 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) | |
251 | MST_MSCWR2 &= ~MST_MSCWR2_AC97_SPKROFF; | |
252 | return 0; | |
253 | } | |
254 | ||
f7cbb7fc | 255 | static void mst_audio_shutdown(struct snd_pcm_substream *substream, void *priv) |
1da177e4 LT |
256 | { |
257 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) | |
258 | MST_MSCWR2 |= MST_MSCWR2_AC97_SPKROFF; | |
259 | } | |
260 | ||
261 | static long mst_audio_suspend_mask; | |
262 | ||
263 | static void mst_audio_suspend(void *priv) | |
264 | { | |
265 | mst_audio_suspend_mask = MST_MSCWR2; | |
266 | MST_MSCWR2 |= MST_MSCWR2_AC97_SPKROFF; | |
267 | } | |
268 | ||
269 | static void mst_audio_resume(void *priv) | |
270 | { | |
271 | MST_MSCWR2 &= mst_audio_suspend_mask | ~MST_MSCWR2_AC97_SPKROFF; | |
272 | } | |
273 | ||
274 | static pxa2xx_audio_ops_t mst_audio_ops = { | |
275 | .startup = mst_audio_startup, | |
276 | .shutdown = mst_audio_shutdown, | |
277 | .suspend = mst_audio_suspend, | |
278 | .resume = mst_audio_resume, | |
279 | }; | |
280 | ||
74ec71e1 TP |
281 | static struct resource flash_resources[] = { |
282 | [0] = { | |
283 | .start = PXA_CS0_PHYS, | |
284 | .end = PXA_CS0_PHYS + SZ_64M - 1, | |
285 | .flags = IORESOURCE_MEM, | |
286 | }, | |
287 | [1] = { | |
288 | .start = PXA_CS1_PHYS, | |
289 | .end = PXA_CS1_PHYS + SZ_64M - 1, | |
290 | .flags = IORESOURCE_MEM, | |
291 | }, | |
292 | }; | |
293 | ||
294 | static struct mtd_partition mainstoneflash0_partitions[] = { | |
295 | { | |
296 | .name = "Bootloader", | |
297 | .size = 0x00040000, | |
298 | .offset = 0, | |
299 | .mask_flags = MTD_WRITEABLE /* force read-only */ | |
300 | },{ | |
301 | .name = "Kernel", | |
302 | .size = 0x00400000, | |
303 | .offset = 0x00040000, | |
304 | },{ | |
305 | .name = "Filesystem", | |
306 | .size = MTDPART_SIZ_FULL, | |
307 | .offset = 0x00440000 | |
308 | } | |
309 | }; | |
310 | ||
311 | static struct flash_platform_data mst_flash_data[2] = { | |
312 | { | |
313 | .map_name = "cfi_probe", | |
314 | .parts = mainstoneflash0_partitions, | |
315 | .nr_parts = ARRAY_SIZE(mainstoneflash0_partitions), | |
316 | }, { | |
317 | .map_name = "cfi_probe", | |
318 | .parts = NULL, | |
319 | .nr_parts = 0, | |
320 | } | |
321 | }; | |
322 | ||
323 | static struct platform_device mst_flash_device[2] = { | |
324 | { | |
325 | .name = "pxa2xx-flash", | |
326 | .id = 0, | |
327 | .dev = { | |
328 | .platform_data = &mst_flash_data[0], | |
329 | }, | |
330 | .resource = &flash_resources[0], | |
331 | .num_resources = 1, | |
332 | }, | |
333 | { | |
334 | .name = "pxa2xx-flash", | |
335 | .id = 1, | |
336 | .dev = { | |
337 | .platform_data = &mst_flash_data[1], | |
338 | }, | |
339 | .resource = &flash_resources[1], | |
340 | .num_resources = 1, | |
341 | }, | |
342 | }; | |
343 | ||
402e4909 RK |
344 | #if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE) |
345 | static struct platform_pwm_backlight_data mainstone_backlight_data = { | |
346 | .pwm_id = 0, | |
347 | .max_brightness = 1023, | |
348 | .dft_brightness = 1023, | |
349 | .pwm_period_ns = 78770, | |
350 | }; | |
3777f774 | 351 | |
402e4909 RK |
352 | static struct platform_device mainstone_backlight_device = { |
353 | .name = "pwm-backlight", | |
354 | .dev = { | |
355 | .parent = &pxa27x_device_pwm0.dev, | |
356 | .platform_data = &mainstone_backlight_data, | |
357 | }, | |
3777f774 RK |
358 | }; |
359 | ||
360 | static void __init mainstone_backlight_register(void) | |
361 | { | |
402e4909 RK |
362 | int ret = platform_device_register(&mainstone_backlight_device); |
363 | if (ret) | |
364 | printk(KERN_ERR "mainstone: failed to register backlight device: %d\n", ret); | |
1da177e4 | 365 | } |
3777f774 RK |
366 | #else |
367 | #define mainstone_backlight_register() do { } while (0) | |
368 | #endif | |
1da177e4 | 369 | |
d14b272b | 370 | static struct pxafb_mode_info toshiba_ltm04c380k_mode = { |
1da177e4 LT |
371 | .pixclock = 50000, |
372 | .xres = 640, | |
373 | .yres = 480, | |
374 | .bpp = 16, | |
375 | .hsync_len = 1, | |
376 | .left_margin = 0x9f, | |
377 | .right_margin = 1, | |
378 | .vsync_len = 44, | |
379 | .upper_margin = 0, | |
380 | .lower_margin = 0, | |
381 | .sync = FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, | |
1da177e4 LT |
382 | }; |
383 | ||
d14b272b | 384 | static struct pxafb_mode_info toshiba_ltm035a776c_mode = { |
1da177e4 LT |
385 | .pixclock = 110000, |
386 | .xres = 240, | |
387 | .yres = 320, | |
388 | .bpp = 16, | |
389 | .hsync_len = 4, | |
390 | .left_margin = 8, | |
391 | .right_margin = 20, | |
392 | .vsync_len = 3, | |
393 | .upper_margin = 1, | |
394 | .lower_margin = 10, | |
395 | .sync = FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, | |
d14b272b RP |
396 | }; |
397 | ||
398 | static struct pxafb_mach_info mainstone_pxafb_info = { | |
399 | .num_modes = 1, | |
0454bd09 | 400 | .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL, |
1da177e4 LT |
401 | }; |
402 | ||
40220c1a | 403 | static int mainstone_mci_init(struct device *dev, irq_handler_t mstone_detect_int, void *data) |
1da177e4 LT |
404 | { |
405 | int err; | |
406 | ||
1da177e4 LT |
407 | /* make sure SD/Memory Stick multiplexer's signals |
408 | * are routed to MMC controller | |
409 | */ | |
410 | MST_MSCWR1 &= ~MST_MSCWR1_MS_SEL; | |
411 | ||
52e405ea | 412 | err = request_irq(MAINSTONE_MMC_IRQ, mstone_detect_int, IRQF_DISABLED, |
1da177e4 | 413 | "MMC card detect", data); |
2687bd38 | 414 | if (err) |
1da177e4 | 415 | printk(KERN_ERR "mainstone_mci_init: MMC/SD: can't request MMC card detect IRQ\n"); |
1da177e4 | 416 | |
2687bd38 | 417 | return err; |
1da177e4 LT |
418 | } |
419 | ||
420 | static void mainstone_mci_setpower(struct device *dev, unsigned int vdd) | |
421 | { | |
422 | struct pxamci_platform_data* p_d = dev->platform_data; | |
423 | ||
424 | if (( 1 << vdd) & p_d->ocr_mask) { | |
8e86f427 | 425 | printk(KERN_DEBUG "%s: on\n", __func__); |
1da177e4 LT |
426 | MST_MSCWR1 |= MST_MSCWR1_MMC_ON; |
427 | MST_MSCWR1 &= ~MST_MSCWR1_MS_SEL; | |
428 | } else { | |
8e86f427 | 429 | printk(KERN_DEBUG "%s: off\n", __func__); |
1da177e4 LT |
430 | MST_MSCWR1 &= ~MST_MSCWR1_MMC_ON; |
431 | } | |
432 | } | |
433 | ||
434 | static void mainstone_mci_exit(struct device *dev, void *data) | |
435 | { | |
436 | free_irq(MAINSTONE_MMC_IRQ, data); | |
437 | } | |
438 | ||
439 | static struct pxamci_platform_data mainstone_mci_platform_data = { | |
7a648256 RJ |
440 | .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, |
441 | .init = mainstone_mci_init, | |
442 | .setpower = mainstone_mci_setpower, | |
443 | .exit = mainstone_mci_exit, | |
444 | .gpio_card_detect = -1, | |
445 | .gpio_card_ro = -1, | |
446 | .gpio_power = -1, | |
1da177e4 LT |
447 | }; |
448 | ||
6f475c01 NP |
449 | static void mainstone_irda_transceiver_mode(struct device *dev, int mode) |
450 | { | |
451 | unsigned long flags; | |
452 | ||
453 | local_irq_save(flags); | |
454 | if (mode & IR_SIRMODE) { | |
455 | MST_MSCWR1 &= ~MST_MSCWR1_IRDA_FIR; | |
456 | } else if (mode & IR_FIRMODE) { | |
457 | MST_MSCWR1 |= MST_MSCWR1_IRDA_FIR; | |
458 | } | |
0fc3ff31 | 459 | pxa2xx_transceiver_mode(dev, mode); |
6f475c01 NP |
460 | if (mode & IR_OFF) { |
461 | MST_MSCWR1 = (MST_MSCWR1 & ~MST_MSCWR1_IRDA_MASK) | MST_MSCWR1_IRDA_OFF; | |
462 | } else { | |
463 | MST_MSCWR1 = (MST_MSCWR1 & ~MST_MSCWR1_IRDA_MASK) | MST_MSCWR1_IRDA_FULL; | |
464 | } | |
465 | local_irq_restore(flags); | |
466 | } | |
467 | ||
468 | static struct pxaficp_platform_data mainstone_ficp_platform_data = { | |
c4bd0172 MV |
469 | .gpio_pwdown = -1, |
470 | .transceiver_cap = IR_SIRMODE | IR_FIRMODE | IR_OFF, | |
471 | .transceiver_mode = mainstone_irda_transceiver_mode, | |
6f475c01 NP |
472 | }; |
473 | ||
450d2874 | 474 | static struct gpio_keys_button gpio_keys_button[] = { |
475 | [0] = { | |
476 | .desc = "wakeup", | |
477 | .code = KEY_SUSPEND, | |
478 | .type = EV_KEY, | |
479 | .gpio = 1, | |
480 | .wakeup = 1, | |
481 | }, | |
482 | }; | |
483 | ||
484 | static struct gpio_keys_platform_data mainstone_gpio_keys = { | |
485 | .buttons = gpio_keys_button, | |
486 | .nbuttons = 1, | |
487 | }; | |
488 | ||
489 | static struct platform_device mst_gpio_keys_device = { | |
490 | .name = "gpio-keys", | |
491 | .id = -1, | |
492 | .dev = { | |
493 | .platform_data = &mainstone_gpio_keys, | |
494 | }, | |
495 | }; | |
496 | ||
74ec71e1 TP |
497 | static struct platform_device *platform_devices[] __initdata = { |
498 | &smc91x_device, | |
74ec71e1 TP |
499 | &mst_flash_device[0], |
500 | &mst_flash_device[1], | |
450d2874 | 501 | &mst_gpio_keys_device, |
74ec71e1 TP |
502 | }; |
503 | ||
81f280e2 RP |
504 | static struct pxaohci_platform_data mainstone_ohci_platform_data = { |
505 | .port_mode = PMM_PERPORT_MODE, | |
097b5334 | 506 | .flags = ENABLE_PORT_ALL | POWER_CONTROL_LOW | POWER_SENSE_LOW, |
81f280e2 RP |
507 | }; |
508 | ||
36caeb4e | 509 | #if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE) |
55c26e40 | 510 | static unsigned int mainstone_matrix_keys[] = { |
511 | KEY(0, 0, KEY_A), KEY(1, 0, KEY_B), KEY(2, 0, KEY_C), | |
512 | KEY(3, 0, KEY_D), KEY(4, 0, KEY_E), KEY(5, 0, KEY_F), | |
513 | KEY(0, 1, KEY_G), KEY(1, 1, KEY_H), KEY(2, 1, KEY_I), | |
514 | KEY(3, 1, KEY_J), KEY(4, 1, KEY_K), KEY(5, 1, KEY_L), | |
515 | KEY(0, 2, KEY_M), KEY(1, 2, KEY_N), KEY(2, 2, KEY_O), | |
516 | KEY(3, 2, KEY_P), KEY(4, 2, KEY_Q), KEY(5, 2, KEY_R), | |
517 | KEY(0, 3, KEY_S), KEY(1, 3, KEY_T), KEY(2, 3, KEY_U), | |
518 | KEY(3, 3, KEY_V), KEY(4, 3, KEY_W), KEY(5, 3, KEY_X), | |
519 | KEY(2, 4, KEY_Y), KEY(3, 4, KEY_Z), | |
520 | ||
521 | KEY(0, 4, KEY_DOT), /* . */ | |
522 | KEY(1, 4, KEY_CLOSE), /* @ */ | |
523 | KEY(4, 4, KEY_SLASH), | |
524 | KEY(5, 4, KEY_BACKSLASH), | |
525 | KEY(0, 5, KEY_HOME), | |
526 | KEY(1, 5, KEY_LEFTSHIFT), | |
527 | KEY(2, 5, KEY_SPACE), | |
528 | KEY(3, 5, KEY_SPACE), | |
529 | KEY(4, 5, KEY_ENTER), | |
530 | KEY(5, 5, KEY_BACKSPACE), | |
531 | ||
532 | KEY(0, 6, KEY_UP), | |
533 | KEY(1, 6, KEY_DOWN), | |
534 | KEY(2, 6, KEY_LEFT), | |
535 | KEY(3, 6, KEY_RIGHT), | |
536 | KEY(4, 6, KEY_SELECT), | |
537 | }; | |
538 | ||
539 | struct pxa27x_keypad_platform_data mainstone_keypad_info = { | |
540 | .matrix_key_rows = 6, | |
541 | .matrix_key_cols = 7, | |
542 | .matrix_key_map = mainstone_matrix_keys, | |
543 | .matrix_key_map_size = ARRAY_SIZE(mainstone_matrix_keys), | |
544 | ||
545 | .enable_rotary0 = 1, | |
546 | .rotary0_up_key = KEY_UP, | |
547 | .rotary0_down_key = KEY_DOWN, | |
548 | ||
549 | .debounce_interval = 30, | |
550 | }; | |
551 | ||
552 | static void __init mainstone_init_keypad(void) | |
553 | { | |
554 | pxa_set_keypad_info(&mainstone_keypad_info); | |
555 | } | |
556 | #else | |
557 | static inline void mainstone_init_keypad(void) {} | |
558 | #endif | |
559 | ||
1da177e4 LT |
560 | static void __init mainstone_init(void) |
561 | { | |
74ec71e1 TP |
562 | int SW7 = 0; /* FIXME: get from SCR (Mst doc section 3.2.1.1) */ |
563 | ||
fef06d27 | 564 | pxa2xx_mfp_config(ARRAY_AND_SIZE(mainstone_pin_config)); |
565 | ||
cc155c6f RK |
566 | pxa_set_ffuart_info(NULL); |
567 | pxa_set_btuart_info(NULL); | |
568 | pxa_set_stuart_info(NULL); | |
569 | ||
ad68bb9f | 570 | mst_flash_data[0].width = (__raw_readl(BOOT_DEF) & 1) ? 2 : 4; |
74ec71e1 TP |
571 | mst_flash_data[1].width = 4; |
572 | ||
573 | /* Compensate for SW7 which swaps the flash banks */ | |
574 | mst_flash_data[SW7].name = "processor-flash"; | |
575 | mst_flash_data[SW7 ^ 1].name = "mainboard-flash"; | |
576 | ||
577 | printk(KERN_NOTICE "Mainstone configured to boot from %s\n", | |
578 | mst_flash_data[0].name); | |
579 | ||
5b2e98cd JH |
580 | /* system bus arbiter setting |
581 | * - Core_Park | |
582 | * - LCD_wt:DMA_wt:CORE_Wt = 2:3:4 | |
583 | */ | |
584 | ARB_CNTRL = ARB_CORE_PARK | 0x234; | |
585 | ||
74ec71e1 | 586 | platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); |
1da177e4 LT |
587 | |
588 | /* reading Mainstone's "Virtual Configuration Register" | |
589 | might be handy to select LCD type here */ | |
590 | if (0) | |
d14b272b | 591 | mainstone_pxafb_info.modes = &toshiba_ltm04c380k_mode; |
1da177e4 | 592 | else |
d14b272b RP |
593 | mainstone_pxafb_info.modes = &toshiba_ltm035a776c_mode; |
594 | ||
4321e1a1 | 595 | pxa_set_fb_info(NULL, &mainstone_pxafb_info); |
3777f774 | 596 | mainstone_backlight_register(); |
1da177e4 LT |
597 | |
598 | pxa_set_mci_info(&mainstone_mci_platform_data); | |
6f475c01 | 599 | pxa_set_ficp_info(&mainstone_ficp_platform_data); |
81f280e2 | 600 | pxa_set_ohci_info(&mainstone_ohci_platform_data); |
835e7f1c | 601 | pxa_set_i2c_info(NULL); |
9f19d638 | 602 | pxa_set_ac97_info(&mst_audio_ops); |
55c26e40 | 603 | |
604 | mainstone_init_keypad(); | |
1da177e4 LT |
605 | } |
606 | ||
607 | ||
608 | static struct map_desc mainstone_io_desc[] __initdata = { | |
6f9182eb DS |
609 | { /* CPLD */ |
610 | .virtual = MST_FPGA_VIRT, | |
611 | .pfn = __phys_to_pfn(MST_FPGA_PHYS), | |
612 | .length = 0x00100000, | |
613 | .type = MT_DEVICE | |
614 | } | |
1da177e4 LT |
615 | }; |
616 | ||
617 | static void __init mainstone_map_io(void) | |
618 | { | |
851982c1 | 619 | pxa27x_map_io(); |
1da177e4 LT |
620 | iotable_init(mainstone_io_desc, ARRAY_SIZE(mainstone_io_desc)); |
621 | ||
8775420d TP |
622 | /* for use I SRAM as framebuffer. */ |
623 | PSLR |= 0xF04; | |
624 | PCFR = 0x66; | |
1da177e4 LT |
625 | } |
626 | ||
627 | MACHINE_START(MAINSTONE, "Intel HCDDBBVA0 Development Platform (aka Mainstone)") | |
e9dea0c6 | 628 | /* Maintainer: MontaVista Software Inc. */ |
a7d14f87 | 629 | .boot_params = 0xa0000100, /* BLOB boot parameter setting */ |
e9dea0c6 | 630 | .map_io = mainstone_map_io, |
6ac6b817 | 631 | .nr_irqs = MAINSTONE_NR_IRQS, |
e9dea0c6 | 632 | .init_irq = mainstone_init_irq, |
1da177e4 | 633 | .timer = &pxa_timer, |
e9dea0c6 | 634 | .init_machine = mainstone_init, |
1da177e4 | 635 | MACHINE_END |