[mirror_ubuntu-zesty-kernel.git] / arch / arm / mach-pxa / mfp-pxa2xx.c

/*
 *  linux/arch/arm/mach-pxa/mfp-pxa2xx.c
 *
 *  PXA2xx pin mux configuration support
 *
 *  The GPIOs on PXA2xx can be configured as one of many alternate
 *  functions, this is by concept samilar to the MFP configuration
 *  on PXA3xx,  what's more important, the low power pin state and
 *  wakeup detection are also supported by the same framework.
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License version 2 as
 *  published by the Free Software Foundation.
 */
#include <linux/gpio.h>
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/syscore_ops.h>

#include <mach/pxa2xx-regs.h>
#include <mach/mfp-pxa2xx.h>

#include "generic.h"

#define PGSR(x)		__REG2(0x40F00020, (x) << 2)
#define __GAFR(u, x)	__REG2((u) ? 0x40E00058 : 0x40E00054, (x) << 3)
#define GAFR_L(x)	__GAFR(0, x)
#define GAFR_U(x)	__GAFR(1, x)

#define PWER_WE35	(1 << 24)

struct gpio_desc {
	unsigned	valid		: 1;
	unsigned	can_wakeup	: 1;
	unsigned	keypad_gpio	: 1;
	unsigned	dir_inverted	: 1;
	unsigned int	mask; /* bit mask in PWER or PKWR */
	unsigned int	mux_mask; /* bit mask of muxed gpio bits, 0 if no mux */
	unsigned long	config;
};

static struct gpio_desc gpio_desc[MFP_PIN_GPIO127 + 1];

static unsigned long gpdr_lpm[4];

static int __mfp_config_gpio(unsigned gpio, unsigned long c)
{
	unsigned long gafr, mask = GPIO_bit(gpio);
	int bank = gpio_to_bank(gpio);
	int uorl = !!(gpio & 0x10); /* GAFRx_U or GAFRx_L ? */
	int shft = (gpio & 0xf) << 1;
	int fn = MFP_AF(c);
	int is_out = (c & MFP_DIR_OUT) ? 1 : 0;

	if (fn > 3)
		return -EINVAL;

	/* alternate function and direction at run-time */
	gafr = (uorl == 0) ? GAFR_L(bank) : GAFR_U(bank);
	gafr = (gafr & ~(0x3 << shft)) | (fn << shft);

	if (uorl == 0)
		GAFR_L(bank) = gafr;
	else
		GAFR_U(bank) = gafr;

	if (is_out ^ gpio_desc[gpio].dir_inverted)
		GPDR(gpio) |= mask;
	else
		GPDR(gpio) &= ~mask;

	/* alternate function and direction at low power mode */
	switch (c & MFP_LPM_STATE_MASK) {
	case MFP_LPM_DRIVE_HIGH:
		PGSR(bank) |= mask;
		is_out = 1;
		break;
	case MFP_LPM_DRIVE_LOW:
		PGSR(bank) &= ~mask;
		is_out = 1;
		break;
	case MFP_LPM_INPUT:
	case MFP_LPM_DEFAULT:
		break;
	default:
		/* warning and fall through, treat as MFP_LPM_DEFAULT */
		pr_warning("%s: GPIO%d: unsupported low power mode\n",
				__func__, gpio);
		break;
	}

	if (is_out ^ gpio_desc[gpio].dir_inverted)
		gpdr_lpm[bank] |= mask;
	else
		gpdr_lpm[bank] &= ~mask;

	/* give early warning if MFP_LPM_CAN_WAKEUP is set on the
	 * configurations of those pins not able to wakeup
	 */
	if ((c & MFP_LPM_CAN_WAKEUP) && !gpio_desc[gpio].can_wakeup) {
		pr_warning("%s: GPIO%d unable to wakeup\n",
				__func__, gpio);
		return -EINVAL;
	}

	if ((c & MFP_LPM_CAN_WAKEUP) && is_out) {
		pr_warning("%s: output GPIO%d unable to wakeup\n",
				__func__, gpio);
		return -EINVAL;
	}

	return 0;
}

static inline int __mfp_validate(int mfp)
{
	int gpio = mfp_to_gpio(mfp);

	if ((mfp > MFP_PIN_GPIO127) || !gpio_desc[gpio].valid) {
		pr_warning("%s: GPIO%d is invalid pin\n", __func__, gpio);
		return -1;
	}

	return gpio;
}

void pxa2xx_mfp_config(unsigned long *mfp_cfgs, int num)
{
	unsigned long flags;
	unsigned long *c;
	int i, gpio;

	for (i = 0, c = mfp_cfgs; i < num; i++, c++) {

		gpio = __mfp_validate(MFP_PIN(*c));
		if (gpio < 0)
			continue;

		local_irq_save(flags);

		gpio_desc[gpio].config = *c;
		__mfp_config_gpio(gpio, *c);

		local_irq_restore(flags);
	}
}

void pxa2xx_mfp_set_lpm(int mfp, unsigned long lpm)
{
	unsigned long flags, c;
	int gpio;

	gpio = __mfp_validate(mfp);
	if (gpio < 0)
		return;

	local_irq_save(flags);

	c = gpio_desc[gpio].config;
	c = (c & ~MFP_LPM_STATE_MASK) | lpm;
	__mfp_config_gpio(gpio, c);

	local_irq_restore(flags);
}

int gpio_set_wake(unsigned int gpio, unsigned int on)
{
	struct gpio_desc *d;
	unsigned long c, mux_taken;

	if (gpio > mfp_to_gpio(MFP_PIN_GPIO127))
		return -EINVAL;

	d = &gpio_desc[gpio];
	c = d->config;

	if (!d->valid)
		return -EINVAL;

	/* Allow keypad GPIOs to wakeup system when
	 * configured as generic GPIOs.
	 */
	if (d->keypad_gpio && (MFP_AF(d->config) == 0) &&
	    (d->config & MFP_LPM_CAN_WAKEUP)) {
		if (on)
			PKWR |= d->mask;
		else
			PKWR &= ~d->mask;
		return 0;
	}

	mux_taken = (PWER & d->mux_mask) & (~d->mask);
	if (on && mux_taken)
		return -EBUSY;

	if (d->can_wakeup && (c & MFP_LPM_CAN_WAKEUP)) {
		if (on) {
			PWER = (PWER & ~d->mux_mask) | d->mask;

			if (c & MFP_LPM_EDGE_RISE)
				PRER |= d->mask;
			else
				PRER &= ~d->mask;

			if (c & MFP_LPM_EDGE_FALL)
				PFER |= d->mask;
			else
				PFER &= ~d->mask;
		} else {
			PWER &= ~d->mask;
			PRER &= ~d->mask;
			PFER &= ~d->mask;
		}
	}
	return 0;
}

#ifdef CONFIG_PXA25x
static void __init pxa25x_mfp_init(void)
{
	int i;

	for (i = 0; i <= pxa_last_gpio; i++)
		gpio_desc[i].valid = 1;

	for (i = 0; i <= 15; i++) {
		gpio_desc[i].can_wakeup = 1;
		gpio_desc[i].mask = GPIO_bit(i);
	}

	/* PXA26x has additional 4 GPIOs (86/87/88/89) which has the
	 * direction bit inverted in GPDR2. See PXA26x DM 4.1.1.
	 */
	for (i = 86; i <= pxa_last_gpio; i++)
		gpio_desc[i].dir_inverted = 1;
}
#else
static inline void pxa25x_mfp_init(void) {}
#endif /* CONFIG_PXA25x */

#ifdef CONFIG_PXA27x
static int pxa27x_pkwr_gpio[] = {
	13, 16, 17, 34, 36, 37, 38, 39, 90, 91, 93, 94,
	95, 96, 97, 98, 99, 100, 101, 102
};

int keypad_set_wake(unsigned int on)
{
	unsigned int i, gpio, mask = 0;
	struct gpio_desc *d;

	for (i = 0; i < ARRAY_SIZE(pxa27x_pkwr_gpio); i++) {

		gpio = pxa27x_pkwr_gpio[i];
		d = &gpio_desc[gpio];

		/* skip if configured as generic GPIO */
		if (MFP_AF(d->config) == 0)
			continue;

		if (d->config & MFP_LPM_CAN_WAKEUP)
			mask |= gpio_desc[gpio].mask;
	}

	if (on)
		PKWR |= mask;
	else
		PKWR &= ~mask;
	return 0;
}

#define PWER_WEMUX2_GPIO38	(1 << 16)
#define PWER_WEMUX2_GPIO53	(2 << 16)
#define PWER_WEMUX2_GPIO40	(3 << 16)
#define PWER_WEMUX2_GPIO36	(4 << 16)
#define PWER_WEMUX2_MASK	(7 << 16)
#define PWER_WEMUX3_GPIO31	(1 << 19)
#define PWER_WEMUX3_GPIO113	(2 << 19)
#define PWER_WEMUX3_MASK	(3 << 19)

#define INIT_GPIO_DESC_MUXED(mux, gpio)				\
do {								\
	gpio_desc[(gpio)].can_wakeup = 1;			\
	gpio_desc[(gpio)].mask = PWER_ ## mux ## _GPIO ##gpio;	\
	gpio_desc[(gpio)].mux_mask = PWER_ ## mux ## _MASK;	\
} while (0)

static void __init pxa27x_mfp_init(void)
{
	int i, gpio;

	for (i = 0; i <= pxa_last_gpio; i++) {
		/* skip GPIO2, 5, 6, 7, 8, they are not
		 * valid pins allow configuration
		 */
		if (i == 2 || i == 5 || i == 6 || i == 7 || i == 8)
			continue;

		gpio_desc[i].valid = 1;
	}

	/* Keypad GPIOs */
	for (i = 0; i < ARRAY_SIZE(pxa27x_pkwr_gpio); i++) {
		gpio = pxa27x_pkwr_gpio[i];
		gpio_desc[gpio].can_wakeup = 1;
		gpio_desc[gpio].keypad_gpio = 1;
		gpio_desc[gpio].mask = 1 << i;
	}

	/* Overwrite GPIO13 as a PWER wakeup source */
	for (i = 0; i <= 15; i++) {
		/* skip GPIO2, 5, 6, 7, 8 */
		if (GPIO_bit(i) & 0x1e4)
			continue;

		gpio_desc[i].can_wakeup = 1;
		gpio_desc[i].mask = GPIO_bit(i);
	}

	gpio_desc[35].can_wakeup = 1;
	gpio_desc[35].mask = PWER_WE35;

	INIT_GPIO_DESC_MUXED(WEMUX3, 31);
	INIT_GPIO_DESC_MUXED(WEMUX3, 113);
	INIT_GPIO_DESC_MUXED(WEMUX2, 38);
	INIT_GPIO_DESC_MUXED(WEMUX2, 53);
	INIT_GPIO_DESC_MUXED(WEMUX2, 40);
	INIT_GPIO_DESC_MUXED(WEMUX2, 36);
}
#else
static inline void pxa27x_mfp_init(void) {}
#endif /* CONFIG_PXA27x */

#ifdef CONFIG_PM
static unsigned long saved_gafr[2][4];
static unsigned long saved_gpdr[4];
static unsigned long saved_pgsr[4];

static int pxa2xx_mfp_suspend(void)
{
	int i;

	/* set corresponding PGSR bit of those marked MFP_LPM_KEEP_OUTPUT */
	for (i = 0; i < pxa_last_gpio; i++) {
		if ((gpio_desc[i].config & MFP_LPM_KEEP_OUTPUT) &&
		    (GPDR(i) & GPIO_bit(i))) {
			if (GPLR(i) & GPIO_bit(i))
				PGSR(gpio_to_bank(i)) |= GPIO_bit(i);
			else
				PGSR(gpio_to_bank(i)) &= ~GPIO_bit(i);
		}
	}

	for (i = 0; i <= gpio_to_bank(pxa_last_gpio); i++) {

		saved_gafr[0][i] = GAFR_L(i);
		saved_gafr[1][i] = GAFR_U(i);
		saved_gpdr[i] = GPDR(i * 32);
		saved_pgsr[i] = PGSR(i);

		GPDR(i * 32) = gpdr_lpm[i];
	}
	return 0;
}

static void pxa2xx_mfp_resume(void)
{
	int i;

	for (i = 0; i <= gpio_to_bank(pxa_last_gpio); i++) {
		GAFR_L(i) = saved_gafr[0][i];
		GAFR_U(i) = saved_gafr[1][i];
		GPDR(i * 32) = saved_gpdr[i];
		PGSR(i) = saved_pgsr[i];
	}
	PSSR = PSSR_RDH | PSSR_PH;
}
#else
#define pxa2xx_mfp_suspend	NULL
#define pxa2xx_mfp_resume	NULL
#endif

struct syscore_ops pxa2xx_mfp_syscore_ops = {
	.suspend	= pxa2xx_mfp_suspend,
	.resume		= pxa2xx_mfp_resume,
};

static int __init pxa2xx_mfp_init(void)
{
	int i;

	if (!cpu_is_pxa2xx())
		return 0;

	if (cpu_is_pxa25x())
		pxa25x_mfp_init();

	if (cpu_is_pxa27x())
		pxa27x_mfp_init();

	/* clear RDH bit to enable GPIO receivers after reset/sleep exit */
	PSSR = PSSR_RDH;

	/* initialize gafr_run[], pgsr_lpm[] from existing values */
	for (i = 0; i <= gpio_to_bank(pxa_last_gpio); i++)
		gpdr_lpm[i] = GPDR(i * 32);

	return 0;
}
postcore_initcall(pxa2xx_mfp_init);
Commit	Line	Data
7facc2f9	1	/*
	2	* linux/arch/arm/mach-pxa/mfp-pxa2xx.c
	3	*
	4	* PXA2xx pin mux configuration support
	5	*
	6	* The GPIOs on PXA2xx can be configured as one of many alternate
	7	* functions, this is by concept samilar to the MFP configuration
	8	* on PXA3xx, what's more important, the low power pin state and
	9	* wakeup detection are also supported by the same framework.
	10	*
	11	* This program is free software; you can redistribute it and/or modify
	12	* it under the terms of the GNU General Public License version 2 as
	13	* published by the Free Software Foundation.
	14	*/
2f8163ba	15	#include <linux/gpio.h>
7facc2f9	16	#include <linux/module.h>
	17	#include <linux/kernel.h>
	18	#include <linux/init.h>
2eaa03b5	19	#include <linux/syscore_ops.h>
7facc2f9	20
a09e64fb RK	21	#include <mach/pxa2xx-regs.h>
a09e64fb RK	22	#include <mach/mfp-pxa2xx.h>
7facc2f9	23
	24	#include "generic.h"
	25
5a3d9651 EM	26	#define PGSR(x) __REG2(0x40F00020, (x) << 2)
	27	#define __GAFR(u, x) __REG2((u) ? 0x40E00058 : 0x40E00054, (x) << 3)
	28	#define GAFR_L(x) __GAFR(0, x)
	29	#define GAFR_U(x) __GAFR(1, x)
7facc2f9	30
	31	#define PWER_WE35 (1 << 24)
	32
c0a596d6	33	struct gpio_desc {
7facc2f9	34	unsigned valid : 1;
	35	unsigned can_wakeup : 1;
	36	unsigned keypad_gpio : 1;
067455aa	37	unsigned dir_inverted : 1;
7facc2f9	38	unsigned int mask; /* bit mask in PWER or PKWR */
99687114	39	unsigned int mux_mask; /* bit mask of muxed gpio bits, 0 if no mux */
7facc2f9	40	unsigned long config;
c0a596d6	41	};
	42
	43	static struct gpio_desc gpio_desc[MFP_PIN_GPIO127 + 1];
7facc2f9	44
5a3d9651	45	static unsigned long gpdr_lpm[4];
566b450c	46
c0a596d6	47	static int __mfp_config_gpio(unsigned gpio, unsigned long c)
7facc2f9	48	{
7facc2f9	49	unsigned long gafr, mask = GPIO_bit(gpio);
5a3d9651 EM	50	int bank = gpio_to_bank(gpio);
	51	int uorl = !!(gpio & 0x10); /* GAFRx_U or GAFRx_L ? */
	52	int shft = (gpio & 0xf) << 1;
	53	int fn = MFP_AF(c);
067455aa	54	int is_out = (c & MFP_DIR_OUT) ? 1 : 0;
7facc2f9	55
7facc2f9	56	if (fn > 3)
	57	return -EINVAL;
	58
5a3d9651 EM	59	/* alternate function and direction at run-time */
	60	gafr = (uorl == 0) ? GAFR_L(bank) : GAFR_U(bank);
	61	gafr = (gafr & ~(0x3 << shft)) \| (fn << shft);
7facc2f9	62
5a3d9651 EM	63	if (uorl == 0)
	64	GAFR_L(bank) = gafr;
	65	else
	66	GAFR_U(bank) = gafr;
	67
067455aa	68	if (is_out ^ gpio_desc[gpio].dir_inverted)
7facc2f9	69	GPDR(gpio) \|= mask;
	70	else
	71	GPDR(gpio) &= ~mask;
	72
5a3d9651 EM	73	/* alternate function and direction at low power mode */
	74	switch (c & MFP_LPM_STATE_MASK) {
	75	case MFP_LPM_DRIVE_HIGH:
	76	PGSR(bank) \|= mask;
067455aa	77	is_out = 1;
5a3d9651 EM	78	break;
	79	case MFP_LPM_DRIVE_LOW:
	80	PGSR(bank) &= ~mask;
067455aa	81	is_out = 1;
5a3d9651	82	break;
1fe8c2bc	83	case MFP_LPM_INPUT:
5a3d9651 EM	84	case MFP_LPM_DEFAULT:
	85	break;
	86	default:
	87	/* warning and fall through, treat as MFP_LPM_DEFAULT */
	88	pr_warning("%s: GPIO%d: unsupported low power mode\n",
	89	__func__, gpio);
	90	break;
	91	}
	92
067455aa	93	if (is_out ^ gpio_desc[gpio].dir_inverted)
5a3d9651 EM	94	gpdr_lpm[bank] \|= mask;
	95	else
	96	gpdr_lpm[bank] &= ~mask;
7facc2f9	97
c0a596d6	98	/* give early warning if MFP_LPM_CAN_WAKEUP is set on the
	99	* configurations of those pins not able to wakeup
	100	*/
	101	if ((c & MFP_LPM_CAN_WAKEUP) && !gpio_desc[gpio].can_wakeup) {
7facc2f9	102	pr_warning("%s: GPIO%d unable to wakeup\n",
	103	__func__, gpio);
	104	return -EINVAL;
	105	}
	106
067455aa	107	if ((c & MFP_LPM_CAN_WAKEUP) && is_out) {
c0a596d6	108	pr_warning("%s: output GPIO%d unable to wakeup\n",
	109	__func__, gpio);
	110	return -EINVAL;
7facc2f9	111	}
	112
	113	return 0;
	114	}
	115
0fedb0ca EM	116	static inline int __mfp_validate(int mfp)
	117	{
	118	int gpio = mfp_to_gpio(mfp);
	119
	120	if ((mfp > MFP_PIN_GPIO127) \|\| !gpio_desc[gpio].valid) {
	121	pr_warning("%s: GPIO%d is invalid pin\n", __func__, gpio);
	122	return -1;
	123	}
	124
	125	return gpio;
	126	}
	127
7facc2f9	128	void pxa2xx_mfp_config(unsigned long *mfp_cfgs, int num)
	129	{
	130	unsigned long flags;
	131	unsigned long *c;
	132	int i, gpio;
	133
	134	for (i = 0, c = mfp_cfgs; i < num; i++, c++) {
	135
0fedb0ca EM	136	gpio = __mfp_validate(MFP_PIN(*c));
0fedb0ca EM	137	if (gpio < 0)
7facc2f9	138	continue;
7facc2f9	139
	140	local_irq_save(flags);
	141
	142	gpio_desc[gpio].config = *c;
	143	__mfp_config_gpio(gpio, *c);
	144
	145	local_irq_restore(flags);
	146	}
	147	}
	148
566b450c EM	149	void pxa2xx_mfp_set_lpm(int mfp, unsigned long lpm)
566b450c EM	150	{
5a3d9651	151	unsigned long flags, c;
566b450c EM	152	int gpio;
	153
	154	gpio = __mfp_validate(mfp);
	155	if (gpio < 0)
	156	return;
	157
	158	local_irq_save(flags);
5a3d9651 EM	159
	160	c = gpio_desc[gpio].config;
	161	c = (c & ~MFP_LPM_STATE_MASK) \| lpm;
	162	__mfp_config_gpio(gpio, c);
	163
566b450c EM	164	local_irq_restore(flags);
	165	}
	166
c0a596d6	167	int gpio_set_wake(unsigned int gpio, unsigned int on)
	168	{
	169	struct gpio_desc *d;
99687114	170	unsigned long c, mux_taken;
c0a596d6	171
	172	if (gpio > mfp_to_gpio(MFP_PIN_GPIO127))
	173	return -EINVAL;
	174
	175	d = &gpio_desc[gpio];
	176	c = d->config;
	177
	178	if (!d->valid)
	179	return -EINVAL;
	180
c09f431c EM	181	/* Allow keypad GPIOs to wakeup system when
	182	* configured as generic GPIOs.
	183	*/
	184	if (d->keypad_gpio && (MFP_AF(d->config) == 0) &&
	185	(d->config & MFP_LPM_CAN_WAKEUP)) {
	186	if (on)
	187	PKWR \|= d->mask;
	188	else
	189	PKWR &= ~d->mask;
	190	return 0;
	191	}
c0a596d6	192
99687114 RJ	193	mux_taken = (PWER & d->mux_mask) & (~d->mask);
	194	if (on && mux_taken)
	195	return -EBUSY;
	196
c0a596d6	197	if (d->can_wakeup && (c & MFP_LPM_CAN_WAKEUP)) {
c0a596d6	198	if (on) {
99687114	199	PWER = (PWER & ~d->mux_mask) \| d->mask;
c0a596d6	200
	201	if (c & MFP_LPM_EDGE_RISE)
	202	PRER \|= d->mask;
	203	else
	204	PRER &= ~d->mask;
	205
	206	if (c & MFP_LPM_EDGE_FALL)
	207	PFER \|= d->mask;
	208	else
	209	PFER &= ~d->mask;
	210	} else {
	211	PWER &= ~d->mask;
	212	PRER &= ~d->mask;
	213	PFER &= ~d->mask;
	214	}
	215	}
	216	return 0;
	217	}
	218
7facc2f9	219	#ifdef CONFIG_PXA25x
5a3d9651	220	static void __init pxa25x_mfp_init(void)
7facc2f9	221	{
	222	int i;
	223
ddd244dd	224	for (i = 0; i <= pxa_last_gpio; i++)
5a3d9651	225	gpio_desc[i].valid = 1;
7facc2f9	226
5a3d9651 EM	227	for (i = 0; i <= 15; i++) {
	228	gpio_desc[i].can_wakeup = 1;
	229	gpio_desc[i].mask = GPIO_bit(i);
7facc2f9	230	}
067455aa EM	231
	232	/* PXA26x has additional 4 GPIOs (86/87/88/89) which has the
	233	* direction bit inverted in GPDR2. See PXA26x DM 4.1.1.
	234	*/
	235	for (i = 86; i <= pxa_last_gpio; i++)
	236	gpio_desc[i].dir_inverted = 1;
7facc2f9	237	}
5a3d9651 EM	238	#else
5a3d9651 EM	239	static inline void pxa25x_mfp_init(void) {}
7facc2f9	240	#endif /* CONFIG_PXA25x */
	241
	242	#ifdef CONFIG_PXA27x
c0a596d6	243	static int pxa27x_pkwr_gpio[] = {
7facc2f9	244	13, 16, 17, 34, 36, 37, 38, 39, 90, 91, 93, 94,
	245	95, 96, 97, 98, 99, 100, 101, 102
	246	};
	247
c0a596d6	248	int keypad_set_wake(unsigned int on)
	249	{
	250	unsigned int i, gpio, mask = 0;
c09f431c	251	struct gpio_desc *d;
c0a596d6	252
	253	for (i = 0; i < ARRAY_SIZE(pxa27x_pkwr_gpio); i++) {
	254
	255	gpio = pxa27x_pkwr_gpio[i];
c09f431c	256	d = &gpio_desc[gpio];
c0a596d6	257
c09f431c EM	258	/* skip if configured as generic GPIO */
	259	if (MFP_AF(d->config) == 0)
	260	continue;
	261
	262	if (d->config & MFP_LPM_CAN_WAKEUP)
c0a596d6	263	mask \|= gpio_desc[gpio].mask;
	264	}
	265
c09f431c EM	266	if (on)
	267	PKWR \|= mask;
	268	else
	269	PKWR &= ~mask;
c0a596d6	270	return 0;
	271	}
	272
99687114 RJ	273	#define PWER_WEMUX2_GPIO38 (1 << 16)
	274	#define PWER_WEMUX2_GPIO53 (2 << 16)
	275	#define PWER_WEMUX2_GPIO40 (3 << 16)
	276	#define PWER_WEMUX2_GPIO36 (4 << 16)
	277	#define PWER_WEMUX2_MASK (7 << 16)
	278	#define PWER_WEMUX3_GPIO31 (1 << 19)
	279	#define PWER_WEMUX3_GPIO113 (2 << 19)
	280	#define PWER_WEMUX3_MASK (3 << 19)
	281
	282	#define INIT_GPIO_DESC_MUXED(mux, gpio) \
	283	do { \
	284	gpio_desc[(gpio)].can_wakeup = 1; \
	285	gpio_desc[(gpio)].mask = PWER_ ## mux ## _GPIO ##gpio; \
	286	gpio_desc[(gpio)].mux_mask = PWER_ ## mux ## _MASK; \
	287	} while (0)
	288
5a3d9651	289	static void __init pxa27x_mfp_init(void)
7facc2f9	290	{
	291	int i, gpio;
	292
ddd244dd	293	for (i = 0; i <= pxa_last_gpio; i++) {
5a3d9651 EM	294	/* skip GPIO2, 5, 6, 7, 8, they are not
	295	* valid pins allow configuration
	296	*/
	297	if (i == 2 \|\| i == 5 \|\| i == 6 \|\| i == 7 \|\| i == 8)
	298	continue;
7facc2f9	299
5a3d9651 EM	300	gpio_desc[i].valid = 1;
5a3d9651 EM	301	}
7facc2f9	302
5a3d9651 EM	303	/* Keypad GPIOs */
	304	for (i = 0; i < ARRAY_SIZE(pxa27x_pkwr_gpio); i++) {
	305	gpio = pxa27x_pkwr_gpio[i];
	306	gpio_desc[gpio].can_wakeup = 1;
	307	gpio_desc[gpio].keypad_gpio = 1;
	308	gpio_desc[gpio].mask = 1 << i;
	309	}
7facc2f9	310
5a3d9651 EM	311	/* Overwrite GPIO13 as a PWER wakeup source */
	312	for (i = 0; i <= 15; i++) {
	313	/* skip GPIO2, 5, 6, 7, 8 */
	314	if (GPIO_bit(i) & 0x1e4)
	315	continue;
7facc2f9	316
5a3d9651 EM	317	gpio_desc[i].can_wakeup = 1;
	318	gpio_desc[i].mask = GPIO_bit(i);
	319	}
	320
	321	gpio_desc[35].can_wakeup = 1;
	322	gpio_desc[35].mask = PWER_WE35;
	323
99687114 RJ	324	INIT_GPIO_DESC_MUXED(WEMUX3, 31);
	325	INIT_GPIO_DESC_MUXED(WEMUX3, 113);
	326	INIT_GPIO_DESC_MUXED(WEMUX2, 38);
	327	INIT_GPIO_DESC_MUXED(WEMUX2, 53);
	328	INIT_GPIO_DESC_MUXED(WEMUX2, 40);
	329	INIT_GPIO_DESC_MUXED(WEMUX2, 36);
5a3d9651 EM	330	}
	331	#else
	332	static inline void pxa27x_mfp_init(void) {}
	333	#endif /* CONFIG_PXA27x */
	334
	335	#ifdef CONFIG_PM
	336	static unsigned long saved_gafr[2][4];
	337	static unsigned long saved_gpdr[4];
818bc814	338	static unsigned long saved_pgsr[4];
5a3d9651	339
2eaa03b5	340	static int pxa2xx_mfp_suspend(void)
5a3d9651 EM	341	{
	342	int i;
	343
1106143d EM	344	/* set corresponding PGSR bit of those marked MFP_LPM_KEEP_OUTPUT */
	345	for (i = 0; i < pxa_last_gpio; i++) {
	346	if ((gpio_desc[i].config & MFP_LPM_KEEP_OUTPUT) &&
	347	(GPDR(i) & GPIO_bit(i))) {
	348	if (GPLR(i) & GPIO_bit(i))
beb0c9b0	349	PGSR(gpio_to_bank(i)) \|= GPIO_bit(i);
1106143d	350	else
beb0c9b0	351	PGSR(gpio_to_bank(i)) &= ~GPIO_bit(i);
1106143d EM	352	}
	353	}
	354
ddd244dd	355	for (i = 0; i <= gpio_to_bank(pxa_last_gpio); i++) {
7facc2f9	356
5a3d9651 EM	357	saved_gafr[0][i] = GAFR_L(i);
	358	saved_gafr[1][i] = GAFR_U(i);
	359	saved_gpdr[i] = GPDR(i * 32);
818bc814	360	saved_pgsr[i] = PGSR(i);
5a3d9651 EM	361
5a3d9651 EM	362	GPDR(i * 32) = gpdr_lpm[i];
7facc2f9	363	}
5a3d9651 EM	364	return 0;
5a3d9651 EM	365	}
7facc2f9	366
2eaa03b5	367	static void pxa2xx_mfp_resume(void)
5a3d9651 EM	368	{
	369	int i;
	370
ddd244dd	371	for (i = 0; i <= gpio_to_bank(pxa_last_gpio); i++) {
5a3d9651 EM	372	GAFR_L(i) = saved_gafr[0][i];
	373	GAFR_U(i) = saved_gafr[1][i];
	374	GPDR(i * 32) = saved_gpdr[i];
818bc814	375	PGSR(i) = saved_pgsr[i];
5a3d9651 EM	376	}
5a3d9651 EM	377	PSSR = PSSR_RDH \| PSSR_PH;
7facc2f9	378	}
5a3d9651 EM	379	#else
	380	#define pxa2xx_mfp_suspend NULL
	381	#define pxa2xx_mfp_resume NULL
	382	#endif
	383
2eaa03b5	384	struct syscore_ops pxa2xx_mfp_syscore_ops = {
5a3d9651 EM	385	.suspend = pxa2xx_mfp_suspend,
	386	.resume = pxa2xx_mfp_resume,
	387	};
	388
	389	static int __init pxa2xx_mfp_init(void)
	390	{
	391	int i;
	392
e7f3c600 EM	393	if (!cpu_is_pxa2xx())
	394	return 0;
	395
5a3d9651 EM	396	if (cpu_is_pxa25x())
	397	pxa25x_mfp_init();
	398
	399	if (cpu_is_pxa27x())
	400	pxa27x_mfp_init();
	401
866bd435 TC	402	/* clear RDH bit to enable GPIO receivers after reset/sleep exit */
	403	PSSR = PSSR_RDH;
	404
5a3d9651	405	/* initialize gafr_run[], pgsr_lpm[] from existing values */
ddd244dd	406	for (i = 0; i <= gpio_to_bank(pxa_last_gpio); i++)
5a3d9651 EM	407	gpdr_lpm[i] = GPDR(i * 32);
5a3d9651 EM	408
2eaa03b5	409	return 0;
5a3d9651 EM	410	}
5a3d9651 EM	411	postcore_initcall(pxa2xx_mfp_init);