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[mirror_ubuntu-artful-kernel.git] / arch / arm / mach-pxa / pcm990-baseboard.c
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1/*
2 * arch/arm/mach-pxa/pcm990-baseboard.c
3 * Support for the Phytec phyCORE-PXA270 Development Platform (PCM-990).
4 *
5 * Refer
6 * http://www.phytec.com/products/rdk/ARM-XScale/phyCORE-XScale-PXA270.html
7 * for additional hardware info
8 *
9 * Author: Juergen Kilb
10 * Created: April 05, 2005
11 * Copyright: Phytec Messtechnik GmbH
12 * e-Mail: armlinux@phytec.de
13 *
14 * based on Intel Mainstone Board
15 *
16 * Copyright 2007 Juergen Beisert @ Pengutronix (j.beisert@pengutronix.de)
17 *
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License version 2 as
20 * published by the Free Software Foundation.
21 */
2f8163ba 22#include <linux/gpio.h>
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23#include <linux/irq.h>
24#include <linux/platform_device.h>
58762e77 25#include <linux/i2c.h>
b459396e 26#include <linux/i2c/pxa-i2c.h>
c0f7edb3 27#include <linux/pwm_backlight.h>
58762e77 28
b6f50b49 29#include <media/mt9v022.h>
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30#include <media/soc_camera.h>
31
293b2da1 32#include <linux/platform_data/camera-pxa.h>
2e927b76 33#include <asm/mach/map.h>
51c62982 34#include <mach/pxa27x.h>
a09e64fb 35#include <mach/audio.h>
293b2da1
AB
36#include <linux/platform_data/mmc-pxamci.h>
37#include <linux/platform_data/usb-ohci-pxa27x.h>
a09e64fb 38#include <mach/pcm990_baseboard.h>
293b2da1 39#include <linux/platform_data/video-pxafb.h>
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40
41#include "devices.h"
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42#include "generic.h"
43
44static unsigned long pcm990_pin_config[] __initdata = {
45 /* MMC */
46 GPIO32_MMC_CLK,
47 GPIO112_MMC_CMD,
48 GPIO92_MMC_DAT_0,
49 GPIO109_MMC_DAT_1,
50 GPIO110_MMC_DAT_2,
51 GPIO111_MMC_DAT_3,
52 /* USB */
53 GPIO88_USBH1_PWR,
54 GPIO89_USBH1_PEN,
55 /* PWM0 */
56 GPIO16_PWM0_OUT,
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57
58 /* I2C */
59 GPIO117_I2C_SCL,
60 GPIO118_I2C_SDA,
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61
62 /* AC97 */
63 GPIO28_AC97_BITCLK,
64 GPIO29_AC97_SDATA_IN_0,
65 GPIO30_AC97_SDATA_OUT,
66 GPIO31_AC97_SYNC,
6a566fbb 67};
c0f7edb3 68
b298322b
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69static void __iomem *pcm990_cpld_base;
70
71static u8 pcm990_cpld_readb(unsigned int reg)
72{
73 return readb(pcm990_cpld_base + reg);
74}
75
76static void pcm990_cpld_writeb(u8 value, unsigned int reg)
77{
78 writeb(value, pcm990_cpld_base + reg);
79}
80
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81/*
82 * pcm990_lcd_power - control power supply to the LCD
83 * @on: 0 = switch off, 1 = switch on
84 *
85 * Called by the pxafb driver
86 */
87#ifndef CONFIG_PCM990_DISPLAY_NONE
88static void pcm990_lcd_power(int on, struct fb_var_screeninfo *var)
89{
90 if (on) {
91 /* enable LCD-Latches
92 * power on LCD
93 */
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94 pcm990_cpld_writeb(PCM990_CTRL_LCDPWR + PCM990_CTRL_LCDON,
95 PCM990_CTRL_REG3);
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96 } else {
97 /* disable LCD-Latches
98 * power off LCD
99 */
b298322b 100 pcm990_cpld_writeb(0, PCM990_CTRL_REG3);
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101 }
102}
103#endif
104
105#if defined(CONFIG_PCM990_DISPLAY_SHARP)
106static struct pxafb_mode_info fb_info_sharp_lq084v1dg21 = {
107 .pixclock = 28000,
108 .xres = 640,
109 .yres = 480,
110 .bpp = 16,
111 .hsync_len = 20,
112 .left_margin = 103,
113 .right_margin = 47,
114 .vsync_len = 6,
115 .upper_margin = 28,
116 .lower_margin = 5,
117 .sync = 0,
118 .cmap_greyscale = 0,
119};
120
121static struct pxafb_mach_info pcm990_fbinfo __initdata = {
122 .modes = &fb_info_sharp_lq084v1dg21,
123 .num_modes = 1,
9587319b 124 .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
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125 .pxafb_lcd_power = pcm990_lcd_power,
126};
127#elif defined(CONFIG_PCM990_DISPLAY_NEC)
128struct pxafb_mode_info fb_info_nec_nl6448bc20_18d = {
129 .pixclock = 39720,
130 .xres = 640,
131 .yres = 480,
132 .bpp = 16,
133 .hsync_len = 32,
134 .left_margin = 16,
135 .right_margin = 48,
136 .vsync_len = 2,
137 .upper_margin = 12,
138 .lower_margin = 17,
139 .sync = 0,
140 .cmap_greyscale = 0,
141};
142
143static struct pxafb_mach_info pcm990_fbinfo __initdata = {
144 .modes = &fb_info_nec_nl6448bc20_18d,
145 .num_modes = 1,
9587319b 146 .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
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147 .pxafb_lcd_power = pcm990_lcd_power,
148};
149#endif
150
151static struct platform_pwm_backlight_data pcm990_backlight_data = {
152 .pwm_id = 0,
153 .max_brightness = 1023,
154 .dft_brightness = 1023,
155 .pwm_period_ns = 78770,
db01120c 156 .enable_gpio = -1,
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157};
158
159static struct platform_device pcm990_backlight_device = {
160 .name = "pwm-backlight",
161 .dev = {
162 .parent = &pxa27x_device_pwm0.dev,
163 .platform_data = &pcm990_backlight_data,
164 },
165};
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166
167/*
c0f7edb3 168 * The PCM-990 development baseboard uses PCM-027's hardware in the
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169 * following way:
170 *
171 * - LCD support is in use
172 * - GPIO16 is output for back light on/off with PWM
173 * - GPIO58 ... GPIO73 are outputs for display data
174 * - GPIO74 is output output for LCDFCLK
175 * - GPIO75 is output for LCDLCLK
176 * - GPIO76 is output for LCDPCLK
177 * - GPIO77 is output for LCDBIAS
178 * - MMC support is in use
179 * - GPIO32 is output for MMCCLK
180 * - GPIO92 is MMDAT0
181 * - GPIO109 is MMDAT1
182 * - GPIO110 is MMCS0
183 * - GPIO111 is MMCS1
184 * - GPIO112 is MMCMD
185 * - IDE/CF card is in use
186 * - GPIO48 is output /POE
187 * - GPIO49 is output /PWE
188 * - GPIO50 is output /PIOR
189 * - GPIO51 is output /PIOW
190 * - GPIO54 is output /PCE2
191 * - GPIO55 is output /PREG
192 * - GPIO56 is input /PWAIT
193 * - GPIO57 is output /PIOS16
194 * - GPIO79 is output PSKTSEL
195 * - GPIO85 is output /PCE1
196 * - FFUART is in use
197 * - GPIO34 is input FFRXD
198 * - GPIO35 is input FFCTS
199 * - GPIO36 is input FFDCD
200 * - GPIO37 is input FFDSR
201 * - GPIO38 is input FFRI
202 * - GPIO39 is output FFTXD
203 * - GPIO40 is output FFDTR
204 * - GPIO41 is output FFRTS
205 * - BTUART is in use
206 * - GPIO42 is input BTRXD
207 * - GPIO43 is output BTTXD
208 * - GPIO44 is input BTCTS
209 * - GPIO45 is output BTRTS
210 * - IRUART is in use
211 * - GPIO46 is input STDRXD
212 * - GPIO47 is output STDTXD
213 * - AC97 is in use*)
214 * - GPIO28 is input AC97CLK
215 * - GPIO29 is input AC97DatIn
216 * - GPIO30 is output AC97DatO
217 * - GPIO31 is output AC97SYNC
218 * - GPIO113 is output AC97_RESET
219 * - SSP is in use
220 * - GPIO23 is output SSPSCLK
221 * - GPIO24 is output chip select to Max7301
222 * - GPIO25 is output SSPTXD
223 * - GPIO26 is input SSPRXD
224 * - GPIO27 is input for Max7301 IRQ
225 * - GPIO53 is input SSPSYSCLK
226 * - SSP3 is in use
227 * - GPIO81 is output SSPTXD3
228 * - GPIO82 is input SSPRXD3
229 * - GPIO83 is output SSPSFRM
230 * - GPIO84 is output SSPCLK3
231 *
232 * Otherwise claimed GPIOs:
233 * GPIO1 -> IRQ from user switch
234 * GPIO9 -> IRQ from power management
235 * GPIO10 -> IRQ from WML9712 AC97 controller
236 * GPIO11 -> IRQ from IDE controller
237 * GPIO12 -> IRQ from CF controller
238 * GPIO13 -> IRQ from CF controller
239 * GPIO14 -> GPIO free
240 * GPIO15 -> /CS1 selects baseboard's Control CPLD (U7, 16 bit wide data path)
241 * GPIO19 -> GPIO free
242 * GPIO20 -> /SDCS2
243 * GPIO21 -> /CS3 PC card socket select
244 * GPIO33 -> /CS5 network controller select
245 * GPIO78 -> /CS2 (16 bit wide data path)
246 * GPIO80 -> /CS4 (16 bit wide data path)
247 * GPIO86 -> GPIO free
248 * GPIO87 -> GPIO free
249 * GPIO90 -> LED0 on CPU module
250 * GPIO91 -> LED1 on CPI module
251 * GPIO117 -> SCL
252 * GPIO118 -> SDA
253 */
254
255static unsigned long pcm990_irq_enabled;
256
a3f4c927 257static void pcm990_mask_ack_irq(struct irq_data *d)
2e927b76 258{
a3f4c927 259 int pcm990_irq = (d->irq - PCM027_IRQ(0));
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260
261 pcm990_irq_enabled &= ~(1 << pcm990_irq);
262
263 pcm990_cpld_writeb(pcm990_irq_enabled, PCM990_CTRL_INTMSKENA);
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264}
265
a3f4c927 266static void pcm990_unmask_irq(struct irq_data *d)
2e927b76 267{
a3f4c927 268 int pcm990_irq = (d->irq - PCM027_IRQ(0));
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269 u8 val;
270
2e927b76 271 /* the irq can be acknowledged only if deasserted, so it's done here */
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272
273 pcm990_irq_enabled |= (1 << pcm990_irq);
274
275 val = pcm990_cpld_readb(PCM990_CTRL_INTSETCLR);
276 val |= 1 << pcm990_irq;
277 pcm990_cpld_writeb(val, PCM990_CTRL_INTSETCLR);
278
279 pcm990_cpld_writeb(pcm990_irq_enabled, PCM990_CTRL_INTMSKENA);
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280}
281
282static struct irq_chip pcm990_irq_chip = {
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283 .irq_mask_ack = pcm990_mask_ack_irq,
284 .irq_unmask = pcm990_unmask_irq,
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285};
286
287static void pcm990_irq_handler(unsigned int irq, struct irq_desc *desc)
288{
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289 unsigned long pending;
290
291 pending = ~pcm990_cpld_readb(PCM990_CTRL_INTSETCLR);
292 pending &= pcm990_irq_enabled;
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293
294 do {
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295 /* clear our parent IRQ */
296 desc->irq_data.chip->irq_ack(&desc->irq_data);
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297 if (likely(pending)) {
298 irq = PCM027_IRQ(0) + __ffs(pending);
d8aa0251 299 generic_handle_irq(irq);
2e927b76 300 }
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301 pending = ~pcm990_cpld_readb(PCM990_CTRL_INTSETCLR);
302 pending &= pcm990_irq_enabled;
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303 } while (pending);
304}
305
306static void __init pcm990_init_irq(void)
307{
308 int irq;
309
310 /* setup extra PCM990 irqs */
311 for (irq = PCM027_IRQ(0); irq <= PCM027_IRQ(3); irq++) {
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312 irq_set_chip_and_handler(irq, &pcm990_irq_chip,
313 handle_level_irq);
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314 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
315 }
316
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317 /* disable all Interrupts */
318 pcm990_cpld_writeb(0x0, PCM990_CTRL_INTMSKENA);
319 pcm990_cpld_writeb(0xff, PCM990_CTRL_INTSETCLR);
2e927b76 320
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TG
321 irq_set_chained_handler(PCM990_CTRL_INT_IRQ, pcm990_irq_handler);
322 irq_set_irq_type(PCM990_CTRL_INT_IRQ, PCM990_CTRL_INT_IRQ_EDGE);
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323}
324
325static int pcm990_mci_init(struct device *dev, irq_handler_t mci_detect_int,
326 void *data)
327{
328 int err;
329
ed7936f9 330 err = request_irq(PCM027_MMCDET_IRQ, mci_detect_int, 0,
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331 "MMC card detect", data);
332 if (err)
333 printk(KERN_ERR "pcm990_mci_init: MMC/SD: can't request MMC "
334 "card detect IRQ\n");
335
336 return err;
337}
338
a829abf8 339static int pcm990_mci_setpower(struct device *dev, unsigned int vdd)
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340{
341 struct pxamci_platform_data *p_d = dev->platform_data;
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342 u8 val;
343
344 val = pcm990_cpld_readb(PCM990_CTRL_REG5);
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345
346 if ((1 << vdd) & p_d->ocr_mask)
b298322b 347 val |= PCM990_CTRL_MMC2PWR;
2e927b76 348 else
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349 val &= ~PCM990_CTRL_MMC2PWR;
350
351 pcm990_cpld_writeb(PCM990_CTRL_MMC2PWR, PCM990_CTRL_REG5);
a829abf8 352 return 0;
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353}
354
355static void pcm990_mci_exit(struct device *dev, void *data)
356{
357 free_irq(PCM027_MMCDET_IRQ, data);
358}
359
360#define MSECS_PER_JIFFY (1000/HZ)
361
362static struct pxamci_platform_data pcm990_mci_platform_data = {
f97cab28 363 .detect_delay_ms = 250,
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RJ
364 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
365 .init = pcm990_mci_init,
366 .setpower = pcm990_mci_setpower,
367 .exit = pcm990_mci_exit,
368 .gpio_card_detect = -1,
369 .gpio_card_ro = -1,
370 .gpio_power = -1,
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371};
372
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373static struct pxaohci_platform_data pcm990_ohci_platform_data = {
374 .port_mode = PMM_PERPORT_MODE,
097b5334
EM
375 .flags = ENABLE_PORT1 | POWER_CONTROL_LOW | POWER_SENSE_LOW,
376 .power_on_delay = 10,
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377};
378
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379/*
380 * PXA27x Camera specific stuff
381 */
382#if defined(CONFIG_VIDEO_PXA27x) || defined(CONFIG_VIDEO_PXA27x_MODULE)
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383static unsigned long pcm990_camera_pin_config[] = {
384 /* CIF */
385 GPIO98_CIF_DD_0,
386 GPIO105_CIF_DD_1,
387 GPIO104_CIF_DD_2,
388 GPIO103_CIF_DD_3,
389 GPIO95_CIF_DD_4,
390 GPIO94_CIF_DD_5,
391 GPIO93_CIF_DD_6,
392 GPIO108_CIF_DD_7,
393 GPIO107_CIF_DD_8,
394 GPIO106_CIF_DD_9,
395 GPIO42_CIF_MCLK,
396 GPIO45_CIF_PCLK,
397 GPIO43_CIF_FV,
398 GPIO44_CIF_LV,
399};
400
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401/*
402 * CICR4: PCLK_EN: Pixel clock is supplied by the sensor
403 * MCLK_EN: Master clock is generated by PXA
404 * PCP: Data sampled on the falling edge of pixel clock
405 */
406struct pxacamera_platform_data pcm990_pxacamera_platform_data = {
58762e77
GL
407 .flags = PXA_CAMERA_MASTER | PXA_CAMERA_DATAWIDTH_8 | PXA_CAMERA_DATAWIDTH_10 |
408 PXA_CAMERA_PCLK_EN | PXA_CAMERA_MCLK_EN/* | PXA_CAMERA_PCP*/,
409 .mclk_10khz = 1000,
410};
411
5877457a 412#include <linux/platform_data/pca953x.h>
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413
414static struct pca953x_platform_data pca9536_data = {
1a8d5fab 415 .gpio_base = PXA_NR_BUILTIN_GPIO,
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416};
417
594bb46d 418static int gpio_bus_switch = -EINVAL;
d75b1dcc
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419
420static int pcm990_camera_set_bus_param(struct soc_camera_link *link,
594bb46d 421 unsigned long flags)
d75b1dcc 422{
594bb46d 423 if (gpio_bus_switch < 0) {
d75b1dcc
SH
424 if (flags == SOCAM_DATAWIDTH_10)
425 return 0;
426 else
427 return -EINVAL;
428 }
429
430 if (flags & SOCAM_DATAWIDTH_8)
fae00288 431 gpio_set_value_cansleep(gpio_bus_switch, 1);
d75b1dcc 432 else
fae00288 433 gpio_set_value_cansleep(gpio_bus_switch, 0);
d75b1dcc
SH
434
435 return 0;
436}
437
438static unsigned long pcm990_camera_query_bus_param(struct soc_camera_link *link)
439{
440 int ret;
441
594bb46d 442 if (gpio_bus_switch < 0) {
1a8d5fab 443 ret = gpio_request(PXA_NR_BUILTIN_GPIO, "camera");
d75b1dcc 444 if (!ret) {
1a8d5fab 445 gpio_bus_switch = PXA_NR_BUILTIN_GPIO;
d75b1dcc 446 gpio_direction_output(gpio_bus_switch, 0);
594bb46d 447 }
58762e77 448 }
d75b1dcc 449
594bb46d 450 if (gpio_bus_switch >= 0)
d75b1dcc
SH
451 return SOCAM_DATAWIDTH_8 | SOCAM_DATAWIDTH_10;
452 else
453 return SOCAM_DATAWIDTH_10;
454}
455
594bb46d
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456static void pcm990_camera_free_bus(struct soc_camera_link *link)
457{
458 if (gpio_bus_switch < 0)
459 return;
460
461 gpio_free(gpio_bus_switch);
462 gpio_bus_switch = -EINVAL;
463}
464
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465/* Board I2C devices. */
466static struct i2c_board_info __initdata pcm990_i2c_devices[] = {
467 {
468 /* Must initialize before the camera(s) */
3760f736 469 I2C_BOARD_INFO("pca9536", 0x41),
58762e77 470 .platform_data = &pca9536_data,
4a3d3abe
GL
471 },
472};
473
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AG
474static struct mt9v022_platform_data mt9v022_pdata = {
475 .y_skip_top = 1,
476};
477
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478static struct i2c_board_info pcm990_camera_i2c[] = {
479 {
58762e77 480 I2C_BOARD_INFO("mt9v022", 0x48),
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481 }, {
482 I2C_BOARD_INFO("mt9m001", 0x5d),
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483 },
484};
485
486static struct soc_camera_link iclink[] = {
487 {
488 .bus_id = 0, /* Must match with the camera ID */
489 .board_info = &pcm990_camera_i2c[0],
b6f50b49 490 .priv = &mt9v022_pdata,
4a3d3abe
GL
491 .i2c_adapter_id = 0,
492 .query_bus_param = pcm990_camera_query_bus_param,
493 .set_bus_param = pcm990_camera_set_bus_param,
494 .free_bus = pcm990_camera_free_bus,
4a3d3abe
GL
495 }, {
496 .bus_id = 0, /* Must match with the camera ID */
497 .board_info = &pcm990_camera_i2c[1],
498 .i2c_adapter_id = 0,
499 .query_bus_param = pcm990_camera_query_bus_param,
500 .set_bus_param = pcm990_camera_set_bus_param,
501 .free_bus = pcm990_camera_free_bus,
4a3d3abe
GL
502 },
503};
504
505static struct platform_device pcm990_camera[] = {
506 {
507 .name = "soc-camera-pdrv",
508 .id = 0,
509 .dev = {
510 .platform_data = &iclink[0],
511 },
512 }, {
513 .name = "soc-camera-pdrv",
514 .id = 1,
515 .dev = {
516 .platform_data = &iclink[1],
517 },
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518 },
519};
520#endif /* CONFIG_VIDEO_PXA27x ||CONFIG_VIDEO_PXA27x_MODULE */
521
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522/*
523 * system init for baseboard usage. Will be called by pcm027 init.
524 *
525 * Add platform devices present on this baseboard and init
526 * them from CPU side as far as required to use them later on
527 */
528void __init pcm990_baseboard_init(void)
529{
6a566fbb
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530 pxa2xx_mfp_config(ARRAY_AND_SIZE(pcm990_pin_config));
531
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532 pcm990_cpld_base = ioremap(PCM990_CTRL_PHYS, PCM990_CTRL_SIZE);
533 if (!pcm990_cpld_base) {
534 pr_err("pcm990: failed to ioremap cpld\n");
535 return;
536 }
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537
538 /* register CPLD's IRQ controller */
539 pcm990_init_irq();
540
c0f7edb3 541#ifndef CONFIG_PCM990_DISPLAY_NONE
4321e1a1 542 pxa_set_fb_info(NULL, &pcm990_fbinfo);
c0f7edb3 543#endif
c0f7edb3
GL
544 platform_device_register(&pcm990_backlight_device);
545
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546 /* MMC */
547 pxa_set_mci_info(&pcm990_mci_platform_data);
548
549 /* USB host */
550 pxa_set_ohci_info(&pcm990_ohci_platform_data);
551
58762e77 552 pxa_set_i2c_info(NULL);
9f19d638 553 pxa_set_ac97_info(NULL);
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554
555#if defined(CONFIG_VIDEO_PXA27x) || defined(CONFIG_VIDEO_PXA27x_MODULE)
0e851907 556 pxa2xx_mfp_config(ARRAY_AND_SIZE(pcm990_camera_pin_config));
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557 pxa_set_camera_info(&pcm990_pxacamera_platform_data);
558
6a566fbb 559 i2c_register_board_info(0, ARRAY_AND_SIZE(pcm990_i2c_devices));
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560
561 platform_device_register(&pcm990_camera[0]);
562 platform_device_register(&pcm990_camera[1]);
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563#endif
564
6a566fbb 565 printk(KERN_INFO "PCM-990 Evaluation baseboard initialized\n");
2e927b76 566}