[mirror_ubuntu-artful-kernel.git] / arch / arm / mach-pxa / pcm990-baseboard.c

/*
 *  arch/arm/mach-pxa/pcm990-baseboard.c
 *  Support for the Phytec phyCORE-PXA270 Development Platform (PCM-990).
 *
 *  Refer
 *   http://www.phytec.com/products/rdk/ARM-XScale/phyCORE-XScale-PXA270.html
 *  for additional hardware info
 *
 *  Author:	Juergen Kilb
 *  Created:	April 05, 2005
 *  Copyright:	Phytec Messtechnik GmbH
 *  e-Mail:	armlinux@phytec.de
 *
 *  based on Intel Mainstone Board
 *
 *  Copyright 2007 Juergen Beisert @ Pengutronix (j.beisert@pengutronix.de)
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License version 2 as
 *  published by the Free Software Foundation.
 */

#include <linux/irq.h>
#include <linux/platform_device.h>
#include <linux/i2c.h>
#include <linux/i2c/pxa-i2c.h>
#include <linux/pwm_backlight.h>

#include <media/soc_camera.h>

#include <asm/gpio.h>
#include <mach/camera.h>
#include <asm/mach/map.h>
#include <mach/pxa27x.h>
#include <mach/audio.h>
#include <mach/mmc.h>
#include <mach/ohci.h>
#include <mach/pcm990_baseboard.h>
#include <mach/pxafb.h>

#include "devices.h"
#include "generic.h"

static unsigned long pcm990_pin_config[] __initdata = {
	/* MMC */
	GPIO32_MMC_CLK,
	GPIO112_MMC_CMD,
	GPIO92_MMC_DAT_0,
	GPIO109_MMC_DAT_1,
	GPIO110_MMC_DAT_2,
	GPIO111_MMC_DAT_3,
	/* USB */
	GPIO88_USBH1_PWR,
	GPIO89_USBH1_PEN,
	/* PWM0 */
	GPIO16_PWM0_OUT,

	/* I2C */
	GPIO117_I2C_SCL,
	GPIO118_I2C_SDA,

	/* AC97 */
	GPIO28_AC97_BITCLK,
	GPIO29_AC97_SDATA_IN_0,
	GPIO30_AC97_SDATA_OUT,
	GPIO31_AC97_SYNC,
};

/*
 * pcm990_lcd_power - control power supply to the LCD
 * @on: 0 = switch off, 1 = switch on
 *
 * Called by the pxafb driver
 */
#ifndef CONFIG_PCM990_DISPLAY_NONE
static void pcm990_lcd_power(int on, struct fb_var_screeninfo *var)
{
	if (on) {
		/* enable LCD-Latches
		 * power on LCD
		 */
		__PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG3) =
			PCM990_CTRL_LCDPWR + PCM990_CTRL_LCDON;
	} else {
		/* disable LCD-Latches
		 * power off LCD
		 */
		__PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG3) = 0x00;
	}
}
#endif

#if defined(CONFIG_PCM990_DISPLAY_SHARP)
static struct pxafb_mode_info fb_info_sharp_lq084v1dg21 = {
	.pixclock		= 28000,
	.xres			= 640,
	.yres			= 480,
	.bpp			= 16,
	.hsync_len		= 20,
	.left_margin		= 103,
	.right_margin		= 47,
	.vsync_len		= 6,
	.upper_margin		= 28,
	.lower_margin		= 5,
	.sync			= 0,
	.cmap_greyscale		= 0,
};

static struct pxafb_mach_info pcm990_fbinfo __initdata = {
	.modes			= &fb_info_sharp_lq084v1dg21,
	.num_modes		= 1,
	.lcd_conn		= LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
	.pxafb_lcd_power	= pcm990_lcd_power,
};
#elif defined(CONFIG_PCM990_DISPLAY_NEC)
struct pxafb_mode_info fb_info_nec_nl6448bc20_18d = {
	.pixclock		= 39720,
	.xres			= 640,
	.yres			= 480,
	.bpp			= 16,
	.hsync_len		= 32,
	.left_margin		= 16,
	.right_margin		= 48,
	.vsync_len		= 2,
	.upper_margin		= 12,
	.lower_margin		= 17,
	.sync			= 0,
	.cmap_greyscale		= 0,
};

static struct pxafb_mach_info pcm990_fbinfo __initdata = {
	.modes			= &fb_info_nec_nl6448bc20_18d,
	.num_modes		= 1,
	.lcd_conn		= LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
	.pxafb_lcd_power	= pcm990_lcd_power,
};
#endif

static struct platform_pwm_backlight_data pcm990_backlight_data = {
	.pwm_id		= 0,
	.max_brightness	= 1023,
	.dft_brightness	= 1023,
	.pwm_period_ns	= 78770,
};

static struct platform_device pcm990_backlight_device = {
	.name		= "pwm-backlight",
	.dev		= {
		.parent = &pxa27x_device_pwm0.dev,
		.platform_data = &pcm990_backlight_data,
	},
};

/*
 * The PCM-990 development baseboard uses PCM-027's hardware in the
 * following way:
 *
 * - LCD support is in use
 *  - GPIO16 is output for back light on/off with PWM
 *  - GPIO58 ... GPIO73 are outputs for display data
 *  - GPIO74 is output output for LCDFCLK
 *  - GPIO75 is output for LCDLCLK
 *  - GPIO76 is output for LCDPCLK
 *  - GPIO77 is output for LCDBIAS
 * - MMC support is in use
 *  - GPIO32 is output for MMCCLK
 *  - GPIO92 is MMDAT0
 *  - GPIO109 is MMDAT1
 *  - GPIO110 is MMCS0
 *  - GPIO111 is MMCS1
 *  - GPIO112 is MMCMD
 * - IDE/CF card is in use
 *  - GPIO48 is output /POE
 *  - GPIO49 is output /PWE
 *  - GPIO50 is output /PIOR
 *  - GPIO51 is output /PIOW
 *  - GPIO54 is output /PCE2
 *  - GPIO55 is output /PREG
 *  - GPIO56 is input /PWAIT
 *  - GPIO57 is output /PIOS16
 *  - GPIO79 is output PSKTSEL
 *  - GPIO85 is output /PCE1
 * - FFUART is in use
 *  - GPIO34 is input FFRXD
 *  - GPIO35 is input FFCTS
 *  - GPIO36 is input FFDCD
 *  - GPIO37 is input FFDSR
 *  - GPIO38 is input FFRI
 *  - GPIO39 is output FFTXD
 *  - GPIO40 is output FFDTR
 *  - GPIO41 is output FFRTS
 * - BTUART is in use
 *  - GPIO42 is input BTRXD
 *  - GPIO43 is output BTTXD
 *  - GPIO44 is input BTCTS
 *  - GPIO45 is output BTRTS
 * - IRUART is in use
 *  - GPIO46 is input STDRXD
 *  - GPIO47 is output STDTXD
 * - AC97 is in use*)
 *  - GPIO28 is input AC97CLK
 *  - GPIO29 is input AC97DatIn
 *  - GPIO30 is output AC97DatO
 *  - GPIO31 is output AC97SYNC
 *  - GPIO113 is output AC97_RESET
 * - SSP is in use
 *  - GPIO23 is output SSPSCLK
 *  - GPIO24 is output chip select to Max7301
 *  - GPIO25 is output SSPTXD
 *  - GPIO26 is input SSPRXD
 *  - GPIO27 is input for Max7301 IRQ
 *  - GPIO53 is input SSPSYSCLK
 * - SSP3 is in use
 *  - GPIO81 is output SSPTXD3
 *  - GPIO82 is input SSPRXD3
 *  - GPIO83 is output SSPSFRM
 *  - GPIO84 is output SSPCLK3
 *
 * Otherwise claimed GPIOs:
 * GPIO1 -> IRQ from user switch
 * GPIO9 -> IRQ from power management
 * GPIO10 -> IRQ from WML9712 AC97 controller
 * GPIO11 -> IRQ from IDE controller
 * GPIO12 -> IRQ from CF controller
 * GPIO13 -> IRQ from CF controller
 * GPIO14 -> GPIO free
 * GPIO15 -> /CS1 selects baseboard's Control CPLD (U7, 16 bit wide data path)
 * GPIO19 -> GPIO free
 * GPIO20 -> /SDCS2
 * GPIO21 -> /CS3 PC card socket select
 * GPIO33 -> /CS5  network controller select
 * GPIO78 -> /CS2  (16 bit wide data path)
 * GPIO80 -> /CS4  (16 bit wide data path)
 * GPIO86 -> GPIO free
 * GPIO87 -> GPIO free
 * GPIO90 -> LED0 on CPU module
 * GPIO91 -> LED1 on CPI module
 * GPIO117 -> SCL
 * GPIO118 -> SDA
 */

static unsigned long pcm990_irq_enabled;

static void pcm990_mask_ack_irq(struct irq_data *d)
{
	int pcm990_irq = (d->irq - PCM027_IRQ(0));
	PCM990_INTMSKENA = (pcm990_irq_enabled &= ~(1 << pcm990_irq));
}

static void pcm990_unmask_irq(struct irq_data *d)
{
	int pcm990_irq = (d->irq - PCM027_IRQ(0));
	/* the irq can be acknowledged only if deasserted, so it's done here */
	PCM990_INTSETCLR |= 1 << pcm990_irq;
	PCM990_INTMSKENA  = (pcm990_irq_enabled |= (1 << pcm990_irq));
}

static struct irq_chip pcm990_irq_chip = {
	.irq_mask_ack	= pcm990_mask_ack_irq,
	.irq_unmask	= pcm990_unmask_irq,
};

static void pcm990_irq_handler(unsigned int irq, struct irq_desc *desc)
{
	unsigned long pending = (~PCM990_INTSETCLR) & pcm990_irq_enabled;

	do {
		/* clear our parent IRQ */
		desc->irq_data.chip->irq_ack(&desc->irq_data);
		if (likely(pending)) {
			irq = PCM027_IRQ(0) + __ffs(pending);
			generic_handle_irq(irq);
		}
		pending = (~PCM990_INTSETCLR) & pcm990_irq_enabled;
	} while (pending);
}

static void __init pcm990_init_irq(void)
{
	int irq;

	/* setup extra PCM990 irqs */
	for (irq = PCM027_IRQ(0); irq <= PCM027_IRQ(3); irq++) {
		irq_set_chip(irq, &pcm990_irq_chip);
		irq_set_handler(irq, handle_level_irq);
		set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
	}

	PCM990_INTMSKENA = 0x00;	/* disable all Interrupts */
	PCM990_INTSETCLR = 0xFF;

	irq_set_chained_handler(PCM990_CTRL_INT_IRQ, pcm990_irq_handler);
	irq_set_irq_type(PCM990_CTRL_INT_IRQ, PCM990_CTRL_INT_IRQ_EDGE);
}

static int pcm990_mci_init(struct device *dev, irq_handler_t mci_detect_int,
			void *data)
{
	int err;

	err = request_irq(PCM027_MMCDET_IRQ, mci_detect_int, IRQF_DISABLED,
			     "MMC card detect", data);
	if (err)
		printk(KERN_ERR "pcm990_mci_init: MMC/SD: can't request MMC "
				"card detect IRQ\n");

	return err;
}

static void pcm990_mci_setpower(struct device *dev, unsigned int vdd)
{
	struct pxamci_platform_data *p_d = dev->platform_data;

	if ((1 << vdd) & p_d->ocr_mask)
		__PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG5) =
						PCM990_CTRL_MMC2PWR;
	else
		__PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG5) =
						~PCM990_CTRL_MMC2PWR;
}

static void pcm990_mci_exit(struct device *dev, void *data)
{
	free_irq(PCM027_MMCDET_IRQ, data);
}

#define MSECS_PER_JIFFY (1000/HZ)

static struct pxamci_platform_data pcm990_mci_platform_data = {
	.detect_delay_ms	= 250,
	.ocr_mask		= MMC_VDD_32_33 | MMC_VDD_33_34,
	.init 			= pcm990_mci_init,
	.setpower 		= pcm990_mci_setpower,
	.exit			= pcm990_mci_exit,
	.gpio_card_detect	= -1,
	.gpio_card_ro		= -1,
	.gpio_power		= -1,
};

static struct pxaohci_platform_data pcm990_ohci_platform_data = {
	.port_mode	= PMM_PERPORT_MODE,
	.flags		= ENABLE_PORT1 | POWER_CONTROL_LOW | POWER_SENSE_LOW,
	.power_on_delay	= 10,
};

/*
 * PXA27x Camera specific stuff
 */
#if defined(CONFIG_VIDEO_PXA27x) || defined(CONFIG_VIDEO_PXA27x_MODULE)
static unsigned long pcm990_camera_pin_config[] = {
	/* CIF */
	GPIO98_CIF_DD_0,
	GPIO105_CIF_DD_1,
	GPIO104_CIF_DD_2,
	GPIO103_CIF_DD_3,
	GPIO95_CIF_DD_4,
	GPIO94_CIF_DD_5,
	GPIO93_CIF_DD_6,
	GPIO108_CIF_DD_7,
	GPIO107_CIF_DD_8,
	GPIO106_CIF_DD_9,
	GPIO42_CIF_MCLK,
	GPIO45_CIF_PCLK,
	GPIO43_CIF_FV,
	GPIO44_CIF_LV,
};

/*
 * CICR4: PCLK_EN:	Pixel clock is supplied by the sensor
 *	MCLK_EN:	Master clock is generated by PXA
 *	PCP:		Data sampled on the falling edge of pixel clock
 */
struct pxacamera_platform_data pcm990_pxacamera_platform_data = {
	.flags  = PXA_CAMERA_MASTER | PXA_CAMERA_DATAWIDTH_8 | PXA_CAMERA_DATAWIDTH_10 |
		PXA_CAMERA_PCLK_EN | PXA_CAMERA_MCLK_EN/* | PXA_CAMERA_PCP*/,
	.mclk_10khz = 1000,
};

#include <linux/i2c/pca953x.h>

static struct pca953x_platform_data pca9536_data = {
	.gpio_base	= NR_BUILTIN_GPIO,
};

static int gpio_bus_switch = -EINVAL;

static int pcm990_camera_set_bus_param(struct soc_camera_link *link,
				       unsigned long flags)
{
	if (gpio_bus_switch < 0) {
		if (flags == SOCAM_DATAWIDTH_10)
			return 0;
		else
			return -EINVAL;
	}

	if (flags & SOCAM_DATAWIDTH_8)
		gpio_set_value(gpio_bus_switch, 1);
	else
		gpio_set_value(gpio_bus_switch, 0);

	return 0;
}

static unsigned long pcm990_camera_query_bus_param(struct soc_camera_link *link)
{
	int ret;

	if (gpio_bus_switch < 0) {
		ret = gpio_request(NR_BUILTIN_GPIO, "camera");
		if (!ret) {
			gpio_bus_switch = NR_BUILTIN_GPIO;
			gpio_direction_output(gpio_bus_switch, 0);
		}
	}

	if (gpio_bus_switch >= 0)
		return SOCAM_DATAWIDTH_8 | SOCAM_DATAWIDTH_10;
	else
		return SOCAM_DATAWIDTH_10;
}

static void pcm990_camera_free_bus(struct soc_camera_link *link)
{
	if (gpio_bus_switch < 0)
		return;

	gpio_free(gpio_bus_switch);
	gpio_bus_switch = -EINVAL;
}

/* Board I2C devices. */
static struct i2c_board_info __initdata pcm990_i2c_devices[] = {
	{
		/* Must initialize before the camera(s) */
		I2C_BOARD_INFO("pca9536", 0x41),
		.platform_data = &pca9536_data,
	},
};

static struct i2c_board_info pcm990_camera_i2c[] = {
	{
		I2C_BOARD_INFO("mt9v022", 0x48),
	}, {
		I2C_BOARD_INFO("mt9m001", 0x5d),
	},
};

static struct soc_camera_link iclink[] = {
	{
		.bus_id			= 0, /* Must match with the camera ID */
		.board_info		= &pcm990_camera_i2c[0],
		.i2c_adapter_id		= 0,
		.query_bus_param	= pcm990_camera_query_bus_param,
		.set_bus_param		= pcm990_camera_set_bus_param,
		.free_bus		= pcm990_camera_free_bus,
	}, {
		.bus_id			= 0, /* Must match with the camera ID */
		.board_info		= &pcm990_camera_i2c[1],
		.i2c_adapter_id		= 0,
		.query_bus_param	= pcm990_camera_query_bus_param,
		.set_bus_param		= pcm990_camera_set_bus_param,
		.free_bus		= pcm990_camera_free_bus,
	},
};

static struct platform_device pcm990_camera[] = {
	{
		.name	= "soc-camera-pdrv",
		.id	= 0,
		.dev	= {
			.platform_data = &iclink[0],
		},
	}, {
		.name	= "soc-camera-pdrv",
		.id	= 1,
		.dev	= {
			.platform_data = &iclink[1],
		},
	},
};
#endif /* CONFIG_VIDEO_PXA27x ||CONFIG_VIDEO_PXA27x_MODULE */

/*
 * enable generic access to the base board control CPLDs U6 and U7
 */
static struct map_desc pcm990_io_desc[] __initdata = {
	{
		.virtual	= PCM990_CTRL_BASE,
		.pfn		= __phys_to_pfn(PCM990_CTRL_PHYS),
		.length		= PCM990_CTRL_SIZE,
		.type		= MT_DEVICE	/* CPLD */
	}, {
		.virtual	= PCM990_CF_PLD_BASE,
		.pfn		= __phys_to_pfn(PCM990_CF_PLD_PHYS),
		.length		= PCM990_CF_PLD_SIZE,
		.type		= MT_DEVICE	/* CPLD */
	}
};

/*
 * system init for baseboard usage. Will be called by pcm027 init.
 *
 * Add platform devices present on this baseboard and init
 * them from CPU side as far as required to use them later on
 */
void __init pcm990_baseboard_init(void)
{
	pxa2xx_mfp_config(ARRAY_AND_SIZE(pcm990_pin_config));

	/* register CPLD access */
	iotable_init(ARRAY_AND_SIZE(pcm990_io_desc));

	/* register CPLD's IRQ controller */
	pcm990_init_irq();

#ifndef CONFIG_PCM990_DISPLAY_NONE
	set_pxa_fb_info(&pcm990_fbinfo);
#endif
	platform_device_register(&pcm990_backlight_device);

	/* MMC */
	pxa_set_mci_info(&pcm990_mci_platform_data);

	/* USB host */
	pxa_set_ohci_info(&pcm990_ohci_platform_data);

	pxa_set_i2c_info(NULL);
	pxa_set_ac97_info(NULL);

#if defined(CONFIG_VIDEO_PXA27x) || defined(CONFIG_VIDEO_PXA27x_MODULE)
	pxa2xx_mfp_config(ARRAY_AND_SIZE(pcm990_camera_pin_config));
	pxa_set_camera_info(&pcm990_pxacamera_platform_data);

	i2c_register_board_info(0, ARRAY_AND_SIZE(pcm990_i2c_devices));

	platform_device_register(&pcm990_camera[0]);
	platform_device_register(&pcm990_camera[1]);
#endif

	printk(KERN_INFO "PCM-990 Evaluation baseboard initialized\n");
}
Commit	Line	Data
2e927b76 RS	1	/*
	2	* arch/arm/mach-pxa/pcm990-baseboard.c
	3	* Support for the Phytec phyCORE-PXA270 Development Platform (PCM-990).
	4	*
	5	* Refer
	6	* http://www.phytec.com/products/rdk/ARM-XScale/phyCORE-XScale-PXA270.html
	7	* for additional hardware info
	8	*
	9	* Author: Juergen Kilb
	10	* Created: April 05, 2005
	11	* Copyright: Phytec Messtechnik GmbH
	12	* e-Mail: armlinux@phytec.de
	13	*
	14	* based on Intel Mainstone Board
	15	*
	16	* Copyright 2007 Juergen Beisert @ Pengutronix (j.beisert@pengutronix.de)
	17	*
	18	* This program is free software; you can redistribute it and/or modify
	19	* it under the terms of the GNU General Public License version 2 as
	20	* published by the Free Software Foundation.
	21	*/
	22
	23	#include <linux/irq.h>
	24	#include <linux/platform_device.h>
58762e77	25	#include <linux/i2c.h>
b459396e	26	#include <linux/i2c/pxa-i2c.h>
c0f7edb3	27	#include <linux/pwm_backlight.h>
58762e77 GL	28
	29	#include <media/soc_camera.h>
	30
	31	#include <asm/gpio.h>
a09e64fb	32	#include <mach/camera.h>
2e927b76	33	#include <asm/mach/map.h>
51c62982	34	#include <mach/pxa27x.h>
a09e64fb RK	35	#include <mach/audio.h>
	36	#include <mach/mmc.h>
	37	#include <mach/ohci.h>
	38	#include <mach/pcm990_baseboard.h>
	39	#include <mach/pxafb.h>
c0f7edb3 GL	40
c0f7edb3 GL	41	#include "devices.h"
6a566fbb GL	42	#include "generic.h"
	43
	44	static unsigned long pcm990_pin_config[] __initdata = {
	45	/* MMC */
	46	GPIO32_MMC_CLK,
	47	GPIO112_MMC_CMD,
	48	GPIO92_MMC_DAT_0,
	49	GPIO109_MMC_DAT_1,
	50	GPIO110_MMC_DAT_2,
	51	GPIO111_MMC_DAT_3,
	52	/* USB */
	53	GPIO88_USBH1_PWR,
	54	GPIO89_USBH1_PEN,
	55	/* PWM0 */
	56	GPIO16_PWM0_OUT,
6f584cfa EM	57
	58	/* I2C */
	59	GPIO117_I2C_SCL,
	60	GPIO118_I2C_SDA,
c11b6a42 EM	61
	62	/* AC97 */
	63	GPIO28_AC97_BITCLK,
	64	GPIO29_AC97_SDATA_IN_0,
	65	GPIO30_AC97_SDATA_OUT,
	66	GPIO31_AC97_SYNC,
6a566fbb	67	};
c0f7edb3 GL	68
	69	/*
	70	* pcm990_lcd_power - control power supply to the LCD
	71	* @on: 0 = switch off, 1 = switch on
	72	*
	73	* Called by the pxafb driver
	74	*/
	75	#ifndef CONFIG_PCM990_DISPLAY_NONE
	76	static void pcm990_lcd_power(int on, struct fb_var_screeninfo *var)
	77	{
	78	if (on) {
	79	/* enable LCD-Latches
	80	* power on LCD
	81	*/
	82	__PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG3) =
	83	PCM990_CTRL_LCDPWR + PCM990_CTRL_LCDON;
	84	} else {
	85	/* disable LCD-Latches
	86	* power off LCD
	87	*/
	88	__PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG3) = 0x00;
	89	}
	90	}
	91	#endif
	92
	93	#if defined(CONFIG_PCM990_DISPLAY_SHARP)
	94	static struct pxafb_mode_info fb_info_sharp_lq084v1dg21 = {
	95	.pixclock = 28000,
	96	.xres = 640,
	97	.yres = 480,
	98	.bpp = 16,
	99	.hsync_len = 20,
	100	.left_margin = 103,
	101	.right_margin = 47,
	102	.vsync_len = 6,
	103	.upper_margin = 28,
	104	.lower_margin = 5,
	105	.sync = 0,
	106	.cmap_greyscale = 0,
	107	};
	108
	109	static struct pxafb_mach_info pcm990_fbinfo __initdata = {
	110	.modes = &fb_info_sharp_lq084v1dg21,
	111	.num_modes = 1,
9587319b	112	.lcd_conn = LCD_COLOR_TFT_16BPP \| LCD_PCLK_EDGE_FALL,
c0f7edb3 GL	113	.pxafb_lcd_power = pcm990_lcd_power,
	114	};
	115	#elif defined(CONFIG_PCM990_DISPLAY_NEC)
	116	struct pxafb_mode_info fb_info_nec_nl6448bc20_18d = {
	117	.pixclock = 39720,
	118	.xres = 640,
	119	.yres = 480,
	120	.bpp = 16,
	121	.hsync_len = 32,
	122	.left_margin = 16,
	123	.right_margin = 48,
	124	.vsync_len = 2,
	125	.upper_margin = 12,
	126	.lower_margin = 17,
	127	.sync = 0,
	128	.cmap_greyscale = 0,
	129	};
	130
	131	static struct pxafb_mach_info pcm990_fbinfo __initdata = {
	132	.modes = &fb_info_nec_nl6448bc20_18d,
	133	.num_modes = 1,
9587319b	134	.lcd_conn = LCD_COLOR_TFT_16BPP \| LCD_PCLK_EDGE_FALL,
c0f7edb3 GL	135	.pxafb_lcd_power = pcm990_lcd_power,
	136	};
	137	#endif
	138
	139	static struct platform_pwm_backlight_data pcm990_backlight_data = {
	140	.pwm_id = 0,
	141	.max_brightness = 1023,
	142	.dft_brightness = 1023,
	143	.pwm_period_ns = 78770,
	144	};
	145
	146	static struct platform_device pcm990_backlight_device = {
	147	.name = "pwm-backlight",
	148	.dev = {
	149	.parent = &pxa27x_device_pwm0.dev,
	150	.platform_data = &pcm990_backlight_data,
	151	},
	152	};
2e927b76 RS	153
2e927b76 RS	154	/*
c0f7edb3	155	* The PCM-990 development baseboard uses PCM-027's hardware in the
2e927b76 RS	156	* following way:
	157	*
	158	* - LCD support is in use
	159	* - GPIO16 is output for back light on/off with PWM
	160	* - GPIO58 ... GPIO73 are outputs for display data
	161	* - GPIO74 is output output for LCDFCLK
	162	* - GPIO75 is output for LCDLCLK
	163	* - GPIO76 is output for LCDPCLK
	164	* - GPIO77 is output for LCDBIAS
	165	* - MMC support is in use
	166	* - GPIO32 is output for MMCCLK
	167	* - GPIO92 is MMDAT0
	168	* - GPIO109 is MMDAT1
	169	* - GPIO110 is MMCS0
	170	* - GPIO111 is MMCS1
	171	* - GPIO112 is MMCMD
	172	* - IDE/CF card is in use
	173	* - GPIO48 is output /POE
	174	* - GPIO49 is output /PWE
	175	* - GPIO50 is output /PIOR
	176	* - GPIO51 is output /PIOW
	177	* - GPIO54 is output /PCE2
	178	* - GPIO55 is output /PREG
	179	* - GPIO56 is input /PWAIT
	180	* - GPIO57 is output /PIOS16
	181	* - GPIO79 is output PSKTSEL
	182	* - GPIO85 is output /PCE1
	183	* - FFUART is in use
	184	* - GPIO34 is input FFRXD
	185	* - GPIO35 is input FFCTS
	186	* - GPIO36 is input FFDCD
	187	* - GPIO37 is input FFDSR
	188	* - GPIO38 is input FFRI
	189	* - GPIO39 is output FFTXD
	190	* - GPIO40 is output FFDTR
	191	* - GPIO41 is output FFRTS
	192	* - BTUART is in use
	193	* - GPIO42 is input BTRXD
	194	* - GPIO43 is output BTTXD
	195	* - GPIO44 is input BTCTS
	196	* - GPIO45 is output BTRTS
	197	* - IRUART is in use
	198	* - GPIO46 is input STDRXD
	199	* - GPIO47 is output STDTXD
	200	* - AC97 is in use*)
	201	* - GPIO28 is input AC97CLK
	202	* - GPIO29 is input AC97DatIn
	203	* - GPIO30 is output AC97DatO
	204	* - GPIO31 is output AC97SYNC
	205	* - GPIO113 is output AC97_RESET
	206	* - SSP is in use
	207	* - GPIO23 is output SSPSCLK
	208	* - GPIO24 is output chip select to Max7301
	209	* - GPIO25 is output SSPTXD
	210	* - GPIO26 is input SSPRXD
	211	* - GPIO27 is input for Max7301 IRQ
	212	* - GPIO53 is input SSPSYSCLK
	213	* - SSP3 is in use
	214	* - GPIO81 is output SSPTXD3
	215	* - GPIO82 is input SSPRXD3
	216	* - GPIO83 is output SSPSFRM
	217	* - GPIO84 is output SSPCLK3
	218	*
	219	* Otherwise claimed GPIOs:
220	* GPIO1 -> IRQ from user switch
221	* GPIO9 -> IRQ from power management
222	* GPIO10 -> IRQ from WML9712 AC97 controller
223	* GPIO11 -> IRQ from IDE controller
224	* GPIO12 -> IRQ from CF controller
225	* GPIO13 -> IRQ from CF controller
226	* GPIO14 -> GPIO free
227	* GPIO15 -> /CS1 selects baseboard's Control CPLD (U7, 16 bit wide data path)
228	* GPIO19 -> GPIO free
229	* GPIO20 -> /SDCS2
230	* GPIO21 -> /CS3 PC card socket select
231	* GPIO33 -> /CS5 network controller select
232	* GPIO78 -> /CS2 (16 bit wide data path)
233	* GPIO80 -> /CS4 (16 bit wide data path)
234	* GPIO86 -> GPIO free
235	* GPIO87 -> GPIO free
236	* GPIO90 -> LED0 on CPU module
237	* GPIO91 -> LED1 on CPI module
238	* GPIO117 -> SCL
239	* GPIO118 -> SDA
240	*/
241
242	static unsigned long pcm990_irq_enabled;
243
a3f4c927	244	static void pcm990_mask_ack_irq(struct irq_data *d)
2e927b76	245	{
a3f4c927	246	int pcm990_irq = (d->irq - PCM027_IRQ(0));
2e927b76 RS	247	PCM990_INTMSKENA = (pcm990_irq_enabled &= ~(1 << pcm990_irq));
	248	}
	249
a3f4c927	250	static void pcm990_unmask_irq(struct irq_data *d)
2e927b76	251	{
a3f4c927	252	int pcm990_irq = (d->irq - PCM027_IRQ(0));
2e927b76 RS	253	/* the irq can be acknowledged only if deasserted, so it's done here */
	254	PCM990_INTSETCLR \|= 1 << pcm990_irq;
	255	PCM990_INTMSKENA = (pcm990_irq_enabled \|= (1 << pcm990_irq));
	256	}
	257
	258	static struct irq_chip pcm990_irq_chip = {
a3f4c927 LB	259	.irq_mask_ack = pcm990_mask_ack_irq,
a3f4c927 LB	260	.irq_unmask = pcm990_unmask_irq,
2e927b76 RS	261	};
	262
	263	static void pcm990_irq_handler(unsigned int irq, struct irq_desc *desc)
	264	{
	265	unsigned long pending = (~PCM990_INTSETCLR) & pcm990_irq_enabled;
	266
	267	do {
a3f4c927 LB	268	/* clear our parent IRQ */
a3f4c927 LB	269	desc->irq_data.chip->irq_ack(&desc->irq_data);
2e927b76 RS	270	if (likely(pending)) {
2e927b76 RS	271	irq = PCM027_IRQ(0) + __ffs(pending);
d8aa0251	272	generic_handle_irq(irq);
2e927b76 RS	273	}
	274	pending = (~PCM990_INTSETCLR) & pcm990_irq_enabled;
	275	} while (pending);
	276	}
	277
	278	static void __init pcm990_init_irq(void)
	279	{
	280	int irq;
	281
	282	/* setup extra PCM990 irqs */
	283	for (irq = PCM027_IRQ(0); irq <= PCM027_IRQ(3); irq++) {
6845664a TG	284	irq_set_chip(irq, &pcm990_irq_chip);
6845664a TG	285	irq_set_handler(irq, handle_level_irq);
2e927b76 RS	286	set_irq_flags(irq, IRQF_VALID \| IRQF_PROBE);
	287	}
	288
	289	PCM990_INTMSKENA = 0x00; /* disable all Interrupts */
	290	PCM990_INTSETCLR = 0xFF;
	291
6845664a TG	292	irq_set_chained_handler(PCM990_CTRL_INT_IRQ, pcm990_irq_handler);
6845664a TG	293	irq_set_irq_type(PCM990_CTRL_INT_IRQ, PCM990_CTRL_INT_IRQ_EDGE);
2e927b76 RS	294	}
	295
	296	static int pcm990_mci_init(struct device *dev, irq_handler_t mci_detect_int,
	297	void *data)
	298	{
	299	int err;
	300
2e927b76 RS	301	err = request_irq(PCM027_MMCDET_IRQ, mci_detect_int, IRQF_DISABLED,
	302	"MMC card detect", data);
	303	if (err)
	304	printk(KERN_ERR "pcm990_mci_init: MMC/SD: can't request MMC "
	305	"card detect IRQ\n");
	306
	307	return err;
	308	}
	309
	310	static void pcm990_mci_setpower(struct device *dev, unsigned int vdd)
	311	{
	312	struct pxamci_platform_data *p_d = dev->platform_data;
	313
	314	if ((1 << vdd) & p_d->ocr_mask)
	315	__PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG5) =
	316	PCM990_CTRL_MMC2PWR;
	317	else
	318	__PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG5) =
	319	~PCM990_CTRL_MMC2PWR;
	320	}
	321
	322	static void pcm990_mci_exit(struct device dev, void data)
	323	{
	324	free_irq(PCM027_MMCDET_IRQ, data);
	325	}
	326
	327	#define MSECS_PER_JIFFY (1000/HZ)
	328
	329	static struct pxamci_platform_data pcm990_mci_platform_data = {
f97cab28	330	.detect_delay_ms = 250,
7a648256 RJ	331	.ocr_mask = MMC_VDD_32_33 \| MMC_VDD_33_34,
	332	.init = pcm990_mci_init,
	333	.setpower = pcm990_mci_setpower,
	334	.exit = pcm990_mci_exit,
	335	.gpio_card_detect = -1,
	336	.gpio_card_ro = -1,
	337	.gpio_power = -1,
2e927b76 RS	338	};
2e927b76 RS	339
2e927b76 RS	340	static struct pxaohci_platform_data pcm990_ohci_platform_data = {
2e927b76 RS	341	.port_mode = PMM_PERPORT_MODE,
097b5334 EM	342	.flags = ENABLE_PORT1 \| POWER_CONTROL_LOW \| POWER_SENSE_LOW,
097b5334 EM	343	.power_on_delay = 10,
2e927b76 RS	344	};
2e927b76 RS	345
58762e77 GL	346	/*
	347	* PXA27x Camera specific stuff
	348	*/
	349	#if defined(CONFIG_VIDEO_PXA27x) \|\| defined(CONFIG_VIDEO_PXA27x_MODULE)
6a566fbb GL	350	static unsigned long pcm990_camera_pin_config[] = {
	351	/* CIF */
	352	GPIO98_CIF_DD_0,
	353	GPIO105_CIF_DD_1,
	354	GPIO104_CIF_DD_2,
	355	GPIO103_CIF_DD_3,
	356	GPIO95_CIF_DD_4,
	357	GPIO94_CIF_DD_5,
	358	GPIO93_CIF_DD_6,
	359	GPIO108_CIF_DD_7,
	360	GPIO107_CIF_DD_8,
	361	GPIO106_CIF_DD_9,
	362	GPIO42_CIF_MCLK,
	363	GPIO45_CIF_PCLK,
	364	GPIO43_CIF_FV,
	365	GPIO44_CIF_LV,
	366	};
	367
58762e77 GL	368	/*
	369	* CICR4: PCLK_EN: Pixel clock is supplied by the sensor
	370	* MCLK_EN: Master clock is generated by PXA
	371	* PCP: Data sampled on the falling edge of pixel clock
	372	*/
	373	struct pxacamera_platform_data pcm990_pxacamera_platform_data = {
58762e77 GL	374	.flags = PXA_CAMERA_MASTER \| PXA_CAMERA_DATAWIDTH_8 \| PXA_CAMERA_DATAWIDTH_10 \|
	375	PXA_CAMERA_PCLK_EN \| PXA_CAMERA_MCLK_EN/* \| PXA_CAMERA_PCP*/,
	376	.mclk_10khz = 1000,
	377	};
	378
	379	#include <linux/i2c/pca953x.h>
	380
	381	static struct pca953x_platform_data pca9536_data = {
a48dc30d	382	.gpio_base = NR_BUILTIN_GPIO,
58762e77 GL	383	};
58762e77 GL	384
594bb46d	385	static int gpio_bus_switch = -EINVAL;
d75b1dcc SH	386
d75b1dcc SH	387	static int pcm990_camera_set_bus_param(struct soc_camera_link *link,
594bb46d	388	unsigned long flags)
d75b1dcc	389	{
594bb46d	390	if (gpio_bus_switch < 0) {
d75b1dcc SH	391	if (flags == SOCAM_DATAWIDTH_10)
	392	return 0;
	393	else
	394	return -EINVAL;
	395	}
	396
	397	if (flags & SOCAM_DATAWIDTH_8)
	398	gpio_set_value(gpio_bus_switch, 1);
	399	else
	400	gpio_set_value(gpio_bus_switch, 0);
	401
	402	return 0;
	403	}
	404
	405	static unsigned long pcm990_camera_query_bus_param(struct soc_camera_link *link)
	406	{
	407	int ret;
	408
594bb46d	409	if (gpio_bus_switch < 0) {
a48dc30d	410	ret = gpio_request(NR_BUILTIN_GPIO, "camera");
d75b1dcc	411	if (!ret) {
a48dc30d	412	gpio_bus_switch = NR_BUILTIN_GPIO;
d75b1dcc	413	gpio_direction_output(gpio_bus_switch, 0);
594bb46d	414	}
58762e77	415	}
d75b1dcc	416
594bb46d	417	if (gpio_bus_switch >= 0)
d75b1dcc SH	418	return SOCAM_DATAWIDTH_8 \| SOCAM_DATAWIDTH_10;
	419	else
	420	return SOCAM_DATAWIDTH_10;
	421	}
	422
594bb46d GL	423	static void pcm990_camera_free_bus(struct soc_camera_link *link)
	424	{
	425	if (gpio_bus_switch < 0)
	426	return;
	427
	428	gpio_free(gpio_bus_switch);
	429	gpio_bus_switch = -EINVAL;
	430	}
	431
58762e77 GL	432	/* Board I2C devices. */
	433	static struct i2c_board_info __initdata pcm990_i2c_devices[] = {
	434	{
	435	/* Must initialize before the camera(s) */
3760f736	436	I2C_BOARD_INFO("pca9536", 0x41),
58762e77	437	.platform_data = &pca9536_data,
4a3d3abe GL	438	},
	439	};
	440
	441	static struct i2c_board_info pcm990_camera_i2c[] = {
	442	{
58762e77	443	I2C_BOARD_INFO("mt9v022", 0x48),
58762e77 GL	444	}, {
58762e77 GL	445	I2C_BOARD_INFO("mt9m001", 0x5d),
4a3d3abe GL	446	},
	447	};
	448
	449	static struct soc_camera_link iclink[] = {
	450	{
	451	.bus_id = 0, /* Must match with the camera ID */
	452	.board_info = &pcm990_camera_i2c[0],
	453	.i2c_adapter_id = 0,
	454	.query_bus_param = pcm990_camera_query_bus_param,
	455	.set_bus_param = pcm990_camera_set_bus_param,
	456	.free_bus = pcm990_camera_free_bus,
4a3d3abe GL	457	}, {
	458	.bus_id = 0, /* Must match with the camera ID */
	459	.board_info = &pcm990_camera_i2c[1],
	460	.i2c_adapter_id = 0,
	461	.query_bus_param = pcm990_camera_query_bus_param,
	462	.set_bus_param = pcm990_camera_set_bus_param,
	463	.free_bus = pcm990_camera_free_bus,
4a3d3abe GL	464	},
	465	};
	466
	467	static struct platform_device pcm990_camera[] = {
	468	{
	469	.name = "soc-camera-pdrv",
	470	.id = 0,
	471	.dev = {
	472	.platform_data = &iclink[0],
	473	},
	474	}, {
	475	.name = "soc-camera-pdrv",
	476	.id = 1,
	477	.dev = {
	478	.platform_data = &iclink[1],
	479	},
58762e77 GL	480	},
	481	};
	482	#endif /* CONFIG_VIDEO_PXA27x \|\|CONFIG_VIDEO_PXA27x_MODULE */
	483
2e927b76 RS	484	/*
	485	* enable generic access to the base board control CPLDs U6 and U7
	486	*/
	487	static struct map_desc pcm990_io_desc[] __initdata = {
	488	{
	489	.virtual = PCM990_CTRL_BASE,
	490	.pfn = __phys_to_pfn(PCM990_CTRL_PHYS),
	491	.length = PCM990_CTRL_SIZE,
	492	.type = MT_DEVICE /* CPLD */
	493	}, {
	494	.virtual = PCM990_CF_PLD_BASE,
	495	.pfn = __phys_to_pfn(PCM990_CF_PLD_PHYS),
	496	.length = PCM990_CF_PLD_SIZE,
	497	.type = MT_DEVICE /* CPLD */
	498	}
	499	};
	500
	501	/*
	502	* system init for baseboard usage. Will be called by pcm027 init.
	503	*
	504	* Add platform devices present on this baseboard and init
	505	* them from CPU side as far as required to use them later on
	506	*/
	507	void __init pcm990_baseboard_init(void)
	508	{
6a566fbb GL	509	pxa2xx_mfp_config(ARRAY_AND_SIZE(pcm990_pin_config));
6a566fbb GL	510
2e927b76	511	/* register CPLD access */
6a566fbb	512	iotable_init(ARRAY_AND_SIZE(pcm990_io_desc));
2e927b76 RS	513
	514	/* register CPLD's IRQ controller */
	515	pcm990_init_irq();
	516
c0f7edb3 GL	517	#ifndef CONFIG_PCM990_DISPLAY_NONE
	518	set_pxa_fb_info(&pcm990_fbinfo);
	519	#endif
c0f7edb3 GL	520	platform_device_register(&pcm990_backlight_device);
c0f7edb3 GL	521
2e927b76 RS	522	/* MMC */
	523	pxa_set_mci_info(&pcm990_mci_platform_data);
	524
	525	/* USB host */
	526	pxa_set_ohci_info(&pcm990_ohci_platform_data);
	527
58762e77	528	pxa_set_i2c_info(NULL);
9f19d638	529	pxa_set_ac97_info(NULL);
58762e77 GL	530
58762e77 GL	531	#if defined(CONFIG_VIDEO_PXA27x) \|\| defined(CONFIG_VIDEO_PXA27x_MODULE)
0e851907	532	pxa2xx_mfp_config(ARRAY_AND_SIZE(pcm990_camera_pin_config));
58762e77 GL	533	pxa_set_camera_info(&pcm990_pxacamera_platform_data);
58762e77 GL	534
6a566fbb	535	i2c_register_board_info(0, ARRAY_AND_SIZE(pcm990_i2c_devices));
4a3d3abe GL	536
	537	platform_device_register(&pcm990_camera[0]);
	538	platform_device_register(&pcm990_camera[1]);
58762e77 GL	539	#endif
58762e77 GL	540
6a566fbb	541	printk(KERN_INFO "PCM-990 Evaluation baseboard initialized\n");
2e927b76	542	}