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1/*
2 * arch/arm/mach-pxa/pcm990-baseboard.c
3 * Support for the Phytec phyCORE-PXA270 Development Platform (PCM-990).
4 *
5 * Refer
6 * http://www.phytec.com/products/rdk/ARM-XScale/phyCORE-XScale-PXA270.html
7 * for additional hardware info
8 *
9 * Author: Juergen Kilb
10 * Created: April 05, 2005
11 * Copyright: Phytec Messtechnik GmbH
12 * e-Mail: armlinux@phytec.de
13 *
14 * based on Intel Mainstone Board
15 *
16 * Copyright 2007 Juergen Beisert @ Pengutronix (j.beisert@pengutronix.de)
17 *
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License version 2 as
20 * published by the Free Software Foundation.
21 */
22
23#include <linux/irq.h>
24#include <linux/platform_device.h>
25#include <linux/ide.h>
58762e77 26#include <linux/i2c.h>
c0f7edb3 27#include <linux/pwm_backlight.h>
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28
29#include <media/soc_camera.h>
30
31#include <asm/gpio.h>
32#include <asm/arch/i2c.h>
33#include <asm/arch/camera.h>
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34#include <asm/mach/map.h>
35#include <asm/arch/pxa-regs.h>
9f19d638 36#include <asm/arch/audio.h>
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37#include <asm/arch/mmc.h>
38#include <asm/arch/ohci.h>
39#include <asm/arch/pcm990_baseboard.h>
c0f7edb3 40#include <asm/arch/pxafb.h>
6a566fbb 41#include <asm/arch/mfp-pxa27x.h>
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42
43#include "devices.h"
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44#include "generic.h"
45
46static unsigned long pcm990_pin_config[] __initdata = {
47 /* MMC */
48 GPIO32_MMC_CLK,
49 GPIO112_MMC_CMD,
50 GPIO92_MMC_DAT_0,
51 GPIO109_MMC_DAT_1,
52 GPIO110_MMC_DAT_2,
53 GPIO111_MMC_DAT_3,
54 /* USB */
55 GPIO88_USBH1_PWR,
56 GPIO89_USBH1_PEN,
57 /* PWM0 */
58 GPIO16_PWM0_OUT,
59};
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60
61/*
62 * pcm990_lcd_power - control power supply to the LCD
63 * @on: 0 = switch off, 1 = switch on
64 *
65 * Called by the pxafb driver
66 */
67#ifndef CONFIG_PCM990_DISPLAY_NONE
68static void pcm990_lcd_power(int on, struct fb_var_screeninfo *var)
69{
70 if (on) {
71 /* enable LCD-Latches
72 * power on LCD
73 */
74 __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG3) =
75 PCM990_CTRL_LCDPWR + PCM990_CTRL_LCDON;
76 } else {
77 /* disable LCD-Latches
78 * power off LCD
79 */
80 __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG3) = 0x00;
81 }
82}
83#endif
84
85#if defined(CONFIG_PCM990_DISPLAY_SHARP)
86static struct pxafb_mode_info fb_info_sharp_lq084v1dg21 = {
87 .pixclock = 28000,
88 .xres = 640,
89 .yres = 480,
90 .bpp = 16,
91 .hsync_len = 20,
92 .left_margin = 103,
93 .right_margin = 47,
94 .vsync_len = 6,
95 .upper_margin = 28,
96 .lower_margin = 5,
97 .sync = 0,
98 .cmap_greyscale = 0,
99};
100
101static struct pxafb_mach_info pcm990_fbinfo __initdata = {
102 .modes = &fb_info_sharp_lq084v1dg21,
103 .num_modes = 1,
104 .lccr0 = LCCR0_PAS,
105 .lccr3 = LCCR3_PCP,
106 .pxafb_lcd_power = pcm990_lcd_power,
107};
108#elif defined(CONFIG_PCM990_DISPLAY_NEC)
109struct pxafb_mode_info fb_info_nec_nl6448bc20_18d = {
110 .pixclock = 39720,
111 .xres = 640,
112 .yres = 480,
113 .bpp = 16,
114 .hsync_len = 32,
115 .left_margin = 16,
116 .right_margin = 48,
117 .vsync_len = 2,
118 .upper_margin = 12,
119 .lower_margin = 17,
120 .sync = 0,
121 .cmap_greyscale = 0,
122};
123
124static struct pxafb_mach_info pcm990_fbinfo __initdata = {
125 .modes = &fb_info_nec_nl6448bc20_18d,
126 .num_modes = 1,
127 .lccr0 = LCCR0_Act,
128 .lccr3 = LCCR3_PixFlEdg,
129 .pxafb_lcd_power = pcm990_lcd_power,
130};
131#endif
132
133static struct platform_pwm_backlight_data pcm990_backlight_data = {
134 .pwm_id = 0,
135 .max_brightness = 1023,
136 .dft_brightness = 1023,
137 .pwm_period_ns = 78770,
138};
139
140static struct platform_device pcm990_backlight_device = {
141 .name = "pwm-backlight",
142 .dev = {
143 .parent = &pxa27x_device_pwm0.dev,
144 .platform_data = &pcm990_backlight_data,
145 },
146};
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147
148/*
c0f7edb3 149 * The PCM-990 development baseboard uses PCM-027's hardware in the
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150 * following way:
151 *
152 * - LCD support is in use
153 * - GPIO16 is output for back light on/off with PWM
154 * - GPIO58 ... GPIO73 are outputs for display data
155 * - GPIO74 is output output for LCDFCLK
156 * - GPIO75 is output for LCDLCLK
157 * - GPIO76 is output for LCDPCLK
158 * - GPIO77 is output for LCDBIAS
159 * - MMC support is in use
160 * - GPIO32 is output for MMCCLK
161 * - GPIO92 is MMDAT0
162 * - GPIO109 is MMDAT1
163 * - GPIO110 is MMCS0
164 * - GPIO111 is MMCS1
165 * - GPIO112 is MMCMD
166 * - IDE/CF card is in use
167 * - GPIO48 is output /POE
168 * - GPIO49 is output /PWE
169 * - GPIO50 is output /PIOR
170 * - GPIO51 is output /PIOW
171 * - GPIO54 is output /PCE2
172 * - GPIO55 is output /PREG
173 * - GPIO56 is input /PWAIT
174 * - GPIO57 is output /PIOS16
175 * - GPIO79 is output PSKTSEL
176 * - GPIO85 is output /PCE1
177 * - FFUART is in use
178 * - GPIO34 is input FFRXD
179 * - GPIO35 is input FFCTS
180 * - GPIO36 is input FFDCD
181 * - GPIO37 is input FFDSR
182 * - GPIO38 is input FFRI
183 * - GPIO39 is output FFTXD
184 * - GPIO40 is output FFDTR
185 * - GPIO41 is output FFRTS
186 * - BTUART is in use
187 * - GPIO42 is input BTRXD
188 * - GPIO43 is output BTTXD
189 * - GPIO44 is input BTCTS
190 * - GPIO45 is output BTRTS
191 * - IRUART is in use
192 * - GPIO46 is input STDRXD
193 * - GPIO47 is output STDTXD
194 * - AC97 is in use*)
195 * - GPIO28 is input AC97CLK
196 * - GPIO29 is input AC97DatIn
197 * - GPIO30 is output AC97DatO
198 * - GPIO31 is output AC97SYNC
199 * - GPIO113 is output AC97_RESET
200 * - SSP is in use
201 * - GPIO23 is output SSPSCLK
202 * - GPIO24 is output chip select to Max7301
203 * - GPIO25 is output SSPTXD
204 * - GPIO26 is input SSPRXD
205 * - GPIO27 is input for Max7301 IRQ
206 * - GPIO53 is input SSPSYSCLK
207 * - SSP3 is in use
208 * - GPIO81 is output SSPTXD3
209 * - GPIO82 is input SSPRXD3
210 * - GPIO83 is output SSPSFRM
211 * - GPIO84 is output SSPCLK3
212 *
213 * Otherwise claimed GPIOs:
214 * GPIO1 -> IRQ from user switch
215 * GPIO9 -> IRQ from power management
216 * GPIO10 -> IRQ from WML9712 AC97 controller
217 * GPIO11 -> IRQ from IDE controller
218 * GPIO12 -> IRQ from CF controller
219 * GPIO13 -> IRQ from CF controller
220 * GPIO14 -> GPIO free
221 * GPIO15 -> /CS1 selects baseboard's Control CPLD (U7, 16 bit wide data path)
222 * GPIO19 -> GPIO free
223 * GPIO20 -> /SDCS2
224 * GPIO21 -> /CS3 PC card socket select
225 * GPIO33 -> /CS5 network controller select
226 * GPIO78 -> /CS2 (16 bit wide data path)
227 * GPIO80 -> /CS4 (16 bit wide data path)
228 * GPIO86 -> GPIO free
229 * GPIO87 -> GPIO free
230 * GPIO90 -> LED0 on CPU module
231 * GPIO91 -> LED1 on CPI module
232 * GPIO117 -> SCL
233 * GPIO118 -> SDA
234 */
235
236static unsigned long pcm990_irq_enabled;
237
238static void pcm990_mask_ack_irq(unsigned int irq)
239{
240 int pcm990_irq = (irq - PCM027_IRQ(0));
241 PCM990_INTMSKENA = (pcm990_irq_enabled &= ~(1 << pcm990_irq));
242}
243
244static void pcm990_unmask_irq(unsigned int irq)
245{
246 int pcm990_irq = (irq - PCM027_IRQ(0));
247 /* the irq can be acknowledged only if deasserted, so it's done here */
248 PCM990_INTSETCLR |= 1 << pcm990_irq;
249 PCM990_INTMSKENA = (pcm990_irq_enabled |= (1 << pcm990_irq));
250}
251
252static struct irq_chip pcm990_irq_chip = {
253 .mask_ack = pcm990_mask_ack_irq,
254 .unmask = pcm990_unmask_irq,
255};
256
257static void pcm990_irq_handler(unsigned int irq, struct irq_desc *desc)
258{
259 unsigned long pending = (~PCM990_INTSETCLR) & pcm990_irq_enabled;
260
261 do {
262 GEDR(PCM990_CTRL_INT_IRQ_GPIO) =
263 GPIO_bit(PCM990_CTRL_INT_IRQ_GPIO);
264 if (likely(pending)) {
265 irq = PCM027_IRQ(0) + __ffs(pending);
266 desc = irq_desc + irq;
267 desc_handle_irq(irq, desc);
268 }
269 pending = (~PCM990_INTSETCLR) & pcm990_irq_enabled;
270 } while (pending);
271}
272
273static void __init pcm990_init_irq(void)
274{
275 int irq;
276
277 /* setup extra PCM990 irqs */
278 for (irq = PCM027_IRQ(0); irq <= PCM027_IRQ(3); irq++) {
279 set_irq_chip(irq, &pcm990_irq_chip);
280 set_irq_handler(irq, handle_level_irq);
281 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
282 }
283
284 PCM990_INTMSKENA = 0x00; /* disable all Interrupts */
285 PCM990_INTSETCLR = 0xFF;
286
287 set_irq_chained_handler(PCM990_CTRL_INT_IRQ, pcm990_irq_handler);
288 set_irq_type(PCM990_CTRL_INT_IRQ, PCM990_CTRL_INT_IRQ_EDGE);
289}
290
291static int pcm990_mci_init(struct device *dev, irq_handler_t mci_detect_int,
292 void *data)
293{
294 int err;
295
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296 err = request_irq(PCM027_MMCDET_IRQ, mci_detect_int, IRQF_DISABLED,
297 "MMC card detect", data);
298 if (err)
299 printk(KERN_ERR "pcm990_mci_init: MMC/SD: can't request MMC "
300 "card detect IRQ\n");
301
302 return err;
303}
304
305static void pcm990_mci_setpower(struct device *dev, unsigned int vdd)
306{
307 struct pxamci_platform_data *p_d = dev->platform_data;
308
309 if ((1 << vdd) & p_d->ocr_mask)
310 __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG5) =
311 PCM990_CTRL_MMC2PWR;
312 else
313 __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG5) =
314 ~PCM990_CTRL_MMC2PWR;
315}
316
317static void pcm990_mci_exit(struct device *dev, void *data)
318{
319 free_irq(PCM027_MMCDET_IRQ, data);
320}
321
322#define MSECS_PER_JIFFY (1000/HZ)
323
324static struct pxamci_platform_data pcm990_mci_platform_data = {
325 .detect_delay = 250 / MSECS_PER_JIFFY,
326 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
327 .init = pcm990_mci_init,
328 .setpower = pcm990_mci_setpower,
329 .exit = pcm990_mci_exit,
330};
331
332/*
333 * init OHCI hardware to work with
334 *
335 * Note: Only USB port 1 (host only) is connected
336 *
337 * GPIO88 (USBHPWR#1): overcurrent in, overcurrent when low
338 * GPIO89 (USBHPEN#1): power-on out, on when low
339 */
340static int pcm990_ohci_init(struct device *dev)
341{
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342 /*
343 * disable USB port 2 and 3
344 * power sense is active low
345 */
346 UHCHR = ((UHCHR) | UHCHR_PCPL | UHCHR_PSPL | UHCHR_SSEP2 |
347 UHCHR_SSEP3) & ~(UHCHR_SSEP1 | UHCHR_SSE);
348 /*
349 * wait 10ms after Power on
350 * overcurrent per port
351 * power switch per port
352 */
353 UHCRHDA = (5<<24) | (1<<11) | (1<<8); /* FIXME: Required? */
354
355 return 0;
356}
357
358static struct pxaohci_platform_data pcm990_ohci_platform_data = {
359 .port_mode = PMM_PERPORT_MODE,
360 .init = pcm990_ohci_init,
361 .exit = NULL,
362};
363
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364/*
365 * PXA27x Camera specific stuff
366 */
367#if defined(CONFIG_VIDEO_PXA27x) || defined(CONFIG_VIDEO_PXA27x_MODULE)
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368static unsigned long pcm990_camera_pin_config[] = {
369 /* CIF */
370 GPIO98_CIF_DD_0,
371 GPIO105_CIF_DD_1,
372 GPIO104_CIF_DD_2,
373 GPIO103_CIF_DD_3,
374 GPIO95_CIF_DD_4,
375 GPIO94_CIF_DD_5,
376 GPIO93_CIF_DD_6,
377 GPIO108_CIF_DD_7,
378 GPIO107_CIF_DD_8,
379 GPIO106_CIF_DD_9,
380 GPIO42_CIF_MCLK,
381 GPIO45_CIF_PCLK,
382 GPIO43_CIF_FV,
383 GPIO44_CIF_LV,
384};
385
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386static int pcm990_pxacamera_init(struct device *dev)
387{
6a566fbb 388 pxa2xx_mfp_config(ARRAY_AND_SIZE(pcm990_camera_pin_config));
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389 return 0;
390}
391
392/*
393 * CICR4: PCLK_EN: Pixel clock is supplied by the sensor
394 * MCLK_EN: Master clock is generated by PXA
395 * PCP: Data sampled on the falling edge of pixel clock
396 */
397struct pxacamera_platform_data pcm990_pxacamera_platform_data = {
398 .init = pcm990_pxacamera_init,
399 .flags = PXA_CAMERA_MASTER | PXA_CAMERA_DATAWIDTH_8 | PXA_CAMERA_DATAWIDTH_10 |
400 PXA_CAMERA_PCLK_EN | PXA_CAMERA_MCLK_EN/* | PXA_CAMERA_PCP*/,
401 .mclk_10khz = 1000,
402};
403
404#include <linux/i2c/pca953x.h>
405
406static struct pca953x_platform_data pca9536_data = {
407 .gpio_base = NR_BUILTIN_GPIO + 1,
408};
409
410static struct soc_camera_link iclink[] = {
411 {
412 .bus_id = 0, /* Must match with the camera ID above */
413 .gpio = NR_BUILTIN_GPIO + 1,
414 }, {
415 .bus_id = 0, /* Must match with the camera ID above */
416 }
417};
418
419/* Board I2C devices. */
420static struct i2c_board_info __initdata pcm990_i2c_devices[] = {
421 {
422 /* Must initialize before the camera(s) */
3760f736 423 I2C_BOARD_INFO("pca9536", 0x41),
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424 .platform_data = &pca9536_data,
425 }, {
426 I2C_BOARD_INFO("mt9v022", 0x48),
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427 .platform_data = &iclink[0], /* With extender */
428 }, {
429 I2C_BOARD_INFO("mt9m001", 0x5d),
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430 .platform_data = &iclink[0], /* With extender */
431 },
432};
433#endif /* CONFIG_VIDEO_PXA27x ||CONFIG_VIDEO_PXA27x_MODULE */
434
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435/*
436 * enable generic access to the base board control CPLDs U6 and U7
437 */
438static struct map_desc pcm990_io_desc[] __initdata = {
439 {
440 .virtual = PCM990_CTRL_BASE,
441 .pfn = __phys_to_pfn(PCM990_CTRL_PHYS),
442 .length = PCM990_CTRL_SIZE,
443 .type = MT_DEVICE /* CPLD */
444 }, {
445 .virtual = PCM990_CF_PLD_BASE,
446 .pfn = __phys_to_pfn(PCM990_CF_PLD_PHYS),
447 .length = PCM990_CF_PLD_SIZE,
448 .type = MT_DEVICE /* CPLD */
449 }
450};
451
452/*
453 * system init for baseboard usage. Will be called by pcm027 init.
454 *
455 * Add platform devices present on this baseboard and init
456 * them from CPU side as far as required to use them later on
457 */
458void __init pcm990_baseboard_init(void)
459{
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460 pxa2xx_mfp_config(ARRAY_AND_SIZE(pcm990_pin_config));
461
2e927b76 462 /* register CPLD access */
6a566fbb 463 iotable_init(ARRAY_AND_SIZE(pcm990_io_desc));
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464
465 /* register CPLD's IRQ controller */
466 pcm990_init_irq();
467
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468#ifndef CONFIG_PCM990_DISPLAY_NONE
469 set_pxa_fb_info(&pcm990_fbinfo);
470#endif
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471 platform_device_register(&pcm990_backlight_device);
472
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473 /* MMC */
474 pxa_set_mci_info(&pcm990_mci_platform_data);
475
476 /* USB host */
477 pxa_set_ohci_info(&pcm990_ohci_platform_data);
478
58762e77 479 pxa_set_i2c_info(NULL);
9f19d638 480 pxa_set_ac97_info(NULL);
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481
482#if defined(CONFIG_VIDEO_PXA27x) || defined(CONFIG_VIDEO_PXA27x_MODULE)
483 pxa_set_camera_info(&pcm990_pxacamera_platform_data);
484
6a566fbb 485 i2c_register_board_info(0, ARRAY_AND_SIZE(pcm990_i2c_devices));
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486#endif
487
6a566fbb 488 printk(KERN_INFO "PCM-990 Evaluation baseboard initialized\n");
2e927b76 489}