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8ad68bbf CM |
1 | /* |
2 | * linux/arch/arm/mach-realview/core.c | |
3 | * | |
4 | * Copyright (C) 1999 - 2003 ARM Limited | |
5 | * Copyright (C) 2000 Deep Blue Solutions Ltd | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License as published by | |
9 | * the Free Software Foundation; either version 2 of the License, or | |
10 | * (at your option) any later version. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License | |
18 | * along with this program; if not, write to the Free Software | |
19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
20 | */ | |
8ad68bbf | 21 | #include <linux/init.h> |
1be7228d | 22 | #include <linux/platform_device.h> |
8ad68bbf | 23 | #include <linux/dma-mapping.h> |
edbaa603 | 24 | #include <linux/device.h> |
8ad68bbf | 25 | #include <linux/interrupt.h> |
a62c80e5 RK |
26 | #include <linux/amba/bus.h> |
27 | #include <linux/amba/clcd.h> | |
11c32d7b | 28 | #include <linux/platform_data/video-clcd-versatile.h> |
fced80c7 | 29 | #include <linux/io.h> |
c5142e84 | 30 | #include <linux/smsc911x.h> |
b70661c7 | 31 | #include <linux/smc91x.h> |
6be62ba2 | 32 | #include <linux/ata_platform.h> |
6ef297f8 | 33 | #include <linux/amba/mmci.h> |
5a0e3ad6 | 34 | #include <linux/gfp.h> |
b8b87aef | 35 | #include <linux/mtd/physmap.h> |
1c2f87c2 | 36 | #include <linux/memblock.h> |
8ad68bbf | 37 | |
a09e64fb | 38 | #include <mach/hardware.h> |
8ad68bbf | 39 | #include <asm/irq.h> |
68c3d935 | 40 | #include <asm/mach-types.h> |
8ad68bbf | 41 | #include <asm/hardware/arm_timer.h> |
c5a0adb5 | 42 | #include <asm/hardware/icst.h> |
8ad68bbf CM |
43 | |
44 | #include <asm/mach/arch.h> | |
8ad68bbf | 45 | #include <asm/mach/irq.h> |
8ad68bbf | 46 | #include <asm/mach/map.h> |
8ad68bbf | 47 | |
8ad68bbf | 48 | |
ee8c9571 CM |
49 | #include <mach/platform.h> |
50 | #include <mach/irqs.h> | |
8a9618f5 | 51 | #include <asm/hardware/timer-sp.h> |
ee8c9571 | 52 | |
1da0c89c RK |
53 | #include <plat/sched_clock.h> |
54 | ||
8ad68bbf | 55 | #include "core.h" |
8ad68bbf | 56 | |
8ad68bbf CM |
57 | #define REALVIEW_FLASHCTRL (__io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_FLASH_OFFSET) |
58 | ||
667f390b | 59 | static void realview_flash_set_vpp(struct platform_device *pdev, int on) |
8ad68bbf CM |
60 | { |
61 | u32 val; | |
62 | ||
63 | val = __raw_readl(REALVIEW_FLASHCTRL); | |
64 | if (on) | |
65 | val |= REALVIEW_FLASHPROG_FLVPPEN; | |
66 | else | |
67 | val &= ~REALVIEW_FLASHPROG_FLVPPEN; | |
68 | __raw_writel(val, REALVIEW_FLASHCTRL); | |
69 | } | |
70 | ||
b8b87aef | 71 | static struct physmap_flash_data realview_flash_data = { |
8ad68bbf | 72 | .width = 4, |
8ad68bbf CM |
73 | .set_vpp = realview_flash_set_vpp, |
74 | }; | |
75 | ||
8ad68bbf | 76 | struct platform_device realview_flash_device = { |
b8b87aef | 77 | .name = "physmap-flash", |
8ad68bbf CM |
78 | .id = 0, |
79 | .dev = { | |
80 | .platform_data = &realview_flash_data, | |
81 | }, | |
8ad68bbf CM |
82 | }; |
83 | ||
a44ddfd5 CM |
84 | int realview_flash_register(struct resource *res, u32 num) |
85 | { | |
86 | realview_flash_device.resource = res; | |
87 | realview_flash_device.num_resources = num; | |
88 | return platform_device_register(&realview_flash_device); | |
89 | } | |
90 | ||
c5142e84 SG |
91 | static struct smsc911x_platform_config smsc911x_config = { |
92 | .flags = SMSC911X_USE_32BIT, | |
93 | .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH, | |
94 | .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL, | |
95 | .phy_interface = PHY_INTERFACE_MODE_MII, | |
0a5b2f6b CM |
96 | }; |
97 | ||
b70661c7 AB |
98 | static struct smc91x_platdata smc91x_platdata = { |
99 | .flags = SMC91X_USE_32BIT | SMC91X_NOWAIT, | |
100 | }; | |
101 | ||
0a381330 | 102 | static struct platform_device realview_eth_device = { |
c5142e84 | 103 | .name = "smsc911x", |
0a381330 CM |
104 | .id = 0, |
105 | .num_resources = 2, | |
106 | }; | |
107 | ||
108 | int realview_eth_register(const char *name, struct resource *res) | |
109 | { | |
110 | if (name) | |
111 | realview_eth_device.name = name; | |
112 | realview_eth_device.resource = res; | |
c5142e84 SG |
113 | if (strcmp(realview_eth_device.name, "smsc911x") == 0) |
114 | realview_eth_device.dev.platform_data = &smsc911x_config; | |
b70661c7 AB |
115 | else |
116 | realview_eth_device.dev.platform_data = &smc91x_platdata; | |
0a381330 CM |
117 | |
118 | return platform_device_register(&realview_eth_device); | |
7db21712 CM |
119 | } |
120 | ||
121 | struct platform_device realview_usb_device = { | |
122 | .name = "isp1760", | |
123 | .num_resources = 2, | |
124 | }; | |
125 | ||
126 | int realview_usb_register(struct resource *res) | |
127 | { | |
128 | realview_usb_device.resource = res; | |
129 | return platform_device_register(&realview_usb_device); | |
0a381330 CM |
130 | } |
131 | ||
6be62ba2 CM |
132 | static struct pata_platform_info pata_platform_data = { |
133 | .ioport_shift = 1, | |
134 | }; | |
135 | ||
136 | static struct resource pata_resources[] = { | |
137 | [0] = { | |
138 | .start = REALVIEW_CF_BASE, | |
139 | .end = REALVIEW_CF_BASE + 0xff, | |
140 | .flags = IORESOURCE_MEM, | |
141 | }, | |
142 | [1] = { | |
143 | .start = REALVIEW_CF_BASE + 0x100, | |
144 | .end = REALVIEW_CF_BASE + SZ_4K - 1, | |
145 | .flags = IORESOURCE_MEM, | |
146 | }, | |
147 | }; | |
148 | ||
149 | struct platform_device realview_cf_device = { | |
150 | .name = "pata_platform", | |
151 | .id = -1, | |
152 | .num_resources = ARRAY_SIZE(pata_resources), | |
153 | .resource = pata_resources, | |
154 | .dev = { | |
155 | .platform_data = &pata_platform_data, | |
156 | }, | |
157 | }; | |
158 | ||
e4ecf2bd LW |
159 | static struct resource realview_leds_resources[] = { |
160 | { | |
161 | .start = REALVIEW_SYS_BASE + REALVIEW_SYS_LED_OFFSET, | |
162 | .end = REALVIEW_SYS_BASE + REALVIEW_SYS_LED_OFFSET + 4, | |
163 | .flags = IORESOURCE_MEM, | |
164 | }, | |
165 | }; | |
166 | ||
167 | struct platform_device realview_leds_device = { | |
168 | .name = "versatile-leds", | |
169 | .id = -1, | |
170 | .num_resources = ARRAY_SIZE(realview_leds_resources), | |
171 | .resource = realview_leds_resources, | |
172 | }; | |
173 | ||
6b65cd74 RK |
174 | static struct resource realview_i2c_resource = { |
175 | .start = REALVIEW_I2C_BASE, | |
176 | .end = REALVIEW_I2C_BASE + SZ_4K - 1, | |
177 | .flags = IORESOURCE_MEM, | |
178 | }; | |
179 | ||
180 | struct platform_device realview_i2c_device = { | |
181 | .name = "versatile-i2c", | |
533ad5e6 | 182 | .id = 0, |
6b65cd74 RK |
183 | .num_resources = 1, |
184 | .resource = &realview_i2c_resource, | |
185 | }; | |
186 | ||
533ad5e6 CM |
187 | static struct i2c_board_info realview_i2c_board_info[] = { |
188 | { | |
64e8be6e | 189 | I2C_BOARD_INFO("ds1338", 0xd0 >> 1), |
533ad5e6 CM |
190 | }, |
191 | }; | |
192 | ||
193 | static int __init realview_i2c_init(void) | |
194 | { | |
195 | return i2c_register_board_info(0, realview_i2c_board_info, | |
196 | ARRAY_SIZE(realview_i2c_board_info)); | |
197 | } | |
198 | arch_initcall(realview_i2c_init); | |
199 | ||
8ad68bbf CM |
200 | #define REALVIEW_SYSMCI (__io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_MCI_OFFSET) |
201 | ||
98b0979f RK |
202 | /* |
203 | * This is only used if GPIOLIB support is disabled | |
204 | */ | |
8ad68bbf CM |
205 | static unsigned int realview_mmc_status(struct device *dev) |
206 | { | |
207 | struct amba_device *adev = container_of(dev, struct amba_device, dev); | |
208 | u32 mask; | |
209 | ||
48f1d5a3 LW |
210 | if (machine_is_realview_pb1176()) { |
211 | static bool inserted = false; | |
212 | ||
213 | /* | |
214 | * The PB1176 does not have the status register, | |
215 | * assume it is inserted at startup, then invert | |
216 | * for each call so card insertion/removal will | |
217 | * be detected anyway. This will not be called if | |
218 | * GPIO on PL061 is active, which is the proper | |
219 | * way to do this on the PB1176. | |
220 | */ | |
221 | inserted = !inserted; | |
222 | return inserted ? 0 : 1; | |
223 | } | |
224 | ||
8ad68bbf CM |
225 | if (adev->res.start == REALVIEW_MMCI0_BASE) |
226 | mask = 1; | |
227 | else | |
228 | mask = 2; | |
229 | ||
74bc8093 | 230 | return readl(REALVIEW_SYSMCI) & mask; |
8ad68bbf CM |
231 | } |
232 | ||
6ef297f8 | 233 | struct mmci_platform_data realview_mmc0_plat_data = { |
8ad68bbf CM |
234 | .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, |
235 | .status = realview_mmc_status, | |
98b0979f RK |
236 | .gpio_wp = 17, |
237 | .gpio_cd = 16, | |
29719445 | 238 | .cd_invert = true, |
8ad68bbf CM |
239 | }; |
240 | ||
6ef297f8 | 241 | struct mmci_platform_data realview_mmc1_plat_data = { |
8ad68bbf CM |
242 | .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, |
243 | .status = realview_mmc_status, | |
98b0979f RK |
244 | .gpio_wp = 19, |
245 | .gpio_cd = 18, | |
29719445 | 246 | .cd_invert = true, |
8ad68bbf CM |
247 | }; |
248 | ||
631e55f9 | 249 | void __init realview_init_early(void) |
cf30fb4a | 250 | { |
631e55f9 RK |
251 | void __iomem *sys = __io_address(REALVIEW_SYS_BASE); |
252 | ||
631e55f9 | 253 | versatile_sched_clock_init(sys + REALVIEW_SYS_24MHz_OFFSET, 24000000); |
cf30fb4a | 254 | } |
cf30fb4a | 255 | |
8ad68bbf CM |
256 | /* |
257 | * CLCD support. | |
258 | */ | |
8ad68bbf CM |
259 | #define SYS_CLCD_NLCDIOON (1 << 2) |
260 | #define SYS_CLCD_VDDPOSSWITCH (1 << 3) | |
261 | #define SYS_CLCD_PWR3V5SWITCH (1 << 4) | |
262 | #define SYS_CLCD_ID_MASK (0x1f << 8) | |
263 | #define SYS_CLCD_ID_SANYO_3_8 (0x00 << 8) | |
264 | #define SYS_CLCD_ID_UNKNOWN_8_4 (0x01 << 8) | |
265 | #define SYS_CLCD_ID_EPSON_2_2 (0x02 << 8) | |
266 | #define SYS_CLCD_ID_SANYO_2_5 (0x07 << 8) | |
267 | #define SYS_CLCD_ID_VGA (0x1f << 8) | |
268 | ||
8ad68bbf CM |
269 | /* |
270 | * Disable all display connectors on the interface module. | |
271 | */ | |
272 | static void realview_clcd_disable(struct clcd_fb *fb) | |
273 | { | |
274 | void __iomem *sys_clcd = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_CLCD_OFFSET; | |
275 | u32 val; | |
276 | ||
277 | val = readl(sys_clcd); | |
278 | val &= ~SYS_CLCD_NLCDIOON | SYS_CLCD_PWR3V5SWITCH; | |
279 | writel(val, sys_clcd); | |
280 | } | |
281 | ||
282 | /* | |
283 | * Enable the relevant connector on the interface module. | |
284 | */ | |
285 | static void realview_clcd_enable(struct clcd_fb *fb) | |
286 | { | |
287 | void __iomem *sys_clcd = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_CLCD_OFFSET; | |
288 | u32 val; | |
289 | ||
8ad68bbf | 290 | /* |
9e7714d0 | 291 | * Enable the PSUs |
8ad68bbf | 292 | */ |
9e7714d0 | 293 | val = readl(sys_clcd); |
8ad68bbf CM |
294 | val |= SYS_CLCD_NLCDIOON | SYS_CLCD_PWR3V5SWITCH; |
295 | writel(val, sys_clcd); | |
296 | } | |
297 | ||
3cb5ee49 RK |
298 | /* |
299 | * Detect which LCD panel is connected, and return the appropriate | |
300 | * clcd_panel structure. Note: we do not have any information on | |
301 | * the required timings for the 8.4in panel, so we presently assume | |
302 | * VGA timings. | |
303 | */ | |
8ad68bbf CM |
304 | static int realview_clcd_setup(struct clcd_fb *fb) |
305 | { | |
3cb5ee49 RK |
306 | void __iomem *sys_clcd = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_CLCD_OFFSET; |
307 | const char *panel_name, *vga_panel_name; | |
c34a1025 | 308 | unsigned long framesize; |
3cb5ee49 | 309 | u32 val; |
8ad68bbf | 310 | |
3cb5ee49 | 311 | if (machine_is_realview_eb()) { |
c34a1025 CT |
312 | /* VGA, 16bpp */ |
313 | framesize = 640 * 480 * 2; | |
3cb5ee49 RK |
314 | vga_panel_name = "VGA"; |
315 | } else { | |
c34a1025 CT |
316 | /* XVGA, 16bpp */ |
317 | framesize = 1024 * 768 * 2; | |
3cb5ee49 | 318 | vga_panel_name = "XVGA"; |
8ad68bbf CM |
319 | } |
320 | ||
3cb5ee49 RK |
321 | val = readl(sys_clcd) & SYS_CLCD_ID_MASK; |
322 | if (val == SYS_CLCD_ID_SANYO_3_8) | |
323 | panel_name = "Sanyo TM38QV67A02A"; | |
324 | else if (val == SYS_CLCD_ID_SANYO_2_5) | |
325 | panel_name = "Sanyo QVGA Portrait"; | |
326 | else if (val == SYS_CLCD_ID_EPSON_2_2) | |
327 | panel_name = "Epson L2F50113T00"; | |
328 | else if (val == SYS_CLCD_ID_VGA) | |
329 | panel_name = vga_panel_name; | |
330 | else { | |
331 | pr_err("CLCD: unknown LCD panel ID 0x%08x, using VGA\n", val); | |
332 | panel_name = vga_panel_name; | |
333 | } | |
8ad68bbf | 334 | |
3cb5ee49 RK |
335 | fb->panel = versatile_clcd_get_panel(panel_name); |
336 | if (!fb->panel) | |
337 | return -EINVAL; | |
8ad68bbf | 338 | |
3cb5ee49 | 339 | return versatile_clcd_setup_dma(fb, framesize); |
8ad68bbf CM |
340 | } |
341 | ||
342 | struct clcd_board clcd_plat_data = { | |
343 | .name = "RealView", | |
3cb5ee49 | 344 | .caps = CLCD_CAP_ALL, |
8ad68bbf CM |
345 | .check = clcdfb_check, |
346 | .decode = clcdfb_decode, | |
347 | .disable = realview_clcd_disable, | |
348 | .enable = realview_clcd_enable, | |
349 | .setup = realview_clcd_setup, | |
3cb5ee49 RK |
350 | .mmap = versatile_clcd_mmap_dma, |
351 | .remove = versatile_clcd_remove_dma, | |
8ad68bbf CM |
352 | }; |
353 | ||
8ad68bbf CM |
354 | /* |
355 | * Where is the timer (VA)? | |
356 | */ | |
80192735 CM |
357 | void __iomem *timer0_va_base; |
358 | void __iomem *timer1_va_base; | |
359 | void __iomem *timer2_va_base; | |
360 | void __iomem *timer3_va_base; | |
8ad68bbf | 361 | |
8ad68bbf | 362 | /* |
a8655e83 | 363 | * Set up the clock source and clock events devices |
8ad68bbf | 364 | */ |
8cc4c548 | 365 | void __init realview_timer_init(unsigned int timer_irq) |
8ad68bbf CM |
366 | { |
367 | u32 val; | |
368 | ||
369 | /* | |
370 | * set clock frequency: | |
371 | * REALVIEW_REFCLK is 32KHz | |
372 | * REALVIEW_TIMCLK is 1MHz | |
373 | */ | |
374 | val = readl(__io_address(REALVIEW_SCTL_BASE)); | |
375 | writel((REALVIEW_TIMCLK << REALVIEW_TIMER1_EnSel) | | |
376 | (REALVIEW_TIMCLK << REALVIEW_TIMER2_EnSel) | | |
377 | (REALVIEW_TIMCLK << REALVIEW_TIMER3_EnSel) | | |
378 | (REALVIEW_TIMCLK << REALVIEW_TIMER4_EnSel) | val, | |
379 | __io_address(REALVIEW_SCTL_BASE)); | |
380 | ||
381 | /* | |
382 | * Initialise to a known state (all timers off) | |
383 | */ | |
80192735 CM |
384 | writel(0, timer0_va_base + TIMER_CTRL); |
385 | writel(0, timer1_va_base + TIMER_CTRL); | |
386 | writel(0, timer2_va_base + TIMER_CTRL); | |
387 | writel(0, timer3_va_base + TIMER_CTRL); | |
8ad68bbf | 388 | |
fb593cf3 | 389 | sp804_clocksource_init(timer3_va_base, "timer3"); |
57cc4f7d | 390 | sp804_clockevents_init(timer0_va_base, timer_irq, "timer0"); |
8ad68bbf | 391 | } |
5b39d154 CM |
392 | |
393 | /* | |
394 | * Setup the memory banks. | |
395 | */ | |
1c2f87c2 | 396 | void realview_fixup(struct tag *tags, char **from) |
5b39d154 CM |
397 | { |
398 | /* | |
399 | * Most RealView platforms have 512MB contiguous RAM at 0x70000000. | |
400 | * Half of this is mirrored at 0. | |
401 | */ | |
402 | #ifdef CONFIG_REALVIEW_HIGH_PHYS_OFFSET | |
1c2f87c2 | 403 | memblock_add(0x70000000, SZ_512M); |
5b39d154 | 404 | #else |
1c2f87c2 | 405 | memblock_add(0, SZ_256M); |
5b39d154 CM |
406 | #endif |
407 | } |