[mirror_ubuntu-kernels.git] / arch / arm / mach-realview / realview_eb.c

/*
 *  linux/arch/arm/mach-realview/realview_eb.c
 *
 *  Copyright (C) 2004 ARM Limited
 *  Copyright (C) 2000 Deep Blue Solutions Ltd
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 */

#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/sysdev.h>
#include <linux/amba/bus.h>

#include <asm/hardware.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/leds.h>
#include <asm/mach-types.h>
#include <asm/hardware/gic.h>
#include <asm/hardware/icst307.h>
#include <asm/hardware/cache-l2x0.h>

#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/mmc.h>

#include <asm/arch/irqs.h>

#include "core.h"
#include "clock.h"

static struct map_desc realview_eb_io_desc[] __initdata = {
	{
		.virtual	= IO_ADDRESS(REALVIEW_SYS_BASE),
		.pfn		= __phys_to_pfn(REALVIEW_SYS_BASE),
		.length		= SZ_4K,
		.type		= MT_DEVICE,
	}, {
		.virtual	= IO_ADDRESS(REALVIEW_GIC_CPU_BASE),
		.pfn		= __phys_to_pfn(REALVIEW_GIC_CPU_BASE),
		.length		= SZ_4K,
		.type		= MT_DEVICE,
	}, {
		.virtual	= IO_ADDRESS(REALVIEW_GIC_DIST_BASE),
		.pfn		= __phys_to_pfn(REALVIEW_GIC_DIST_BASE),
		.length		= SZ_4K,
		.type		= MT_DEVICE,
	},
#ifdef CONFIG_REALVIEW_MPCORE
	{
		.virtual	= IO_ADDRESS(REALVIEW_GIC1_CPU_BASE),
		.pfn		= __phys_to_pfn(REALVIEW_GIC1_CPU_BASE),
		.length		= SZ_4K,
		.type		= MT_DEVICE,
	}, {
		.virtual	= IO_ADDRESS(REALVIEW_GIC1_DIST_BASE),
		.pfn		= __phys_to_pfn(REALVIEW_GIC1_DIST_BASE),
		.length		= SZ_4K,
		.type		= MT_DEVICE,
	}, {
		.virtual	= IO_ADDRESS(REALVIEW_MPCORE_L220_BASE),
		.pfn		= __phys_to_pfn(REALVIEW_MPCORE_L220_BASE),
		.length		= SZ_8K,
		.type		= MT_DEVICE,
	},
#endif
	{
		.virtual	= IO_ADDRESS(REALVIEW_SCTL_BASE),
		.pfn		= __phys_to_pfn(REALVIEW_SCTL_BASE),
		.length		= SZ_4K,
		.type		= MT_DEVICE,
	}, {
		.virtual	= IO_ADDRESS(REALVIEW_TIMER0_1_BASE),
		.pfn		= __phys_to_pfn(REALVIEW_TIMER0_1_BASE),
		.length		= SZ_4K,
		.type		= MT_DEVICE,
	}, {
		.virtual	= IO_ADDRESS(REALVIEW_TIMER2_3_BASE),
		.pfn		= __phys_to_pfn(REALVIEW_TIMER2_3_BASE),
		.length		= SZ_4K,
		.type		= MT_DEVICE,
	},
#ifdef CONFIG_DEBUG_LL
	{
		.virtual	= IO_ADDRESS(REALVIEW_UART0_BASE),
		.pfn		= __phys_to_pfn(REALVIEW_UART0_BASE),
		.length		= SZ_4K,
		.type		= MT_DEVICE,
	}
#endif
};

static void __init realview_eb_map_io(void)
{
	iotable_init(realview_eb_io_desc, ARRAY_SIZE(realview_eb_io_desc));
}

/* FPGA Primecells */
AMBA_DEVICE(aaci,  "fpga:04", AACI,     NULL);
AMBA_DEVICE(mmc0,  "fpga:05", MMCI0,    &realview_mmc0_plat_data);
AMBA_DEVICE(kmi0,  "fpga:06", KMI0,     NULL);
AMBA_DEVICE(kmi1,  "fpga:07", KMI1,     NULL);
AMBA_DEVICE(uart3, "fpga:09", UART3,    NULL);

/* DevChip Primecells */
AMBA_DEVICE(smc,   "dev:00",  SMC,      NULL);
AMBA_DEVICE(clcd,  "dev:20",  CLCD,     &clcd_plat_data);
AMBA_DEVICE(dmac,  "dev:30",  DMAC,     NULL);
AMBA_DEVICE(sctl,  "dev:e0",  SCTL,     NULL);
AMBA_DEVICE(wdog,  "dev:e1",  WATCHDOG, NULL);
AMBA_DEVICE(gpio0, "dev:e4",  GPIO0,    NULL);
AMBA_DEVICE(gpio1, "dev:e5",  GPIO1,    NULL);
AMBA_DEVICE(gpio2, "dev:e6",  GPIO2,    NULL);
AMBA_DEVICE(rtc,   "dev:e8",  RTC,      NULL);
AMBA_DEVICE(sci0,  "dev:f0",  SCI,      NULL);
AMBA_DEVICE(uart0, "dev:f1",  UART0,    NULL);
AMBA_DEVICE(uart1, "dev:f2",  UART1,    NULL);
AMBA_DEVICE(uart2, "dev:f3",  UART2,    NULL);
AMBA_DEVICE(ssp0,  "dev:f4",  SSP,      NULL);

static struct amba_device *amba_devs[] __initdata = {
	&dmac_device,
	&uart0_device,
	&uart1_device,
	&uart2_device,
	&uart3_device,
	&smc_device,
	&clcd_device,
	&sctl_device,
	&wdog_device,
	&gpio0_device,
	&gpio1_device,
	&gpio2_device,
	&rtc_device,
	&sci0_device,
	&ssp0_device,
	&aaci_device,
	&mmc0_device,
	&kmi0_device,
	&kmi1_device,
};

static void __init gic_init_irq(void)
{
#ifdef CONFIG_REALVIEW_MPCORE
	unsigned int pldctrl;
	writel(0x0000a05f, __io_address(REALVIEW_SYS_LOCK));
	pldctrl = readl(__io_address(REALVIEW_SYS_BASE)	+ REALVIEW_MPCORE_SYS_PLD_CTRL1);
	pldctrl |= 0x00800000;	/* New irq mode */
	writel(pldctrl, __io_address(REALVIEW_SYS_BASE) + REALVIEW_MPCORE_SYS_PLD_CTRL1);
	writel(0x00000000, __io_address(REALVIEW_SYS_LOCK));
#endif
	gic_dist_init(0, __io_address(REALVIEW_GIC_DIST_BASE), 29);
	gic_cpu_init(0, __io_address(REALVIEW_GIC_CPU_BASE));
#if defined(CONFIG_REALVIEW_MPCORE) && !defined(CONFIG_REALVIEW_MPCORE_REVB)
	gic_dist_init(1, __io_address(REALVIEW_GIC1_DIST_BASE), 64);
	gic_cpu_init(1, __io_address(REALVIEW_GIC1_CPU_BASE));
	gic_cascade_irq(1, IRQ_EB_IRQ1);
#endif
}

static void __init realview_eb_init(void)
{
	int i;

#ifdef CONFIG_REALVIEW_MPCORE
	/* 1MB (128KB/way), 8-way associativity, evmon/parity/share enabled
	 * Bits:  .... ...0 0111 1001 0000 .... .... .... */
	l2x0_init(__io_address(REALVIEW_MPCORE_L220_BASE), 0x00790000, 0xfe000fff);
#endif
	clk_register(&realview_clcd_clk);

	platform_device_register(&realview_flash_device);
	platform_device_register(&realview_smc91x_device);
	platform_device_register(&realview_i2c_device);

	for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
		struct amba_device *d = amba_devs[i];
		amba_device_register(d, &iomem_resource);
	}

#ifdef CONFIG_LEDS
	leds_event = realview_leds_event;
#endif
}

MACHINE_START(REALVIEW_EB, "ARM-RealView EB")
	/* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
	.phys_io	= REALVIEW_UART0_BASE,
	.io_pg_offst	= (IO_ADDRESS(REALVIEW_UART0_BASE) >> 18) & 0xfffc,
	.boot_params	= 0x00000100,
	.map_io		= realview_eb_map_io,
	.init_irq	= gic_init_irq,
	.timer		= &realview_timer,
	.init_machine	= realview_eb_init,
MACHINE_END
Commit	Line	Data
8ad68bbf CM	1	/*
	2	* linux/arch/arm/mach-realview/realview_eb.c
	3	*
	4	* Copyright (C) 2004 ARM Limited
	5	* Copyright (C) 2000 Deep Blue Solutions Ltd
	6	*
	7	* This program is free software; you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License as published by
	9	* the Free Software Foundation; either version 2 of the License, or
	10	* (at your option) any later version.
	11	*
	12	* This program is distributed in the hope that it will be useful,
	13	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	15	* GNU General Public License for more details.
	16	*
	17	* You should have received a copy of the GNU General Public License
	18	* along with this program; if not, write to the Free Software
	19	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	20	*/
	21
8ad68bbf	22	#include <linux/init.h>
1be7228d	23	#include <linux/platform_device.h>
8ad68bbf	24	#include <linux/sysdev.h>
a62c80e5	25	#include <linux/amba/bus.h>
8ad68bbf CM	26
	27	#include <asm/hardware.h>
	28	#include <asm/io.h>
	29	#include <asm/irq.h>
	30	#include <asm/leds.h>
	31	#include <asm/mach-types.h>
	32	#include <asm/hardware/gic.h>
8ad68bbf	33	#include <asm/hardware/icst307.h>
7770bddb	34	#include <asm/hardware/cache-l2x0.h>
8ad68bbf CM	35
	36	#include <asm/mach/arch.h>
	37	#include <asm/mach/map.h>
	38	#include <asm/mach/mmc.h>
	39
	40	#include <asm/arch/irqs.h>
	41
	42	#include "core.h"
	43	#include "clock.h"
	44
	45	static struct map_desc realview_eb_io_desc[] __initdata = {
1ffedce7 RK	46	{
	47	.virtual = IO_ADDRESS(REALVIEW_SYS_BASE),
	48	.pfn = __phys_to_pfn(REALVIEW_SYS_BASE),
	49	.length = SZ_4K,
	50	.type = MT_DEVICE,
	51	}, {
	52	.virtual = IO_ADDRESS(REALVIEW_GIC_CPU_BASE),
	53	.pfn = __phys_to_pfn(REALVIEW_GIC_CPU_BASE),
	54	.length = SZ_4K,
	55	.type = MT_DEVICE,
	56	}, {
	57	.virtual = IO_ADDRESS(REALVIEW_GIC_DIST_BASE),
	58	.pfn = __phys_to_pfn(REALVIEW_GIC_DIST_BASE),
	59	.length = SZ_4K,
	60	.type = MT_DEVICE,
3edf22ab CM	61	},
	62	#ifdef CONFIG_REALVIEW_MPCORE
	63	{
	64	.virtual = IO_ADDRESS(REALVIEW_GIC1_CPU_BASE),
	65	.pfn = __phys_to_pfn(REALVIEW_GIC1_CPU_BASE),
	66	.length = SZ_4K,
	67	.type = MT_DEVICE,
1ffedce7	68	}, {
3edf22ab CM	69	.virtual = IO_ADDRESS(REALVIEW_GIC1_DIST_BASE),
	70	.pfn = __phys_to_pfn(REALVIEW_GIC1_DIST_BASE),
	71	.length = SZ_4K,
	72	.type = MT_DEVICE,
7770bddb CM	73	}, {
	74	.virtual = IO_ADDRESS(REALVIEW_MPCORE_L220_BASE),
	75	.pfn = __phys_to_pfn(REALVIEW_MPCORE_L220_BASE),
	76	.length = SZ_8K,
	77	.type = MT_DEVICE,
3edf22ab CM	78	},
	79	#endif
	80	{
1ffedce7 RK	81	.virtual = IO_ADDRESS(REALVIEW_SCTL_BASE),
	82	.pfn = __phys_to_pfn(REALVIEW_SCTL_BASE),
	83	.length = SZ_4K,
	84	.type = MT_DEVICE,
	85	}, {
	86	.virtual = IO_ADDRESS(REALVIEW_TIMER0_1_BASE),
	87	.pfn = __phys_to_pfn(REALVIEW_TIMER0_1_BASE),
	88	.length = SZ_4K,
	89	.type = MT_DEVICE,
	90	}, {
	91	.virtual = IO_ADDRESS(REALVIEW_TIMER2_3_BASE),
	92	.pfn = __phys_to_pfn(REALVIEW_TIMER2_3_BASE),
	93	.length = SZ_4K,
	94	.type = MT_DEVICE,
	95	},
8ad68bbf	96	#ifdef CONFIG_DEBUG_LL
1ffedce7 RK	97	{
	98	.virtual = IO_ADDRESS(REALVIEW_UART0_BASE),
	99	.pfn = __phys_to_pfn(REALVIEW_UART0_BASE),
	100	.length = SZ_4K,
	101	.type = MT_DEVICE,
	102	}
8ad68bbf CM	103	#endif
	104	};
	105
	106	static void __init realview_eb_map_io(void)
	107	{
	108	iotable_init(realview_eb_io_desc, ARRAY_SIZE(realview_eb_io_desc));
	109	}
	110
	111	/* FPGA Primecells */
	112	AMBA_DEVICE(aaci, "fpga:04", AACI, NULL);
	113	AMBA_DEVICE(mmc0, "fpga:05", MMCI0, &realview_mmc0_plat_data);
	114	AMBA_DEVICE(kmi0, "fpga:06", KMI0, NULL);
	115	AMBA_DEVICE(kmi1, "fpga:07", KMI1, NULL);
	116	AMBA_DEVICE(uart3, "fpga:09", UART3, NULL);
	117
	118	/* DevChip Primecells */
	119	AMBA_DEVICE(smc, "dev:00", SMC, NULL);
	120	AMBA_DEVICE(clcd, "dev:20", CLCD, &clcd_plat_data);
	121	AMBA_DEVICE(dmac, "dev:30", DMAC, NULL);
	122	AMBA_DEVICE(sctl, "dev:e0", SCTL, NULL);
	123	AMBA_DEVICE(wdog, "dev:e1", WATCHDOG, NULL);
	124	AMBA_DEVICE(gpio0, "dev:e4", GPIO0, NULL);
	125	AMBA_DEVICE(gpio1, "dev:e5", GPIO1, NULL);
	126	AMBA_DEVICE(gpio2, "dev:e6", GPIO2, NULL);
	127	AMBA_DEVICE(rtc, "dev:e8", RTC, NULL);
	128	AMBA_DEVICE(sci0, "dev:f0", SCI, NULL);
	129	AMBA_DEVICE(uart0, "dev:f1", UART0, NULL);
	130	AMBA_DEVICE(uart1, "dev:f2", UART1, NULL);
	131	AMBA_DEVICE(uart2, "dev:f3", UART2, NULL);
	132	AMBA_DEVICE(ssp0, "dev:f4", SSP, NULL);
	133
	134	static struct amba_device *amba_devs[] __initdata = {
	135	&dmac_device,
	136	&uart0_device,
	137	&uart1_device,
	138	&uart2_device,
	139	&uart3_device,
	140	&smc_device,
	141	&clcd_device,
	142	&sctl_device,
	143	&wdog_device,
	144	&gpio0_device,
	145	&gpio1_device,
	146	&gpio2_device,
	147	&rtc_device,
	148	&sci0_device,
	149	&ssp0_device,
	150	&aaci_device,
	151	&mmc0_device,
	152	&kmi0_device,
	153	&kmi1_device,
	154	};
	155
	156	static void __init gic_init_irq(void)
	157	{
9b1283be	158	#ifdef CONFIG_REALVIEW_MPCORE
bb1a2aa6	159	unsigned int pldctrl;
9b1283be	160	writel(0x0000a05f, __io_address(REALVIEW_SYS_LOCK));
4b17244c	161	pldctrl = readl(__io_address(REALVIEW_SYS_BASE) + REALVIEW_MPCORE_SYS_PLD_CTRL1);
bb1a2aa6	162	pldctrl \|= 0x00800000; /* New irq mode */
4b17244c	163	writel(pldctrl, __io_address(REALVIEW_SYS_BASE) + REALVIEW_MPCORE_SYS_PLD_CTRL1);
9b1283be RK	164	writel(0x00000000, __io_address(REALVIEW_SYS_LOCK));
9b1283be RK	165	#endif
b3a1bde4 CM	166	gic_dist_init(0, __io_address(REALVIEW_GIC_DIST_BASE), 29);
b3a1bde4 CM	167	gic_cpu_init(0, __io_address(REALVIEW_GIC_CPU_BASE));
a53d6fb8	168	#if defined(CONFIG_REALVIEW_MPCORE) && !defined(CONFIG_REALVIEW_MPCORE_REVB)
3edf22ab CM	169	gic_dist_init(1, __io_address(REALVIEW_GIC1_DIST_BASE), 64);
	170	gic_cpu_init(1, __io_address(REALVIEW_GIC1_CPU_BASE));
	171	gic_cascade_irq(1, IRQ_EB_IRQ1);
	172	#endif
8ad68bbf CM	173	}
	174
	175	static void __init realview_eb_init(void)
	176	{
	177	int i;
	178
7770bddb CM	179	#ifdef CONFIG_REALVIEW_MPCORE
	180	/* 1MB (128KB/way), 8-way associativity, evmon/parity/share enabled
	181	* Bits: .... ...0 0111 1001 0000 .... .... .... */
	182	l2x0_init(__io_address(REALVIEW_MPCORE_L220_BASE), 0x00790000, 0xfe000fff);
	183	#endif
8ad68bbf CM	184	clk_register(&realview_clcd_clk);
	185
	186	platform_device_register(&realview_flash_device);
	187	platform_device_register(&realview_smc91x_device);
6b65cd74	188	platform_device_register(&realview_i2c_device);
8ad68bbf CM	189
	190	for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
	191	struct amba_device *d = amba_devs[i];
	192	amba_device_register(d, &iomem_resource);
	193	}
	194
	195	#ifdef CONFIG_LEDS
	196	leds_event = realview_leds_event;
	197	#endif
	198	}
	199
	200	MACHINE_START(REALVIEW_EB, "ARM-RealView EB")
	201	/* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
8ad68bbf CM	202	.phys_io = REALVIEW_UART0_BASE,
	203	.io_pg_offst = (IO_ADDRESS(REALVIEW_UART0_BASE) >> 18) & 0xfffc,
	204	.boot_params = 0x00000100,
	205	.map_io = realview_eb_map_io,
	206	.init_irq = gic_init_irq,
	207	.timer = &realview_timer,
	208	.init_machine = realview_eb_init,
	209	MACHINE_END