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d2912cb1 | 1 | // SPDX-License-Identifier: GPL-2.0-only |
1da177e4 LT |
2 | /* |
3 | * linux/arch/arm/common/time-acorn.c | |
4 | * | |
5 | * Copyright (c) 1996-2000 Russell King. | |
6 | * | |
1da177e4 LT |
7 | * Changelog: |
8 | * 24-Sep-1996 RMK Created | |
9 | * 10-Oct-1996 RMK Brought up to date with arch-sa110eval | |
10 | * 04-Dec-1997 RMK Updated for new arch/arm/time.c | |
11 | * 13=Jun-2004 DS Moved to arch/arm/common b/c shared w/CLPS7500 | |
12 | */ | |
a44c1d70 | 13 | #include <linux/clocksource.h> |
1da177e4 LT |
14 | #include <linux/init.h> |
15 | #include <linux/interrupt.h> | |
c4bfa28a | 16 | #include <linux/irq.h> |
fced80c7 | 17 | #include <linux/io.h> |
1da177e4 | 18 | |
a09e64fb | 19 | #include <mach/hardware.h> |
1da177e4 LT |
20 | #include <asm/hardware/ioc.h> |
21 | ||
22 | #include <asm/mach/time.h> | |
23 | ||
53985371 UKK |
24 | #define RPC_CLOCK_FREQ 2000000 |
25 | #define RPC_LATCH DIV_ROUND_CLOSEST(RPC_CLOCK_FREQ, HZ) | |
26 | ||
a44c1d70 RK |
27 | static u32 ioc_time; |
28 | ||
29 | static u64 ioc_timer_read(struct clocksource *cs) | |
1da177e4 LT |
30 | { |
31 | unsigned int count1, count2, status; | |
a44c1d70 RK |
32 | unsigned long flags; |
33 | u32 ticks; | |
1da177e4 | 34 | |
a44c1d70 | 35 | local_irq_save(flags); |
1da177e4 LT |
36 | ioc_writeb (0, IOC_T0LATCH); |
37 | barrier (); | |
38 | count1 = ioc_readb(IOC_T0CNTL) | (ioc_readb(IOC_T0CNTH) << 8); | |
39 | barrier (); | |
40 | status = ioc_readb(IOC_IRQREQA); | |
41 | barrier (); | |
42 | ioc_writeb (0, IOC_T0LATCH); | |
43 | barrier (); | |
44 | count2 = ioc_readb(IOC_T0CNTL) | (ioc_readb(IOC_T0CNTH) << 8); | |
a44c1d70 RK |
45 | ticks = ioc_time + RPC_LATCH - count2; |
46 | local_irq_restore(flags); | |
1da177e4 | 47 | |
1da177e4 LT |
48 | if (count2 < count1) { |
49 | /* | |
a44c1d70 RK |
50 | * The timer has not reloaded between reading count1 and |
51 | * count2, check whether an interrupt was actually pending. | |
1da177e4 LT |
52 | */ |
53 | if (status & (1 << 5)) | |
a44c1d70 | 54 | ticks += RPC_LATCH; |
1da177e4 LT |
55 | } else if (count2 > count1) { |
56 | /* | |
a44c1d70 RK |
57 | * The timer has reloaded, so count2 indicates the new |
58 | * count since the wrap. The interrupt would not have | |
59 | * been processed, so add the missed ticks. | |
1da177e4 | 60 | */ |
a44c1d70 | 61 | ticks += RPC_LATCH; |
1da177e4 LT |
62 | } |
63 | ||
a44c1d70 | 64 | return ticks; |
1da177e4 LT |
65 | } |
66 | ||
a44c1d70 RK |
67 | static struct clocksource ioctime_clocksource = { |
68 | .read = ioc_timer_read, | |
69 | .mask = CLOCKSOURCE_MASK(32), | |
70 | .rating = 100, | |
71 | }; | |
72 | ||
1da177e4 LT |
73 | void __init ioctime_init(void) |
74 | { | |
53985371 UKK |
75 | ioc_writeb(RPC_LATCH & 255, IOC_T0LTCHL); |
76 | ioc_writeb(RPC_LATCH >> 8, IOC_T0LTCHH); | |
1da177e4 LT |
77 | ioc_writeb(0, IOC_T0GO); |
78 | } | |
79 | ||
80 | static irqreturn_t | |
0cd61b68 | 81 | ioc_timer_interrupt(int irq, void *dev_id) |
1da177e4 | 82 | { |
a44c1d70 | 83 | ioc_time += RPC_LATCH; |
6239da29 | 84 | legacy_timer_tick(1); |
1da177e4 LT |
85 | return IRQ_HANDLED; |
86 | } | |
87 | ||
1da177e4 LT |
88 | /* |
89 | * Set up timer interrupt. | |
90 | */ | |
6bb27d73 | 91 | void __init ioc_timer_init(void) |
1da177e4 | 92 | { |
a44c1d70 | 93 | WARN_ON(clocksource_register_hz(&ioctime_clocksource, RPC_CLOCK_FREQ)); |
1da177e4 | 94 | ioctime_init(); |
575fb69e | 95 | if (request_irq(IRQ_TIMER0, ioc_timer_interrupt, 0, "timer", NULL)) |
96 | pr_err("Failed to request irq %d (timer)\n", IRQ_TIMER0); | |
1da177e4 | 97 | } |