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a09e64fb | 1 | /* arch/arm/mach-s3c2410/include/mach/spi.h |
7fba5340 BD |
2 | * |
3 | * Copyright (c) 2006 Simtec Electronics | |
4 | * Ben Dooks <ben@simtec.co.uk> | |
5 | * | |
6 | * S3C2410 - SPI Controller platform_device info | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | */ | |
12 | ||
13 | #ifndef __ASM_ARCH_SPI_H | |
14 | #define __ASM_ARCH_SPI_H __FILE__ | |
15 | ||
7fba5340 | 16 | struct s3c2410_spi_info { |
ee9c1fbf | 17 | int pin_cs; /* simple gpio cs */ |
d1e77806 | 18 | unsigned int num_cs; /* total chipselects */ |
cb1d0a7a | 19 | int bus_num; /* bus number to use. */ |
7fba5340 | 20 | |
cf46b973 | 21 | void (*gpio_setup)(struct s3c2410_spi_info *spi, int enable); |
7fba5340 BD |
22 | void (*set_cs)(struct s3c2410_spi_info *spi, int cs, int pol); |
23 | }; | |
24 | ||
b2a6cf3b BD |
25 | /* Standard setup / suspend routines for SPI GPIO pins. */ |
26 | ||
27 | extern void s3c24xx_spi_gpiocfg_bus0_gpe11_12_13(struct s3c2410_spi_info *spi, | |
28 | int enable); | |
29 | ||
30 | extern void s3c24xx_spi_gpiocfg_bus1_gpg5_6_7(struct s3c2410_spi_info *spi, | |
31 | int enable); | |
7fba5340 | 32 | |
a2c195fd BD |
33 | extern void s3c24xx_spi_gpiocfg_bus1_gpd8_9_10(struct s3c2410_spi_info *spi, |
34 | int enable); | |
35 | ||
7fba5340 | 36 | #endif /* __ASM_ARCH_SPI_H */ |