]>
Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* linux/arch/arm/mach-s3c2410/mach-bast.c |
2 | * | |
3 | * Copyright (c) 2003-2005 Simtec Electronics | |
4 | * Ben Dooks <ben@simtec.co.uk> | |
5 | * | |
6 | * http://www.simtec.co.uk/products/EB2410ITX/ | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | * | |
12 | * Modifications: | |
13 | * 14-Sep-2004 BJD USB power control | |
14 | * 20-Aug-2004 BJD Added s3c2410_board struct | |
15 | * 18-Aug-2004 BJD Added platform devices from default set | |
16 | * 16-May-2003 BJD Created initial version | |
17 | * 16-Aug-2003 BJD Fixed header files and copyright, added URL | |
18 | * 05-Sep-2003 BJD Moved to v2.6 kernel | |
19 | * 06-Jan-2003 BJD Updates for <arch/map.h> | |
20 | * 18-Jan-2003 BJD Added serial port configuration | |
21 | * 05-Oct-2004 BJD Power management code | |
22 | * 04-Nov-2004 BJD Updated serial port clocks | |
23 | * 04-Jan-2005 BJD New uart init call | |
24 | * 10-Jan-2005 BJD Removed include of s3c2410.h | |
25 | * 14-Jan-2005 BJD Add support for muitlple NAND devices | |
26 | * 03-Mar-2005 BJD Ensured that bast-cpld.h is included | |
27 | * 10-Mar-2005 LCVR Changed S3C2410_VA to S3C24XX_VA | |
5730b7d6 BD |
28 | * 14-Mar-2005 BJD Updated for __iomem changes |
29 | * 22-Jun-2005 BJD Added DM9000 platform information | |
30 | * 28-Jun-2005 BJD Moved pm functionality out to common code | |
31 | * 17-Jul-2005 BJD Changed to platform device for SuperIO 16550s | |
32 | * 25-Jul-2005 BJD Removed ASIX static mappings | |
1fcf8448 | 33 | * 27-Jul-2005 BJD Ensure maximum frequency of i2c bus |
5fe10ab1 | 34 | * 20-Sep-2005 BJD Added static to non-exported items |
58c8d570 | 35 | * 26-Oct-2005 BJD Added FB platform data |
1da177e4 LT |
36 | */ |
37 | ||
38 | #include <linux/kernel.h> | |
39 | #include <linux/types.h> | |
40 | #include <linux/interrupt.h> | |
41 | #include <linux/list.h> | |
42 | #include <linux/timer.h> | |
43 | #include <linux/init.h> | |
d052d1be | 44 | #include <linux/platform_device.h> |
d97a666f | 45 | #include <linux/dm9000.h> |
1da177e4 LT |
46 | |
47 | #include <asm/mach/arch.h> | |
48 | #include <asm/mach/map.h> | |
49 | #include <asm/mach/irq.h> | |
50 | ||
51 | #include <asm/arch/bast-map.h> | |
52 | #include <asm/arch/bast-irq.h> | |
53 | #include <asm/arch/bast-cpld.h> | |
54 | ||
55 | #include <asm/hardware.h> | |
56 | #include <asm/io.h> | |
57 | #include <asm/irq.h> | |
58 | #include <asm/mach-types.h> | |
59 | ||
60 | //#include <asm/debug-ll.h> | |
61 | #include <asm/arch/regs-serial.h> | |
62 | #include <asm/arch/regs-gpio.h> | |
63 | #include <asm/arch/regs-mem.h> | |
d97a666f | 64 | #include <asm/arch/regs-lcd.h> |
58c8d570 | 65 | |
1da177e4 | 66 | #include <asm/arch/nand.h> |
1fcf8448 | 67 | #include <asm/arch/iic.h> |
58c8d570 | 68 | #include <asm/arch/fb.h> |
1da177e4 LT |
69 | |
70 | #include <linux/mtd/mtd.h> | |
71 | #include <linux/mtd/nand.h> | |
72 | #include <linux/mtd/nand_ecc.h> | |
73 | #include <linux/mtd/partitions.h> | |
74 | ||
65cc3370 BD |
75 | #include <linux/serial_8250.h> |
76 | ||
1da177e4 LT |
77 | #include "clock.h" |
78 | #include "devs.h" | |
79 | #include "cpu.h" | |
80 | #include "usb-simtec.h" | |
1da177e4 LT |
81 | |
82 | #define COPYRIGHT ", (c) 2004-2005 Simtec Electronics" | |
83 | ||
84 | /* macros for virtual address mods for the io space entries */ | |
85 | #define VA_C5(item) ((unsigned long)(item) + BAST_VAM_CS5) | |
86 | #define VA_C4(item) ((unsigned long)(item) + BAST_VAM_CS4) | |
87 | #define VA_C3(item) ((unsigned long)(item) + BAST_VAM_CS3) | |
88 | #define VA_C2(item) ((unsigned long)(item) + BAST_VAM_CS2) | |
89 | ||
90 | /* macros to modify the physical addresses for io space */ | |
91 | ||
92 | #define PA_CS2(item) ((item) + S3C2410_CS2) | |
93 | #define PA_CS3(item) ((item) + S3C2410_CS3) | |
94 | #define PA_CS4(item) ((item) + S3C2410_CS4) | |
95 | #define PA_CS5(item) ((item) + S3C2410_CS5) | |
96 | ||
97 | static struct map_desc bast_iodesc[] __initdata = { | |
98 | /* ISA IO areas */ | |
99 | ||
100 | { (u32)S3C24XX_VA_ISA_BYTE, PA_CS2(BAST_PA_ISAIO), SZ_16M, MT_DEVICE }, | |
101 | { (u32)S3C24XX_VA_ISA_WORD, PA_CS3(BAST_PA_ISAIO), SZ_16M, MT_DEVICE }, | |
102 | ||
103 | /* we could possibly compress the next set down into a set of smaller tables | |
104 | * pagetables, but that would mean using an L2 section, and it still means | |
105 | * we cannot actually feed the same register to an LDR due to 16K spacing | |
106 | */ | |
107 | ||
108 | /* bast CPLD control registers, and external interrupt controls */ | |
109 | { (u32)BAST_VA_CTRL1, BAST_PA_CTRL1, SZ_1M, MT_DEVICE }, | |
110 | { (u32)BAST_VA_CTRL2, BAST_PA_CTRL2, SZ_1M, MT_DEVICE }, | |
111 | { (u32)BAST_VA_CTRL3, BAST_PA_CTRL3, SZ_1M, MT_DEVICE }, | |
112 | { (u32)BAST_VA_CTRL4, BAST_PA_CTRL4, SZ_1M, MT_DEVICE }, | |
113 | ||
114 | /* PC104 IRQ mux */ | |
115 | { (u32)BAST_VA_PC104_IRQREQ, BAST_PA_PC104_IRQREQ, SZ_1M, MT_DEVICE }, | |
116 | { (u32)BAST_VA_PC104_IRQRAW, BAST_PA_PC104_IRQRAW, SZ_1M, MT_DEVICE }, | |
117 | { (u32)BAST_VA_PC104_IRQMASK, BAST_PA_PC104_IRQMASK, SZ_1M, MT_DEVICE }, | |
118 | ||
119 | /* peripheral space... one for each of fast/slow/byte/16bit */ | |
120 | /* note, ide is only decoded in word space, even though some registers | |
121 | * are only 8bit */ | |
122 | ||
123 | /* slow, byte */ | |
124 | { VA_C2(BAST_VA_ISAIO), PA_CS2(BAST_PA_ISAIO), SZ_16M, MT_DEVICE }, | |
125 | { VA_C2(BAST_VA_ISAMEM), PA_CS2(BAST_PA_ISAMEM), SZ_16M, MT_DEVICE }, | |
1da177e4 | 126 | { VA_C2(BAST_VA_SUPERIO), PA_CS2(BAST_PA_SUPERIO), SZ_1M, MT_DEVICE }, |
1da177e4 LT |
127 | { VA_C2(BAST_VA_IDEPRI), PA_CS3(BAST_PA_IDEPRI), SZ_1M, MT_DEVICE }, |
128 | { VA_C2(BAST_VA_IDESEC), PA_CS3(BAST_PA_IDESEC), SZ_1M, MT_DEVICE }, | |
129 | { VA_C2(BAST_VA_IDEPRIAUX), PA_CS3(BAST_PA_IDEPRIAUX), SZ_1M, MT_DEVICE }, | |
130 | { VA_C2(BAST_VA_IDESECAUX), PA_CS3(BAST_PA_IDESECAUX), SZ_1M, MT_DEVICE }, | |
131 | ||
132 | /* slow, word */ | |
133 | { VA_C3(BAST_VA_ISAIO), PA_CS3(BAST_PA_ISAIO), SZ_16M, MT_DEVICE }, | |
134 | { VA_C3(BAST_VA_ISAMEM), PA_CS3(BAST_PA_ISAMEM), SZ_16M, MT_DEVICE }, | |
1da177e4 | 135 | { VA_C3(BAST_VA_SUPERIO), PA_CS3(BAST_PA_SUPERIO), SZ_1M, MT_DEVICE }, |
1da177e4 LT |
136 | { VA_C3(BAST_VA_IDEPRI), PA_CS3(BAST_PA_IDEPRI), SZ_1M, MT_DEVICE }, |
137 | { VA_C3(BAST_VA_IDESEC), PA_CS3(BAST_PA_IDESEC), SZ_1M, MT_DEVICE }, | |
138 | { VA_C3(BAST_VA_IDEPRIAUX), PA_CS3(BAST_PA_IDEPRIAUX), SZ_1M, MT_DEVICE }, | |
139 | { VA_C3(BAST_VA_IDESECAUX), PA_CS3(BAST_PA_IDESECAUX), SZ_1M, MT_DEVICE }, | |
140 | ||
141 | /* fast, byte */ | |
142 | { VA_C4(BAST_VA_ISAIO), PA_CS4(BAST_PA_ISAIO), SZ_16M, MT_DEVICE }, | |
143 | { VA_C4(BAST_VA_ISAMEM), PA_CS4(BAST_PA_ISAMEM), SZ_16M, MT_DEVICE }, | |
1da177e4 | 144 | { VA_C4(BAST_VA_SUPERIO), PA_CS4(BAST_PA_SUPERIO), SZ_1M, MT_DEVICE }, |
1da177e4 LT |
145 | { VA_C4(BAST_VA_IDEPRI), PA_CS5(BAST_PA_IDEPRI), SZ_1M, MT_DEVICE }, |
146 | { VA_C4(BAST_VA_IDESEC), PA_CS5(BAST_PA_IDESEC), SZ_1M, MT_DEVICE }, | |
147 | { VA_C4(BAST_VA_IDEPRIAUX), PA_CS5(BAST_PA_IDEPRIAUX), SZ_1M, MT_DEVICE }, | |
148 | { VA_C4(BAST_VA_IDESECAUX), PA_CS5(BAST_PA_IDESECAUX), SZ_1M, MT_DEVICE }, | |
149 | ||
150 | /* fast, word */ | |
151 | { VA_C5(BAST_VA_ISAIO), PA_CS5(BAST_PA_ISAIO), SZ_16M, MT_DEVICE }, | |
152 | { VA_C5(BAST_VA_ISAMEM), PA_CS5(BAST_PA_ISAMEM), SZ_16M, MT_DEVICE }, | |
1da177e4 | 153 | { VA_C5(BAST_VA_SUPERIO), PA_CS5(BAST_PA_SUPERIO), SZ_1M, MT_DEVICE }, |
1da177e4 LT |
154 | { VA_C5(BAST_VA_IDEPRI), PA_CS5(BAST_PA_IDEPRI), SZ_1M, MT_DEVICE }, |
155 | { VA_C5(BAST_VA_IDESEC), PA_CS5(BAST_PA_IDESEC), SZ_1M, MT_DEVICE }, | |
156 | { VA_C5(BAST_VA_IDEPRIAUX), PA_CS5(BAST_PA_IDEPRIAUX), SZ_1M, MT_DEVICE }, | |
157 | { VA_C5(BAST_VA_IDESECAUX), PA_CS5(BAST_PA_IDESECAUX), SZ_1M, MT_DEVICE }, | |
158 | }; | |
159 | ||
160 | #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK | |
161 | #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB | |
162 | #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE | |
163 | ||
164 | static struct s3c24xx_uart_clksrc bast_serial_clocks[] = { | |
165 | [0] = { | |
166 | .name = "uclk", | |
167 | .divisor = 1, | |
168 | .min_baud = 0, | |
169 | .max_baud = 0, | |
170 | }, | |
171 | [1] = { | |
172 | .name = "pclk", | |
173 | .divisor = 1, | |
174 | .min_baud = 0, | |
175 | .max_baud = 0. | |
176 | } | |
177 | }; | |
178 | ||
179 | ||
180 | static struct s3c2410_uartcfg bast_uartcfgs[] = { | |
181 | [0] = { | |
182 | .hwport = 0, | |
183 | .flags = 0, | |
184 | .ucon = UCON, | |
185 | .ulcon = ULCON, | |
186 | .ufcon = UFCON, | |
187 | .clocks = bast_serial_clocks, | |
188 | .clocks_size = ARRAY_SIZE(bast_serial_clocks) | |
189 | }, | |
190 | [1] = { | |
191 | .hwport = 1, | |
192 | .flags = 0, | |
193 | .ucon = UCON, | |
194 | .ulcon = ULCON, | |
195 | .ufcon = UFCON, | |
196 | .clocks = bast_serial_clocks, | |
197 | .clocks_size = ARRAY_SIZE(bast_serial_clocks) | |
198 | }, | |
199 | /* port 2 is not actually used */ | |
200 | [2] = { | |
201 | .hwport = 2, | |
202 | .flags = 0, | |
203 | .ucon = UCON, | |
204 | .ulcon = ULCON, | |
205 | .ufcon = UFCON, | |
206 | .clocks = bast_serial_clocks, | |
207 | .clocks_size = ARRAY_SIZE(bast_serial_clocks) | |
208 | } | |
209 | }; | |
210 | ||
211 | /* NOR Flash on BAST board */ | |
212 | ||
213 | static struct resource bast_nor_resource[] = { | |
214 | [0] = { | |
215 | .start = S3C2410_CS1 + 0x4000000, | |
216 | .end = S3C2410_CS1 + 0x4000000 + (32*1024*1024) - 1, | |
217 | .flags = IORESOURCE_MEM, | |
218 | } | |
219 | }; | |
220 | ||
221 | static struct platform_device bast_device_nor = { | |
222 | .name = "bast-nor", | |
223 | .id = -1, | |
224 | .num_resources = ARRAY_SIZE(bast_nor_resource), | |
225 | .resource = bast_nor_resource, | |
226 | }; | |
227 | ||
228 | /* NAND Flash on BAST board */ | |
229 | ||
230 | ||
231 | static int smartmedia_map[] = { 0 }; | |
232 | static int chip0_map[] = { 1 }; | |
233 | static int chip1_map[] = { 2 }; | |
234 | static int chip2_map[] = { 3 }; | |
235 | ||
9f693d7b | 236 | static struct mtd_partition bast_default_nand_part[] = { |
1da177e4 LT |
237 | [0] = { |
238 | .name = "Boot Agent", | |
239 | .size = SZ_16K, | |
240 | .offset = 0 | |
241 | }, | |
242 | [1] = { | |
243 | .name = "/boot", | |
244 | .size = SZ_4M - SZ_16K, | |
245 | .offset = SZ_16K, | |
246 | }, | |
247 | [2] = { | |
248 | .name = "user", | |
249 | .offset = SZ_4M, | |
250 | .size = MTDPART_SIZ_FULL, | |
251 | } | |
252 | }; | |
253 | ||
254 | /* the bast has 4 selectable slots for nand-flash, the three | |
255 | * on-board chip areas, as well as the external SmartMedia | |
256 | * slot. | |
257 | * | |
258 | * Note, there is no current hot-plug support for the SmartMedia | |
259 | * socket. | |
260 | */ | |
261 | ||
262 | static struct s3c2410_nand_set bast_nand_sets[] = { | |
263 | [0] = { | |
264 | .name = "SmartMedia", | |
265 | .nr_chips = 1, | |
266 | .nr_map = smartmedia_map, | |
267 | .nr_partitions = ARRAY_SIZE(bast_default_nand_part), | |
268 | .partitions = bast_default_nand_part | |
269 | }, | |
270 | [1] = { | |
271 | .name = "chip0", | |
272 | .nr_chips = 1, | |
273 | .nr_map = chip0_map, | |
274 | .nr_partitions = ARRAY_SIZE(bast_default_nand_part), | |
275 | .partitions = bast_default_nand_part | |
276 | }, | |
277 | [2] = { | |
278 | .name = "chip1", | |
279 | .nr_chips = 1, | |
280 | .nr_map = chip1_map, | |
281 | .nr_partitions = ARRAY_SIZE(bast_default_nand_part), | |
282 | .partitions = bast_default_nand_part | |
283 | }, | |
284 | [3] = { | |
285 | .name = "chip2", | |
286 | .nr_chips = 1, | |
287 | .nr_map = chip2_map, | |
288 | .nr_partitions = ARRAY_SIZE(bast_default_nand_part), | |
289 | .partitions = bast_default_nand_part | |
290 | } | |
291 | }; | |
292 | ||
293 | static void bast_nand_select(struct s3c2410_nand_set *set, int slot) | |
294 | { | |
295 | unsigned int tmp; | |
296 | ||
297 | slot = set->nr_map[slot] & 3; | |
298 | ||
299 | pr_debug("bast_nand: selecting slot %d (set %p,%p)\n", | |
300 | slot, set, set->nr_map); | |
301 | ||
302 | tmp = __raw_readb(BAST_VA_CTRL2); | |
303 | tmp &= BAST_CPLD_CTLR2_IDERST; | |
304 | tmp |= slot; | |
305 | tmp |= BAST_CPLD_CTRL2_WNAND; | |
306 | ||
307 | pr_debug("bast_nand: ctrl2 now %02x\n", tmp); | |
308 | ||
309 | __raw_writeb(tmp, BAST_VA_CTRL2); | |
310 | } | |
311 | ||
312 | static struct s3c2410_platform_nand bast_nand_info = { | |
b048dbf4 BD |
313 | .tacls = 30, |
314 | .twrph0 = 60, | |
315 | .twrph1 = 60, | |
1da177e4 LT |
316 | .nr_sets = ARRAY_SIZE(bast_nand_sets), |
317 | .sets = bast_nand_sets, | |
318 | .select_chip = bast_nand_select, | |
319 | }; | |
320 | ||
d97a666f BD |
321 | /* DM9000 */ |
322 | ||
323 | static struct resource bast_dm9k_resource[] = { | |
324 | [0] = { | |
325 | .start = S3C2410_CS5 + BAST_PA_DM9000, | |
326 | .end = S3C2410_CS5 + BAST_PA_DM9000 + 3, | |
327 | .flags = IORESOURCE_MEM | |
328 | }, | |
329 | [1] = { | |
330 | .start = S3C2410_CS5 + BAST_PA_DM9000 + 0x40, | |
331 | .end = S3C2410_CS5 + BAST_PA_DM9000 + 0x40 + 0x3f, | |
332 | .flags = IORESOURCE_MEM | |
333 | }, | |
334 | [2] = { | |
335 | .start = IRQ_DM9000, | |
336 | .end = IRQ_DM9000, | |
337 | .flags = IORESOURCE_IRQ | |
338 | } | |
339 | ||
340 | }; | |
341 | ||
342 | /* for the moment we limit ourselves to 16bit IO until some | |
343 | * better IO routines can be written and tested | |
344 | */ | |
345 | ||
9f693d7b | 346 | static struct dm9000_plat_data bast_dm9k_platdata = { |
d97a666f BD |
347 | .flags = DM9000_PLATF_16BITONLY |
348 | }; | |
349 | ||
350 | static struct platform_device bast_device_dm9k = { | |
351 | .name = "dm9000", | |
352 | .id = 0, | |
353 | .num_resources = ARRAY_SIZE(bast_dm9k_resource), | |
354 | .resource = bast_dm9k_resource, | |
355 | .dev = { | |
356 | .platform_data = &bast_dm9k_platdata, | |
357 | } | |
358 | }; | |
359 | ||
65cc3370 BD |
360 | /* serial devices */ |
361 | ||
362 | #define SERIAL_BASE (S3C2410_CS2 + BAST_PA_SUPERIO) | |
363 | #define SERIAL_FLAGS (UPF_BOOT_AUTOCONF | UPF_IOREMAP | UPF_SHARE_IRQ) | |
364 | #define SERIAL_CLK (1843200) | |
365 | ||
366 | static struct plat_serial8250_port bast_sio_data[] = { | |
367 | [0] = { | |
368 | .mapbase = SERIAL_BASE + 0x2f8, | |
369 | .irq = IRQ_PCSERIAL1, | |
370 | .flags = SERIAL_FLAGS, | |
371 | .iotype = UPIO_MEM, | |
372 | .regshift = 0, | |
373 | .uartclk = SERIAL_CLK, | |
374 | }, | |
375 | [1] = { | |
376 | .mapbase = SERIAL_BASE + 0x3f8, | |
377 | .irq = IRQ_PCSERIAL2, | |
378 | .flags = SERIAL_FLAGS, | |
379 | .iotype = UPIO_MEM, | |
380 | .regshift = 0, | |
381 | .uartclk = SERIAL_CLK, | |
382 | }, | |
383 | { } | |
384 | }; | |
385 | ||
386 | static struct platform_device bast_sio = { | |
387 | .name = "serial8250", | |
6df29deb | 388 | .id = PLAT8250_DEV_PLATFORM, |
65cc3370 BD |
389 | .dev = { |
390 | .platform_data = &bast_sio_data, | |
391 | }, | |
392 | }; | |
1da177e4 | 393 | |
1fcf8448 BD |
394 | /* we have devices on the bus which cannot work much over the |
395 | * standard 100KHz i2c bus frequency | |
396 | */ | |
397 | ||
398 | static struct s3c2410_platform_i2c bast_i2c_info = { | |
399 | .flags = 0, | |
400 | .slave_addr = 0x10, | |
401 | .bus_freq = 100*1000, | |
402 | .max_freq = 130*1000, | |
403 | }; | |
404 | ||
58c8d570 BD |
405 | |
406 | static struct s3c2410fb_mach_info __initdata bast_lcd_info = { | |
407 | .width = 640, | |
408 | .height = 480, | |
409 | ||
410 | .xres = { | |
411 | .min = 320, | |
412 | .max = 1024, | |
413 | .defval = 640, | |
414 | }, | |
415 | ||
416 | .yres = { | |
417 | .min = 240, | |
418 | .max = 600, | |
419 | .defval = 480, | |
420 | }, | |
421 | ||
422 | .bpp = { | |
423 | .min = 4, | |
424 | .max = 16, | |
425 | .defval = 8, | |
426 | }, | |
427 | ||
428 | .regs = { | |
429 | .lcdcon1 = 0x00000176, | |
430 | .lcdcon2 = 0x1d77c7c2, | |
431 | .lcdcon3 = 0x013a7f13, | |
432 | .lcdcon4 = 0x00000057, | |
433 | .lcdcon5 = 0x00014b02, | |
434 | } | |
435 | }; | |
436 | ||
1da177e4 LT |
437 | /* Standard BAST devices */ |
438 | ||
439 | static struct platform_device *bast_devices[] __initdata = { | |
440 | &s3c_device_usb, | |
441 | &s3c_device_lcd, | |
442 | &s3c_device_wdt, | |
443 | &s3c_device_i2c, | |
444 | &s3c_device_iis, | |
445 | &s3c_device_rtc, | |
446 | &s3c_device_nand, | |
d97a666f BD |
447 | &bast_device_nor, |
448 | &bast_device_dm9k, | |
65cc3370 | 449 | &bast_sio, |
1da177e4 LT |
450 | }; |
451 | ||
452 | static struct clk *bast_clocks[] = { | |
453 | &s3c24xx_dclk0, | |
454 | &s3c24xx_dclk1, | |
455 | &s3c24xx_clkout0, | |
456 | &s3c24xx_clkout1, | |
457 | &s3c24xx_uclk, | |
458 | }; | |
459 | ||
460 | static struct s3c24xx_board bast_board __initdata = { | |
461 | .devices = bast_devices, | |
462 | .devices_count = ARRAY_SIZE(bast_devices), | |
463 | .clocks = bast_clocks, | |
464 | .clocks_count = ARRAY_SIZE(bast_clocks) | |
465 | }; | |
466 | ||
5fe10ab1 | 467 | static void __init bast_map_io(void) |
1da177e4 LT |
468 | { |
469 | /* initialise the clocks */ | |
470 | ||
471 | s3c24xx_dclk0.parent = NULL; | |
472 | s3c24xx_dclk0.rate = 12*1000*1000; | |
473 | ||
474 | s3c24xx_dclk1.parent = NULL; | |
475 | s3c24xx_dclk1.rate = 24*1000*1000; | |
476 | ||
477 | s3c24xx_clkout0.parent = &s3c24xx_dclk0; | |
478 | s3c24xx_clkout1.parent = &s3c24xx_dclk1; | |
479 | ||
480 | s3c24xx_uclk.parent = &s3c24xx_clkout1; | |
481 | ||
482 | s3c_device_nand.dev.platform_data = &bast_nand_info; | |
1fcf8448 | 483 | s3c_device_i2c.dev.platform_data = &bast_i2c_info; |
1da177e4 LT |
484 | |
485 | s3c24xx_init_io(bast_iodesc, ARRAY_SIZE(bast_iodesc)); | |
486 | s3c24xx_init_clocks(0); | |
487 | s3c24xx_init_uarts(bast_uartcfgs, ARRAY_SIZE(bast_uartcfgs)); | |
488 | s3c24xx_set_board(&bast_board); | |
489 | usb_simtec_init(); | |
490 | } | |
491 | ||
58c8d570 BD |
492 | static void __init bast_init(void) |
493 | { | |
494 | s3c24xx_fb_set_platdata(&bast_lcd_info); | |
495 | } | |
1da177e4 LT |
496 | |
497 | MACHINE_START(BAST, "Simtec-BAST") | |
e9dea0c6 RK |
498 | /* Maintainer: Ben Dooks <ben@simtec.co.uk> */ |
499 | .phys_ram = S3C2410_SDRAM_PA, | |
500 | .phys_io = S3C2410_PA_UART, | |
501 | .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, | |
502 | .boot_params = S3C2410_SDRAM_PA + 0x100, | |
f705b1ae BD |
503 | .map_io = bast_map_io, |
504 | .init_irq = s3c24xx_init_irq, | |
58c8d570 | 505 | .init_machine = bast_init, |
1da177e4 LT |
506 | .timer = &s3c24xx_timer, |
507 | MACHINE_END |