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1da177e4 LT |
1 | /* linux/arch/arm/mach-s3c2410/mach-h1940.c |
2 | * | |
3 | * Copyright (c) 2003-2005 Simtec Electronics | |
4 | * Ben Dooks <ben@simtec.co.uk> | |
5 | * | |
6 | * http://www.handhelds.org/projects/h1940.html | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | * | |
1da177e4 LT |
12 | */ |
13 | ||
14 | #include <linux/kernel.h> | |
15 | #include <linux/types.h> | |
16 | #include <linux/interrupt.h> | |
17 | #include <linux/list.h> | |
18 | #include <linux/timer.h> | |
19 | #include <linux/init.h> | |
b6d1f542 | 20 | #include <linux/serial_core.h> |
d052d1be | 21 | #include <linux/platform_device.h> |
1da177e4 LT |
22 | |
23 | #include <asm/mach/arch.h> | |
24 | #include <asm/mach/map.h> | |
25 | #include <asm/mach/irq.h> | |
26 | ||
27 | #include <asm/hardware.h> | |
28 | #include <asm/hardware/iomd.h> | |
29 | #include <asm/io.h> | |
30 | #include <asm/irq.h> | |
31 | #include <asm/mach-types.h> | |
32 | ||
e1981680 | 33 | |
1da177e4 | 34 | #include <asm/arch/regs-serial.h> |
f92273c1 AP |
35 | #include <asm/arch/regs-lcd.h> |
36 | ||
9073341c | 37 | #include <asm/arch/h1940.h> |
e1981680 | 38 | #include <asm/arch/h1940-latch.h> |
f92273c1 | 39 | #include <asm/arch/fb.h> |
1da177e4 | 40 | |
1da177e4 LT |
41 | #include "clock.h" |
42 | #include "devs.h" | |
43 | #include "cpu.h" | |
9073341c | 44 | #include "pm.h" |
1da177e4 LT |
45 | |
46 | static struct map_desc h1940_iodesc[] __initdata = { | |
e1981680 BD |
47 | [0] = { |
48 | .virtual = (unsigned long)H1940_LATCH, | |
49 | .pfn = __phys_to_pfn(H1940_PA_LATCH), | |
50 | .length = SZ_16K, | |
51 | .type = MT_DEVICE | |
52 | }, | |
1da177e4 LT |
53 | }; |
54 | ||
55 | #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK | |
56 | #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB | |
57 | #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE | |
58 | ||
66a9b49a | 59 | static struct s3c2410_uartcfg h1940_uartcfgs[] __initdata = { |
1da177e4 LT |
60 | [0] = { |
61 | .hwport = 0, | |
62 | .flags = 0, | |
63 | .ucon = 0x3c5, | |
64 | .ulcon = 0x03, | |
65 | .ufcon = 0x51, | |
66 | }, | |
67 | [1] = { | |
68 | .hwport = 1, | |
69 | .flags = 0, | |
70 | .ucon = 0x245, | |
71 | .ulcon = 0x03, | |
72 | .ufcon = 0x00, | |
73 | }, | |
74 | /* IR port */ | |
75 | [2] = { | |
76 | .hwport = 2, | |
77 | .flags = 0, | |
78 | .uart_flags = UPF_CONS_FLOW, | |
79 | .ucon = 0x3c5, | |
80 | .ulcon = 0x43, | |
81 | .ufcon = 0x51, | |
82 | } | |
83 | }; | |
84 | ||
e1981680 BD |
85 | /* Board control latch control */ |
86 | ||
87 | static unsigned int latch_state = H1940_LATCH_DEFAULT; | |
88 | ||
89 | void h1940_latch_control(unsigned int clear, unsigned int set) | |
90 | { | |
91 | unsigned long flags; | |
92 | ||
93 | local_irq_save(flags); | |
94 | ||
95 | latch_state &= ~clear; | |
96 | latch_state |= set; | |
97 | ||
98 | __raw_writel(latch_state, H1940_LATCH); | |
99 | ||
100 | local_irq_restore(flags); | |
101 | } | |
102 | ||
103 | EXPORT_SYMBOL_GPL(h1940_latch_control); | |
1da177e4 LT |
104 | |
105 | ||
f92273c1 AP |
106 | /** |
107 | * Set lcd on or off | |
108 | **/ | |
109 | static struct s3c2410fb_mach_info h1940_lcdcfg __initdata = { | |
110 | .fixed_syncs= 1, | |
111 | .regs={ | |
112 | .lcdcon1= S3C2410_LCDCON1_TFT16BPP | \ | |
113 | S3C2410_LCDCON1_TFT | \ | |
114 | S3C2410_LCDCON1_CLKVAL(0x0C), | |
115 | ||
116 | .lcdcon2= S3C2410_LCDCON2_VBPD(7) | \ | |
117 | S3C2410_LCDCON2_LINEVAL(319) | \ | |
118 | S3C2410_LCDCON2_VFPD(6) | \ | |
119 | S3C2410_LCDCON2_VSPW(0), | |
120 | ||
121 | .lcdcon3= S3C2410_LCDCON3_HBPD(19) | \ | |
122 | S3C2410_LCDCON3_HOZVAL(239) | \ | |
123 | S3C2410_LCDCON3_HFPD(7), | |
124 | ||
125 | .lcdcon4= S3C2410_LCDCON4_MVAL(0) | \ | |
126 | S3C2410_LCDCON4_HSPW(3), | |
127 | ||
128 | .lcdcon5= S3C2410_LCDCON5_FRM565 | \ | |
129 | S3C2410_LCDCON5_INVVLINE | \ | |
130 | S3C2410_LCDCON5_HWSWP, | |
131 | }, | |
132 | .lpcsel= 0x02, | |
133 | .gpccon= 0xaa940659, | |
134 | .gpccon_mask= 0xffffffff, | |
135 | .gpcup= 0x0000ffff, | |
136 | .gpcup_mask= 0xffffffff, | |
137 | .gpdcon= 0xaa84aaa0, | |
138 | .gpdcon_mask= 0xffffffff, | |
139 | .gpdup= 0x0000faff, | |
140 | .gpdup_mask= 0xffffffff, | |
141 | ||
142 | .width= 240, | |
143 | .height= 320, | |
144 | .xres= {240,240,240}, | |
145 | .yres= {320,320,320}, | |
146 | .bpp= {16,16,16}, | |
147 | }; | |
1da177e4 LT |
148 | |
149 | static struct platform_device *h1940_devices[] __initdata = { | |
150 | &s3c_device_usb, | |
151 | &s3c_device_lcd, | |
152 | &s3c_device_wdt, | |
153 | &s3c_device_i2c, | |
154 | &s3c_device_iis, | |
155 | }; | |
156 | ||
157 | static struct s3c24xx_board h1940_board __initdata = { | |
158 | .devices = h1940_devices, | |
159 | .devices_count = ARRAY_SIZE(h1940_devices) | |
160 | }; | |
161 | ||
5fe10ab1 | 162 | static void __init h1940_map_io(void) |
1da177e4 LT |
163 | { |
164 | s3c24xx_init_io(h1940_iodesc, ARRAY_SIZE(h1940_iodesc)); | |
165 | s3c24xx_init_clocks(0); | |
166 | s3c24xx_init_uarts(h1940_uartcfgs, ARRAY_SIZE(h1940_uartcfgs)); | |
167 | s3c24xx_set_board(&h1940_board); | |
9073341c BD |
168 | |
169 | /* setup PM */ | |
170 | ||
171 | memcpy(phys_to_virt(H1940_SUSPEND_RESUMEAT), h1940_pm_return, 1024); | |
172 | s3c2410_pm_init(); | |
1da177e4 LT |
173 | } |
174 | ||
5fe10ab1 | 175 | static void __init h1940_init_irq(void) |
1da177e4 LT |
176 | { |
177 | s3c24xx_init_irq(); | |
1da177e4 LT |
178 | } |
179 | ||
5fe10ab1 | 180 | static void __init h1940_init(void) |
f92273c1 | 181 | { |
893b0309 | 182 | s3c24xx_fb_set_platdata(&h1940_lcdcfg); |
f92273c1 AP |
183 | } |
184 | ||
1da177e4 | 185 | MACHINE_START(H1940, "IPAQ-H1940") |
e9dea0c6 | 186 | /* Maintainer: Ben Dooks <ben@fluff.org> */ |
e9dea0c6 RK |
187 | .phys_io = S3C2410_PA_UART, |
188 | .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, | |
189 | .boot_params = S3C2410_SDRAM_PA + 0x100, | |
190 | .map_io = h1940_map_io, | |
191 | .init_irq = h1940_init_irq, | |
f92273c1 | 192 | .init_machine = h1940_init, |
1da177e4 LT |
193 | .timer = &s3c24xx_timer, |
194 | MACHINE_END |