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a21765a7 1/* linux/arch/arm/mach-s3c2440/clock.c
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2 *
3 * Copyright (c) 2004-2005 Simtec Electronics
4 * http://armlinux.simtec.co.uk/
5 * Ben Dooks <ben@simtec.co.uk>
6 *
7 * S3C2440 Clock support
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22*/
23
24#include <linux/init.h>
25#include <linux/module.h>
26#include <linux/kernel.h>
27#include <linux/list.h>
28#include <linux/errno.h>
29#include <linux/err.h>
30#include <linux/device.h>
31#include <linux/sysdev.h>
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32#include <linux/interrupt.h>
33#include <linux/ioport.h>
36c64af4 34#include <linux/mutex.h>
f8ce2547 35#include <linux/clk.h>
fced80c7 36#include <linux/io.h>
a8d11e3d 37
a09e64fb 38#include <mach/hardware.h>
60063497 39#include <linux/atomic.h>
a8d11e3d 40#include <asm/irq.h>
a8d11e3d 41
a09e64fb 42#include <mach/regs-clock.h>
a8d11e3d 43
d5120ae7 44#include <plat/clock.h>
a2b7ba9c 45#include <plat/cpu.h>
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46
47/* S3C2440 extended clock support */
48
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49static unsigned long s3c2440_camif_upll_round(struct clk *clk,
50 unsigned long rate)
51{
52 unsigned long parent_rate = clk_get_rate(clk->parent);
53 int div;
54
55 if (rate > parent_rate)
56 return parent_rate;
57
58 /* note, we remove the +/- 1 calculations for the divisor */
59
60 div = (parent_rate / rate) / 2;
61
62 if (div < 1)
63 div = 1;
64 else if (div > 16)
65 div = 16;
66
67 return parent_rate / (div * 2);
68}
69
70static int s3c2440_camif_upll_setrate(struct clk *clk, unsigned long rate)
71{
72 unsigned long parent_rate = clk_get_rate(clk->parent);
73 unsigned long camdivn = __raw_readl(S3C2440_CAMDIVN);
74
75 rate = s3c2440_camif_upll_round(clk, rate);
76
77 camdivn &= ~(S3C2440_CAMDIVN_CAMCLK_SEL | S3C2440_CAMDIVN_CAMCLK_MASK);
78
79 if (rate != parent_rate) {
80 camdivn |= S3C2440_CAMDIVN_CAMCLK_SEL;
81 camdivn |= (((parent_rate / rate) / 2) - 1);
82 }
83
84 __raw_writel(camdivn, S3C2440_CAMDIVN);
85
86 return 0;
87}
88
89/* Extra S3C2440 clocks */
90
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91static struct clk s3c2440_clk_cam = {
92 .name = "camif",
99c13853 93 .enable = s3c2410_clkcon_enable,
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94 .ctrlbit = S3C2440_CLKCON_CAMERA,
95};
96
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97static struct clk s3c2440_clk_cam_upll = {
98 .name = "camif-upll",
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99 .ops = &(struct clk_ops) {
100 .set_rate = s3c2440_camif_upll_setrate,
101 .round_rate = s3c2440_camif_upll_round,
102 },
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103};
104
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105static struct clk s3c2440_clk_ac97 = {
106 .name = "ac97",
99c13853 107 .enable = s3c2410_clkcon_enable,
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108 .ctrlbit = S3C2440_CLKCON_CAMERA,
109};
110
111static int s3c2440_clk_add(struct sys_device *sysdev)
112{
3a38e4be 113 struct clk *clock_upll;
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114 struct clk *clock_h;
115 struct clk *clock_p;
a8d11e3d 116
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117 clock_p = clk_get(NULL, "pclk");
118 clock_h = clk_get(NULL, "hclk");
119 clock_upll = clk_get(NULL, "upll");
a8d11e3d 120
e546e8af 121 if (IS_ERR(clock_p) || IS_ERR(clock_h) || IS_ERR(clock_upll)) {
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122 printk(KERN_ERR "S3C2440: Failed to get parent clocks\n");
123 return -EINVAL;
124 }
125
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126 s3c2440_clk_cam.parent = clock_h;
127 s3c2440_clk_ac97.parent = clock_p;
128 s3c2440_clk_cam_upll.parent = clock_upll;
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129
130 s3c24xx_register_clock(&s3c2440_clk_ac97);
131 s3c24xx_register_clock(&s3c2440_clk_cam);
e44c0396 132 s3c24xx_register_clock(&s3c2440_clk_cam_upll);
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133
134 clk_disable(&s3c2440_clk_ac97);
135 clk_disable(&s3c2440_clk_cam);
136
137 return 0;
138}
139
140static struct sysdev_driver s3c2440_clk_driver = {
141 .add = s3c2440_clk_add,
142};
143
144static __init int s3c24xx_clk_driver(void)
145{
146 return sysdev_driver_register(&s3c2440_sysclass, &s3c2440_clk_driver);
147}
148
149arch_initcall(s3c24xx_clk_driver);