[mirror_ubuntu-artful-kernel.git] / arch / arm / mach-s3c24xx / mach-at2440evb.c

/* linux/arch/arm/mach-s3c2440/mach-at2440evb.c
 *
 * Copyright (c) 2008 Ramax Lo <ramaxlo@gmail.com>
 *      Based on mach-anubis.c by Ben Dooks <ben@simtec.co.uk>
 *      and modifications by SBZ <sbz@spgui.org> and
 *      Weibing <http://weibing.blogbus.com>
 *
 * For product information, visit http://www.arm.com/
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
*/

#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/gpio.h>
#include <linux/interrupt.h>
#include <linux/list.h>
#include <linux/timer.h>
#include <linux/init.h>
#include <linux/io.h>
#include <linux/serial_core.h>
#include <linux/serial_s3c.h>
#include <linux/dm9000.h>
#include <linux/platform_device.h>

#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/irq.h>

#include <mach/hardware.h>
#include <mach/fb.h>
#include <asm/irq.h>
#include <asm/mach-types.h>

#include <mach/regs-gpio.h>
#include <mach/regs-lcd.h>
#include <mach/gpio-samsung.h>
#include <linux/platform_data/mtd-nand-s3c2410.h>
#include <linux/platform_data/i2c-s3c2410.h>

#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/nand_ecc.h>
#include <linux/mtd/partitions.h>

#include <plat/devs.h>
#include <plat/cpu.h>
#include <linux/platform_data/mmc-s3cmci.h>
#include <plat/samsung-time.h>

#include "common.h"

static struct map_desc at2440evb_iodesc[] __initdata = {
	/* Nothing here */
};

#define UCON S3C2410_UCON_DEFAULT
#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE)
#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)

static struct s3c2410_uartcfg at2440evb_uartcfgs[] __initdata = {
	[0] = {
		.hwport	     = 0,
		.flags	     = 0,
		.ucon	     = UCON,
		.ulcon	     = ULCON,
		.ufcon	     = UFCON,
		.clk_sel	= S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
	},
	[1] = {
		.hwport	     = 1,
		.flags	     = 0,
		.ucon	     = UCON,
		.ulcon	     = ULCON,
		.ufcon	     = UFCON,
		.clk_sel	= S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
	},
};

/* NAND Flash on AT2440EVB board */

static struct mtd_partition __initdata at2440evb_default_nand_part[] = {
	[0] = {
		.name	= "Boot Agent",
		.size	= SZ_256K,
		.offset	= 0,
	},
	[1] = {
		.name	= "Kernel",
		.size	= SZ_2M,
		.offset	= SZ_256K,
	},
	[2] = {
		.name	= "Root",
		.offset	= SZ_256K + SZ_2M,
		.size	= MTDPART_SIZ_FULL,
	},
};

static struct s3c2410_nand_set __initdata at2440evb_nand_sets[] = {
	[0] = {
		.name		= "nand",
		.nr_chips	= 1,
		.nr_partitions	= ARRAY_SIZE(at2440evb_default_nand_part),
		.partitions	= at2440evb_default_nand_part,
	},
};

static struct s3c2410_platform_nand __initdata at2440evb_nand_info = {
	.tacls		= 25,
	.twrph0		= 55,
	.twrph1		= 40,
	.nr_sets	= ARRAY_SIZE(at2440evb_nand_sets),
	.sets		= at2440evb_nand_sets,
	.ecc_mode       = NAND_ECC_SOFT,
};

/* DM9000AEP 10/100 ethernet controller */

static struct resource at2440evb_dm9k_resource[] = {
	[0] = DEFINE_RES_MEM(S3C2410_CS3, 4),
	[1] = DEFINE_RES_MEM(S3C2410_CS3 + 4, 4),
	[2] = DEFINE_RES_NAMED(IRQ_EINT7, 1, NULL, IORESOURCE_IRQ \
					| IORESOURCE_IRQ_HIGHEDGE),
};

static struct dm9000_plat_data at2440evb_dm9k_pdata = {
	.flags		= (DM9000_PLATF_16BITONLY | DM9000_PLATF_NO_EEPROM),
};

static struct platform_device at2440evb_device_eth = {
	.name		= "dm9000",
	.id		= -1,
	.num_resources	= ARRAY_SIZE(at2440evb_dm9k_resource),
	.resource	= at2440evb_dm9k_resource,
	.dev		= {
		.platform_data	= &at2440evb_dm9k_pdata,
	},
};

static struct s3c24xx_mci_pdata at2440evb_mci_pdata __initdata = {
	.gpio_detect	= S3C2410_GPG(10),
};

/* 7" LCD panel */

static struct s3c2410fb_display at2440evb_lcd_cfg __initdata = {

	.lcdcon5	= S3C2410_LCDCON5_FRM565 |
			  S3C2410_LCDCON5_INVVLINE |
			  S3C2410_LCDCON5_INVVFRAME |
			  S3C2410_LCDCON5_PWREN |
			  S3C2410_LCDCON5_HWSWP,

	.type		= S3C2410_LCDCON1_TFT,

	.width		= 800,
	.height		= 480,

	.pixclock	= 33333, /* HCLK 60 MHz, divisor 2 */
	.xres		= 800,
	.yres		= 480,
	.bpp		= 16,
	.left_margin	= 88,
	.right_margin	= 40,
	.hsync_len	= 128,
	.upper_margin	= 32,
	.lower_margin	= 11,
	.vsync_len	= 2,
};

static struct s3c2410fb_mach_info at2440evb_fb_info __initdata = {
	.displays	= &at2440evb_lcd_cfg,
	.num_displays	= 1,
	.default_display = 0,
};

static struct platform_device *at2440evb_devices[] __initdata = {
	&s3c_device_ohci,
	&s3c_device_wdt,
	&s3c_device_adc,
	&s3c_device_i2c0,
	&s3c_device_rtc,
	&s3c_device_nand,
	&s3c_device_sdi,
	&s3c_device_lcd,
	&at2440evb_device_eth,
};

static void __init at2440evb_map_io(void)
{
	s3c24xx_init_io(at2440evb_iodesc, ARRAY_SIZE(at2440evb_iodesc));
	s3c24xx_init_uarts(at2440evb_uartcfgs, ARRAY_SIZE(at2440evb_uartcfgs));
	samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4);
}

static void __init at2440evb_init_time(void)
{
	s3c2440_init_clocks(16934400);
	samsung_timer_init();
}

static void __init at2440evb_init(void)
{
	s3c24xx_fb_set_platdata(&at2440evb_fb_info);
	s3c24xx_mci_set_platdata(&at2440evb_mci_pdata);
	s3c_nand_set_platdata(&at2440evb_nand_info);
	s3c_i2c0_set_platdata(NULL);

	platform_add_devices(at2440evb_devices, ARRAY_SIZE(at2440evb_devices));
}


MACHINE_START(AT2440EVB, "AT2440EVB")
	.atag_offset	= 0x100,
	.map_io		= at2440evb_map_io,
	.init_machine	= at2440evb_init,
	.init_irq	= s3c2440_init_irq,
	.init_time	= at2440evb_init_time,
MACHINE_END
Commit	Line	Data
4ab98971 RL	1	/* linux/arch/arm/mach-s3c2440/mach-at2440evb.c
	2	*
	3	* Copyright (c) 2008 Ramax Lo <ramaxlo@gmail.com>
	4	* Based on mach-anubis.c by Ben Dooks <ben@simtec.co.uk>
	5	* and modifications by SBZ <sbz@spgui.org> and
	6	* Weibing <http://weibing.blogbus.com>
	7	*
50a23e6e	8	* For product information, visit http://www.arm.com/
4ab98971 RL	9	*
	10	* This program is free software; you can redistribute it and/or modify
	11	* it under the terms of the GNU General Public License version 2 as
	12	* published by the Free Software Foundation.
	13	*/
	14
	15	#include <linux/kernel.h>
	16	#include <linux/types.h>
0a2691da	17	#include <linux/gpio.h>
4ab98971 RL	18	#include <linux/interrupt.h>
	19	#include <linux/list.h>
	20	#include <linux/timer.h>
	21	#include <linux/init.h>
	22	#include <linux/io.h>
	23	#include <linux/serial_core.h>
334a1c70	24	#include <linux/serial_s3c.h>
66493c2d	25	#include <linux/dm9000.h>
4ab98971 RL	26	#include <linux/platform_device.h>
	27
	28	#include <asm/mach/arch.h>
	29	#include <asm/mach/map.h>
	30	#include <asm/mach/irq.h>
	31
a09e64fb	32	#include <mach/hardware.h>
1d19fdba	33	#include <mach/fb.h>
4ab98971 RL	34	#include <asm/irq.h>
	35	#include <asm/mach-types.h>
	36
a09e64fb	37	#include <mach/regs-gpio.h>
a09e64fb	38	#include <mach/regs-lcd.h>
b0161caa	39	#include <mach/gpio-samsung.h>
436d42c6 AB	40	#include <linux/platform_data/mtd-nand-s3c2410.h>
436d42c6 AB	41	#include <linux/platform_data/i2c-s3c2410.h>
4ab98971 RL	42
	43	#include <linux/mtd/mtd.h>
	44	#include <linux/mtd/nand.h>
	45	#include <linux/mtd/nand_ecc.h>
	46	#include <linux/mtd/partitions.h>
	47
a2b7ba9c BD	48	#include <plat/devs.h>
a2b7ba9c BD	49	#include <plat/cpu.h>
436d42c6	50	#include <linux/platform_data/mmc-s3cmci.h>
7f78b6eb	51	#include <plat/samsung-time.h>
4ab98971	52
b27b0727 KK	53	#include "common.h"
b27b0727 KK	54
4ab98971 RL	55	static struct map_desc at2440evb_iodesc[] __initdata = {
	56	/* Nothing here */
	57	};
	58
	59	#define UCON S3C2410_UCON_DEFAULT
	60	#define ULCON (S3C2410_LCON_CS8 \| S3C2410_LCON_PNONE)
	61	#define UFCON (S3C2410_UFCON_RXTRIG8 \| S3C2410_UFCON_FIFOMODE)
	62
4ab98971 RL	63	static struct s3c2410_uartcfg at2440evb_uartcfgs[] __initdata = {
	64	[0] = {
	65	.hwport = 0,
	66	.flags = 0,
	67	.ucon = UCON,
	68	.ulcon = ULCON,
	69	.ufcon = UFCON,
afba7f91	70	.clk_sel = S3C2410_UCON_CLKSEL1 \| S3C2410_UCON_CLKSEL2,
4ab98971 RL	71	},
	72	[1] = {
	73	.hwport = 1,
	74	.flags = 0,
	75	.ucon = UCON,
	76	.ulcon = ULCON,
	77	.ufcon = UFCON,
afba7f91	78	.clk_sel = S3C2410_UCON_CLKSEL1 \| S3C2410_UCON_CLKSEL2,
4ab98971 RL	79	},
	80	};
	81
	82	/* NAND Flash on AT2440EVB board */
	83
2a3a1804	84	static struct mtd_partition __initdata at2440evb_default_nand_part[] = {
4ab98971 RL	85	[0] = {
	86	.name = "Boot Agent",
	87	.size = SZ_256K,
	88	.offset = 0,
	89	},
	90	[1] = {
	91	.name = "Kernel",
	92	.size = SZ_2M,
	93	.offset = SZ_256K,
	94	},
	95	[2] = {
	96	.name = "Root",
	97	.offset = SZ_256K + SZ_2M,
	98	.size = MTDPART_SIZ_FULL,
	99	},
	100	};
	101
2a3a1804	102	static struct s3c2410_nand_set __initdata at2440evb_nand_sets[] = {
4ab98971 RL	103	[0] = {
	104	.name = "nand",
	105	.nr_chips = 1,
	106	.nr_partitions = ARRAY_SIZE(at2440evb_default_nand_part),
	107	.partitions = at2440evb_default_nand_part,
	108	},
	109	};
	110
2a3a1804	111	static struct s3c2410_platform_nand __initdata at2440evb_nand_info = {
4ab98971 RL	112	.tacls = 25,
	113	.twrph0 = 55,
	114	.twrph1 = 40,
	115	.nr_sets = ARRAY_SIZE(at2440evb_nand_sets),
	116	.sets = at2440evb_nand_sets,
e9f66ae2	117	.ecc_mode = NAND_ECC_SOFT,
4ab98971 RL	118	};
4ab98971 RL	119
66493c2d RL	120	/* DM9000AEP 10/100 ethernet controller */
	121
	122	static struct resource at2440evb_dm9k_resource[] = {
d990e398 TB	123	[0] = DEFINE_RES_MEM(S3C2410_CS3, 4),
	124	[1] = DEFINE_RES_MEM(S3C2410_CS3 + 4, 4),
	125	[2] = DEFINE_RES_NAMED(IRQ_EINT7, 1, NULL, IORESOURCE_IRQ \
	126	\| IORESOURCE_IRQ_HIGHEDGE),
66493c2d RL	127	};
	128
	129	static struct dm9000_plat_data at2440evb_dm9k_pdata = {
	130	.flags = (DM9000_PLATF_16BITONLY \| DM9000_PLATF_NO_EEPROM),
	131	};
	132
	133	static struct platform_device at2440evb_device_eth = {
	134	.name = "dm9000",
	135	.id = -1,
	136	.num_resources = ARRAY_SIZE(at2440evb_dm9k_resource),
	137	.resource = at2440evb_dm9k_resource,
	138	.dev = {
	139	.platform_data = &at2440evb_dm9k_pdata,
	140	},
	141	};
	142
22c810ab	143	static struct s3c24xx_mci_pdata at2440evb_mci_pdata __initdata = {
070276d5	144	.gpio_detect = S3C2410_GPG(10),
4a045cb3 BD	145	};
4a045cb3 BD	146
1d19fdba BD	147	/* 7" LCD panel */
	148
	149	static struct s3c2410fb_display at2440evb_lcd_cfg __initdata = {
	150
	151	.lcdcon5 = S3C2410_LCDCON5_FRM565 \|
	152	S3C2410_LCDCON5_INVVLINE \|
	153	S3C2410_LCDCON5_INVVFRAME \|
	154	S3C2410_LCDCON5_PWREN \|
	155	S3C2410_LCDCON5_HWSWP,
	156
	157	.type = S3C2410_LCDCON1_TFT,
	158
	159	.width = 800,
	160	.height = 480,
	161
	162	.pixclock = 33333, /* HCLK 60 MHz, divisor 2 */
	163	.xres = 800,
	164	.yres = 480,
	165	.bpp = 16,
	166	.left_margin = 88,
	167	.right_margin = 40,
	168	.hsync_len = 128,
	169	.upper_margin = 32,
	170	.lower_margin = 11,
	171	.vsync_len = 2,
	172	};
	173
	174	static struct s3c2410fb_mach_info at2440evb_fb_info __initdata = {
	175	.displays = &at2440evb_lcd_cfg,
	176	.num_displays = 1,
	177	.default_display = 0,
	178	};
	179
4ab98971	180	static struct platform_device *at2440evb_devices[] __initdata = {
b813248c	181	&s3c_device_ohci,
4ab98971 RL	182	&s3c_device_wdt,
4ab98971 RL	183	&s3c_device_adc,
3e1b776c	184	&s3c_device_i2c0,
4ab98971 RL	185	&s3c_device_rtc,
4ab98971 RL	186	&s3c_device_nand,
4a045cb3	187	&s3c_device_sdi,
1d19fdba	188	&s3c_device_lcd,
66493c2d	189	&at2440evb_device_eth,
4ab98971 RL	190	};
	191
	192	static void __init at2440evb_map_io(void)
	193	{
4ab98971	194	s3c24xx_init_io(at2440evb_iodesc, ARRAY_SIZE(at2440evb_iodesc));
4ab98971	195	s3c24xx_init_uarts(at2440evb_uartcfgs, ARRAY_SIZE(at2440evb_uartcfgs));
7f78b6eb	196	samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4);
4ab98971 RL	197	}
4ab98971 RL	198
a28d618e HS	199	static void __init at2440evb_init_time(void)
	200	{
	201	s3c2440_init_clocks(16934400);
	202	samsung_timer_init();
	203	}
	204
4ab98971 RL	205	static void __init at2440evb_init(void)
4ab98971 RL	206	{
1d19fdba	207	s3c24xx_fb_set_platdata(&at2440evb_fb_info);
22c810ab	208	s3c24xx_mci_set_platdata(&at2440evb_mci_pdata);
2a3a1804	209	s3c_nand_set_platdata(&at2440evb_nand_info);
3e1b776c	210	s3c_i2c0_set_platdata(NULL);
56c035c9	211
4ab98971 RL	212	platform_add_devices(at2440evb_devices, ARRAY_SIZE(at2440evb_devices));
	213	}
	214
	215
	216	MACHINE_START(AT2440EVB, "AT2440EVB")
69d50710	217	.atag_offset = 0x100,
4ab98971 RL	218	.map_io = at2440evb_map_io,
4ab98971 RL	219	.init_machine = at2440evb_init,
ce6c164b	220	.init_irq = s3c2440_init_irq,
a28d618e	221	.init_time = at2440evb_init_time,
4ab98971	222	MACHINE_END