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mmc: s3cmci: moved mach/regs-sdi.h into s3cmci device driver
[mirror_ubuntu-artful-kernel.git] / arch / arm / mach-s3c24xx / mach-smdk2440.c
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a21765a7 1/* linux/arch/arm/mach-s3c2440/mach-smdk2440.c
1da177e4 2 *
e02f8664 3 * Copyright (c) 2004-2005 Simtec Electronics
1da177e4
LT
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * http://www.fluff.org/ben/smdk2440/
7 *
8 * Thanks to Dimity Andric and TomTom for the loan of an SMDK2440.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 *
1da177e4
LT
14*/
15
16#include <linux/kernel.h>
17#include <linux/types.h>
18#include <linux/interrupt.h>
19#include <linux/list.h>
20#include <linux/timer.h>
21#include <linux/init.h>
b6d1f542 22#include <linux/serial_core.h>
d052d1be 23#include <linux/platform_device.h>
fced80c7 24#include <linux/io.h>
1da177e4
LT
25
26#include <asm/mach/arch.h>
27#include <asm/mach/map.h>
28#include <asm/mach/irq.h>
29
a09e64fb 30#include <mach/hardware.h>
1da177e4
LT
31#include <asm/irq.h>
32#include <asm/mach-types.h>
33
a2b7ba9c 34#include <plat/regs-serial.h>
a09e64fb
RK
35#include <mach/regs-gpio.h>
36#include <mach/regs-lcd.h>
57718976 37
a09e64fb 38#include <mach/fb.h>
436d42c6 39#include <linux/platform_data/i2c-s3c2410.h>
1da177e4 40
a2b7ba9c 41#include <plat/s3c2410.h>
84c9b727 42#include <plat/s3c244x.h>
d5120ae7 43#include <plat/clock.h>
a2b7ba9c
BD
44#include <plat/devs.h>
45#include <plat/cpu.h>
d3f4c571 46
d5120ae7 47#include <plat/common-smdk.h>
1da177e4 48
b27b0727
KK
49#include "common.h"
50
1da177e4
LT
51static struct map_desc smdk2440_iodesc[] __initdata = {
52 /* ISA IO Space map (memory space selected by A24) */
53
cbe69f95
BD
54 {
55 .virtual = (u32)S3C24XX_VA_ISA_WORD,
56 .pfn = __phys_to_pfn(S3C2410_CS2),
57 .length = 0x10000,
58 .type = MT_DEVICE,
59 }, {
60 .virtual = (u32)S3C24XX_VA_ISA_WORD + 0x10000,
61 .pfn = __phys_to_pfn(S3C2410_CS2 + (1<<24)),
62 .length = SZ_4M,
63 .type = MT_DEVICE,
64 }, {
65 .virtual = (u32)S3C24XX_VA_ISA_BYTE,
66 .pfn = __phys_to_pfn(S3C2410_CS2),
67 .length = 0x10000,
68 .type = MT_DEVICE,
69 }, {
70 .virtual = (u32)S3C24XX_VA_ISA_BYTE + 0x10000,
71 .pfn = __phys_to_pfn(S3C2410_CS2 + (1<<24)),
72 .length = SZ_4M,
73 .type = MT_DEVICE,
74 }
1da177e4
LT
75};
76
77#define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
78#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
79#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
80
66a9b49a 81static struct s3c2410_uartcfg smdk2440_uartcfgs[] __initdata = {
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LT
82 [0] = {
83 .hwport = 0,
84 .flags = 0,
85 .ucon = 0x3c5,
86 .ulcon = 0x03,
87 .ufcon = 0x51,
88 },
89 [1] = {
90 .hwport = 1,
91 .flags = 0,
92 .ucon = 0x3c5,
93 .ulcon = 0x03,
94 .ufcon = 0x51,
95 },
96 /* IR port */
97 [2] = {
98 .hwport = 2,
99 .flags = 0,
100 .ucon = 0x3c5,
101 .ulcon = 0x43,
102 .ufcon = 0x51,
103 }
104};
105
57718976
BD
106/* LCD driver info */
107
09fe75f6 108static struct s3c2410fb_display smdk2440_lcd_cfg __initdata = {
57718976 109
f28ef573
KH
110 .lcdcon5 = S3C2410_LCDCON5_FRM565 |
111 S3C2410_LCDCON5_INVVLINE |
112 S3C2410_LCDCON5_INVVFRAME |
113 S3C2410_LCDCON5_PWREN |
114 S3C2410_LCDCON5_HWSWP,
57718976 115
69816699 116 .type = S3C2410_LCDCON1_TFT,
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KH
117
118 .width = 240,
119 .height = 320,
120
69816699 121 .pixclock = 166667, /* HCLK 60 MHz, divisor 10 */
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KH
122 .xres = 240,
123 .yres = 320,
124 .bpp = 16,
1f411537
KH
125 .left_margin = 20,
126 .right_margin = 8,
93d11f5a 127 .hsync_len = 4,
5f20f69b
KH
128 .upper_margin = 8,
129 .lower_margin = 7,
93d11f5a 130 .vsync_len = 4,
09fe75f6
KH
131};
132
133static struct s3c2410fb_mach_info smdk2440_fb_info __initdata = {
134 .displays = &smdk2440_lcd_cfg,
135 .num_displays = 1,
136 .default_display = 0,
137
57718976
BD
138#if 0
139 /* currently setup by downloader */
140 .gpccon = 0xaa940659,
141 .gpccon_mask = 0xffffffff,
142 .gpcup = 0x0000ffff,
143 .gpcup_mask = 0xffffffff,
144 .gpdcon = 0xaa84aaa0,
145 .gpdcon_mask = 0xffffffff,
146 .gpdup = 0x0000faff,
147 .gpdup_mask = 0xffffffff,
148#endif
149
150 .lpcsel = ((0xCE6) & ~7) | 1<<4,
57718976
BD
151};
152
1da177e4 153static struct platform_device *smdk2440_devices[] __initdata = {
b813248c 154 &s3c_device_ohci,
1da177e4
LT
155 &s3c_device_lcd,
156 &s3c_device_wdt,
3e1b776c 157 &s3c_device_i2c0,
1da177e4
LT
158 &s3c_device_iis,
159};
160
5fe10ab1 161static void __init smdk2440_map_io(void)
1da177e4
LT
162{
163 s3c24xx_init_io(smdk2440_iodesc, ARRAY_SIZE(smdk2440_iodesc));
164 s3c24xx_init_clocks(16934400);
165 s3c24xx_init_uarts(smdk2440_uartcfgs, ARRAY_SIZE(smdk2440_uartcfgs));
1da177e4
LT
166}
167
5fe10ab1 168static void __init smdk2440_machine_init(void)
1da177e4 169{
09fe75f6 170 s3c24xx_fb_set_platdata(&smdk2440_fb_info);
3e1b776c 171 s3c_i2c0_set_platdata(NULL);
57718976 172
57e5171c 173 platform_add_devices(smdk2440_devices, ARRAY_SIZE(smdk2440_devices));
d3f4c571 174 smdk_machine_init();
1da177e4
LT
175}
176
177MACHINE_START(S3C2440, "SMDK2440")
afdd225d 178 /* Maintainer: Ben Dooks <ben-linux@fluff.org> */
69d50710 179 .atag_offset = 0x100,
1da177e4
LT
180
181 .init_irq = s3c24xx_init_irq,
182 .map_io = smdk2440_map_io,
183 .init_machine = smdk2440_machine_init,
6bb27d73 184 .init_time = s3c24xx_timer_init,
c1ba544f 185 .restart = s3c244x_restart,
1da177e4 186MACHINE_END