[mirror_ubuntu-zesty-kernel.git] / arch / arm / mach-s3c64xx / irq-pm.c

/* arch/arm/plat-s3c64xx/irq-pm.c
 *
 * Copyright 2008 Openmoko, Inc.
 * Copyright 2008 Simtec Electronics
 *      Ben Dooks <ben@simtec.co.uk>
 *      http://armlinux.simtec.co.uk/
 *
 * S3C64XX - Interrupt handling Power Management
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

/*
 * NOTE: Code in this file is not used when booting with Device Tree support.
 */

#include <linux/kernel.h>
#include <linux/syscore_ops.h>
#include <linux/interrupt.h>
#include <linux/serial_core.h>
#include <linux/irq.h>
#include <linux/io.h>
#include <linux/of.h>

#include <mach/map.h>

#include <plat/regs-serial.h>
#include <mach/regs-gpio.h>
#include <plat/cpu.h>
#include <plat/pm.h>

/* We handled all the IRQ types in this code, to save having to make several
 * small files to handle each different type separately. Having the EINT_GRP
 * code here shouldn't be as much bloat as the IRQ table space needed when
 * they are enabled. The added benefit is we ensure that these registers are
 * in the same state as we suspended.
 */

static struct sleep_save irq_save[] = {
	SAVE_ITEM(S3C64XX_PRIORITY),
	SAVE_ITEM(S3C64XX_EINT0CON0),
	SAVE_ITEM(S3C64XX_EINT0CON1),
	SAVE_ITEM(S3C64XX_EINT0FLTCON0),
	SAVE_ITEM(S3C64XX_EINT0FLTCON1),
	SAVE_ITEM(S3C64XX_EINT0FLTCON2),
	SAVE_ITEM(S3C64XX_EINT0FLTCON3),
	SAVE_ITEM(S3C64XX_EINT0MASK),
};

static struct irq_grp_save {
	u32	fltcon;
	u32	con;
	u32	mask;
} eint_grp_save[5];

static u32 irq_uart_mask[CONFIG_SERIAL_SAMSUNG_UARTS];

static int s3c64xx_irq_pm_suspend(void)
{
	struct irq_grp_save *grp = eint_grp_save;
	int i;

	S3C_PMDBG("%s: suspending IRQs\n", __func__);

	s3c_pm_do_save(irq_save, ARRAY_SIZE(irq_save));

	for (i = 0; i < CONFIG_SERIAL_SAMSUNG_UARTS; i++)
		irq_uart_mask[i] = __raw_readl(S3C_VA_UARTx(i) + S3C64XX_UINTM);

	for (i = 0; i < ARRAY_SIZE(eint_grp_save); i++, grp++) {
		grp->con = __raw_readl(S3C64XX_EINT12CON + (i * 4));
		grp->mask = __raw_readl(S3C64XX_EINT12MASK + (i * 4));
		grp->fltcon = __raw_readl(S3C64XX_EINT12FLTCON + (i * 4));
	}

	return 0;
}

static void s3c64xx_irq_pm_resume(void)
{
	struct irq_grp_save *grp = eint_grp_save;
	int i;

	S3C_PMDBG("%s: resuming IRQs\n", __func__);

	s3c_pm_do_restore(irq_save, ARRAY_SIZE(irq_save));

	for (i = 0; i < CONFIG_SERIAL_SAMSUNG_UARTS; i++)
		__raw_writel(irq_uart_mask[i], S3C_VA_UARTx(i) + S3C64XX_UINTM);

	for (i = 0; i < ARRAY_SIZE(eint_grp_save); i++, grp++) {
		__raw_writel(grp->con, S3C64XX_EINT12CON + (i * 4));
		__raw_writel(grp->mask, S3C64XX_EINT12MASK + (i * 4));
		__raw_writel(grp->fltcon, S3C64XX_EINT12FLTCON + (i * 4));
	}

	S3C_PMDBG("%s: IRQ configuration restored\n", __func__);
}

static struct syscore_ops s3c64xx_irq_syscore_ops = {
	.suspend = s3c64xx_irq_pm_suspend,
	.resume	 = s3c64xx_irq_pm_resume,
};

static __init int s3c64xx_syscore_init(void)
{
	/* Appropriate drivers (pinctrl, uart) handle this when using DT. */
	if (of_have_populated_dt())
		return 0;

	register_syscore_ops(&s3c64xx_irq_syscore_ops);

	return 0;
}

core_initcall(s3c64xx_syscore_init);
Commit	Line	Data
966bcc14 BD	1	/* arch/arm/plat-s3c64xx/irq-pm.c
	2	*
	3	* Copyright 2008 Openmoko, Inc.
	4	* Copyright 2008 Simtec Electronics
	5	* Ben Dooks <ben@simtec.co.uk>
	6	* http://armlinux.simtec.co.uk/
	7	*
	8	* S3C64XX - Interrupt handling Power Management
	9	*
	10	* This program is free software; you can redistribute it and/or modify
	11	* it under the terms of the GNU General Public License version 2 as
	12	* published by the Free Software Foundation.
	13	*/
	14
c836c90e TF	15	/*
	16	* NOTE: Code in this file is not used when booting with Device Tree support.
	17	*/
	18
966bcc14	19	#include <linux/kernel.h>
bb072c3c	20	#include <linux/syscore_ops.h>
966bcc14 BD	21	#include <linux/interrupt.h>
	22	#include <linux/serial_core.h>
	23	#include <linux/irq.h>
	24	#include <linux/io.h>
c836c90e	25	#include <linux/of.h>
966bcc14 BD	26
	27	#include <mach/map.h>
	28
	29	#include <plat/regs-serial.h>
3501c9ae	30	#include <mach/regs-gpio.h>
966bcc14 BD	31	#include <plat/cpu.h>
	32	#include <plat/pm.h>
	33
	34	/* We handled all the IRQ types in this code, to save having to make several
	35	* small files to handle each different type separately. Having the EINT_GRP
	36	* code here shouldn't be as much bloat as the IRQ table space needed when
	37	* they are enabled. The added benefit is we ensure that these registers are
	38	* in the same state as we suspended.
	39	*/
	40
	41	static struct sleep_save irq_save[] = {
	42	SAVE_ITEM(S3C64XX_PRIORITY),
	43	SAVE_ITEM(S3C64XX_EINT0CON0),
	44	SAVE_ITEM(S3C64XX_EINT0CON1),
	45	SAVE_ITEM(S3C64XX_EINT0FLTCON0),
	46	SAVE_ITEM(S3C64XX_EINT0FLTCON1),
	47	SAVE_ITEM(S3C64XX_EINT0FLTCON2),
	48	SAVE_ITEM(S3C64XX_EINT0FLTCON3),
	49	SAVE_ITEM(S3C64XX_EINT0MASK),
966bcc14 BD	50	};
	51
	52	static struct irq_grp_save {
	53	u32 fltcon;
	54	u32 con;
	55	u32 mask;
	56	} eint_grp_save[5];
	57
	58	static u32 irq_uart_mask[CONFIG_SERIAL_SAMSUNG_UARTS];
	59
bb072c3c	60	static int s3c64xx_irq_pm_suspend(void)
966bcc14 BD	61	{
	62	struct irq_grp_save *grp = eint_grp_save;
	63	int i;
	64
	65	S3C_PMDBG("%s: suspending IRQs\n", __func__);
	66
	67	s3c_pm_do_save(irq_save, ARRAY_SIZE(irq_save));
	68
	69	for (i = 0; i < CONFIG_SERIAL_SAMSUNG_UARTS; i++)
	70	irq_uart_mask[i] = __raw_readl(S3C_VA_UARTx(i) + S3C64XX_UINTM);
	71
	72	for (i = 0; i < ARRAY_SIZE(eint_grp_save); i++, grp++) {
	73	grp->con = __raw_readl(S3C64XX_EINT12CON + (i * 4));
	74	grp->mask = __raw_readl(S3C64XX_EINT12MASK + (i * 4));
	75	grp->fltcon = __raw_readl(S3C64XX_EINT12FLTCON + (i * 4));
	76	}
	77
	78	return 0;
	79	}
	80
bb072c3c	81	static void s3c64xx_irq_pm_resume(void)
966bcc14 BD	82	{
	83	struct irq_grp_save *grp = eint_grp_save;
	84	int i;
	85
	86	S3C_PMDBG("%s: resuming IRQs\n", __func__);
	87
	88	s3c_pm_do_restore(irq_save, ARRAY_SIZE(irq_save));
	89
	90	for (i = 0; i < CONFIG_SERIAL_SAMSUNG_UARTS; i++)
	91	__raw_writel(irq_uart_mask[i], S3C_VA_UARTx(i) + S3C64XX_UINTM);
	92
	93	for (i = 0; i < ARRAY_SIZE(eint_grp_save); i++, grp++) {
	94	__raw_writel(grp->con, S3C64XX_EINT12CON + (i * 4));
	95	__raw_writel(grp->mask, S3C64XX_EINT12MASK + (i * 4));
	96	__raw_writel(grp->fltcon, S3C64XX_EINT12FLTCON + (i * 4));
	97	}
	98
	99	S3C_PMDBG("%s: IRQ configuration restored\n", __func__);
966bcc14 BD	100	}
966bcc14 BD	101
5086c6c8	102	static struct syscore_ops s3c64xx_irq_syscore_ops = {
966bcc14 BD	103	.suspend = s3c64xx_irq_pm_suspend,
	104	.resume = s3c64xx_irq_pm_resume,
	105	};
	106
bb072c3c	107	static __init int s3c64xx_syscore_init(void)
966bcc14	108	{
c836c90e TF	109	/* Appropriate drivers (pinctrl, uart) handle this when using DT. */
	110	if (of_have_populated_dt())
	111	return 0;
	112
bb072c3c	113	register_syscore_ops(&s3c64xx_irq_syscore_ops);
966bcc14	114
bb072c3c RW	115	return 0;
bb072c3c RW	116	}
966bcc14	117
bb072c3c	118	core_initcall(s3c64xx_syscore_init);