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[mirror_ubuntu-hirsute-kernel.git] / arch / arm / mach-s3c64xx / mach-crag6410.c
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e1a3c74f
MB		 1/* linux/arch/arm/mach-s3c64xx/mach-crag6410.c
2 *
3 * Copyright 2011 Wolfson Microelectronics plc
4 * Mark Brown <broonie@opensource.wolfsonmicro.com>
5 *
6 * Copyright 2011 Simtec Electronics
7 * Ben Dooks <ben@simtec.co.uk>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#include <linux/kernel.h>
15#include <linux/list.h>
16#include <linux/serial_core.h>
17#include <linux/platform_device.h>
18#include <linux/fb.h>
19#include <linux/io.h>
20#include <linux/init.h>
21#include <linux/gpio.h>
66211f98 22#include <linux/leds.h>
e1a3c74f 23#include <linux/delay.h>
fb7f60f3 24#include <linux/mmc/host.h>
e1a3c74f 25#include <linux/regulator/machine.h>
ae24c263 26#include <linux/regulator/fixed.h>
e1a3c74f
MB		 27#include <linux/pwm_backlight.h>
28#include <linux/dm9000.h>
29#include <linux/gpio_keys.h>
30#include <linux/basic_mmio_gpio.h>
31#include <linux/spi/spi.h>
32
33#include <linux/i2c/pca953x.h>
126625e1 34#include <linux/platform_data/s3c-hsotg.h>
e1a3c74f
MB		 35
36#include <video/platform_lcd.h>
37
38#include <linux/mfd/wm831x/core.h>
39#include <linux/mfd/wm831x/pdata.h>
ae24c263 40#include <linux/mfd/wm831x/irq.h>
e1a3c74f
MB		 41#include <linux/mfd/wm831x/gpio.h>
42
8504a3cb
MB		 43#include <sound/wm1250-ev1.h>
44
774b51f8 45#include <asm/hardware/vic.h>
e1a3c74f
MB		 46#include <asm/mach/arch.h>
47#include <asm/mach-types.h>
48
5a213a55 49#include <video/samsung_fimd.h>
e1a3c74f
MB		 50#include <mach/hardware.h>
51#include <mach/map.h>
52
e1a3c74f
MB		 53#include <mach/regs-sys.h>
54#include <mach/regs-gpio.h>
55#include <mach/regs-modem.h>
d0f0b43f 56#include <mach/crag6410.h>
e1a3c74f 57
e1a3c74f
MB		 58#include <mach/regs-gpio-memport.h>
59
60#include <plat/regs-serial.h>
e1a3c74f
MB		 61#include <plat/fb.h>
62#include <plat/sdhci.h>
63#include <plat/gpio-cfg.h>
436d42c6 64#include <linux/platform_data/spi-s3c64xx.h>
e1a3c74f
MB		 65
66#include <plat/keypad.h>
67#include <plat/clock.h>
68#include <plat/devs.h>
69#include <plat/cpu.h>
70#include <plat/adc.h>
436d42c6 71#include <linux/platform_data/i2c-s3c2410.h>
e1a3c74f
MB		 72#include <plat/pm.h>
73
b024043b
KK		 74#include "common.h"
75
e1a3c74f
MB		 76/* serial port setup */
77
78#define UCON (S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK)
79#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB)
80#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
81
82static struct s3c2410_uartcfg crag6410_uartcfgs[] __initdata = {
83 [0] = {
ae24c263
MB		 84 .hwport = 0,
85 .flags = 0,
86 .ucon = UCON,
87 .ulcon = ULCON,
88 .ufcon = UFCON,
e1a3c74f
MB		 89 },
90 [1] = {
ae24c263
MB		 91 .hwport = 1,
92 .flags = 0,
93 .ucon = UCON,
94 .ulcon = ULCON,
95 .ufcon = UFCON,
e1a3c74f
MB		 96 },
97 [2] = {
ae24c263
MB		 98 .hwport = 2,
99 .flags = 0,
100 .ucon = UCON,
101 .ulcon = ULCON,
102 .ufcon = UFCON,
e1a3c74f
MB		 103 },
104 [3] = {
ae24c263
MB		 105 .hwport = 3,
106 .flags = 0,
107 .ucon = UCON,
108 .ulcon = ULCON,
109 .ufcon = UFCON,
e1a3c74f
MB		 110 },
111};
112
113static struct platform_pwm_backlight_data crag6410_backlight_data = {
114 .pwm_id = 0,
115 .max_brightness = 1000,
116 .dft_brightness = 600,
117 .pwm_period_ns = 100000, /* about 1kHz */
118};
119
120static struct platform_device crag6410_backlight_device = {
121 .name = "pwm-backlight",
122 .id = -1,
123 .dev = {
124 .parent = &s3c_device_timer[0].dev,
125 .platform_data = &crag6410_backlight_data,
126 },
127};
128
129static void crag6410_lcd_power_set(struct plat_lcd_data *pd, unsigned int power)
130{
131 pr_debug("%s: setting power %d\n", __func__, power);
132
133 if (power) {
134 gpio_set_value(S3C64XX_GPB(0), 1);
135 msleep(1);
136 s3c_gpio_cfgpin(S3C64XX_GPF(14), S3C_GPIO_SFN(2));
137 } else {
138 gpio_direction_output(S3C64XX_GPF(14), 0);
139 gpio_set_value(S3C64XX_GPB(0), 0);
140 }
141}
142
143static struct platform_device crag6410_lcd_powerdev = {
144 .name = "platform-lcd",
145 .id = -1,
146 .dev.parent = &s3c_device_fb.dev,
147 .dev.platform_data = &(struct plat_lcd_data) {
148 .set_power = crag6410_lcd_power_set,
149 },
150};
151
152/* 640x480 URT */
153static struct s3c_fb_pd_win crag6410_fb_win0 = {
e1a3c74f
MB		 154 .max_bpp = 32,
155 .default_bpp = 16,
79d3c41a
TA		 156 .xres = 640,
157 .yres = 480,
e1a3c74f
MB		 158 .virtual_y = 480 * 2,
159 .virtual_x = 640,
160};
161
79d3c41a
TA		 162static struct fb_videomode crag6410_lcd_timing = {
163 .left_margin = 150,
164 .right_margin = 80,
165 .upper_margin = 40,
166 .lower_margin = 5,
167 .hsync_len = 40,
168 .vsync_len = 5,
169 .xres = 640,
170 .yres = 480,
171};
172
e1a3c74f 173/* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */
70660e5d 174static struct s3c_fb_platdata crag6410_lcd_pdata __devinitdata = {
e1a3c74f 175 .setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
79d3c41a 176 .vtiming = &crag6410_lcd_timing,
e1a3c74f
MB		 177 .win[0] = &crag6410_fb_win0,
178 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
179 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
180};
181
182/* 2x6 keypad */
183
70660e5d 184static uint32_t crag6410_keymap[] __devinitdata = {
e1a3c74f
MB		 185 /* KEY(row, col, keycode) */
186 KEY(0, 0, KEY_VOLUMEUP),
187 KEY(0, 1, KEY_HOME),
188 KEY(0, 2, KEY_VOLUMEDOWN),
189 KEY(0, 3, KEY_HELP),
190 KEY(0, 4, KEY_MENU),
191 KEY(0, 5, KEY_MEDIA),
192 KEY(1, 0, 232),
193 KEY(1, 1, KEY_DOWN),
194 KEY(1, 2, KEY_LEFT),
195 KEY(1, 3, KEY_UP),
196 KEY(1, 4, KEY_RIGHT),
197 KEY(1, 5, KEY_CAMERA),
198};
199
70660e5d 200static struct matrix_keymap_data crag6410_keymap_data __devinitdata = {
e1a3c74f
MB		 201 .keymap = crag6410_keymap,
202 .keymap_size = ARRAY_SIZE(crag6410_keymap),
203};
204
70660e5d 205static struct samsung_keypad_platdata crag6410_keypad_data __devinitdata = {
e1a3c74f
MB		 206 .keymap_data = &crag6410_keymap_data,
207 .rows = 2,
208 .cols = 6,
209};
210
211static struct gpio_keys_button crag6410_gpio_keys[] = {
212 [0] = {
213 .code = KEY_SUSPEND,
214 .gpio = S3C64XX_GPL(10), /* EINT 18 */
ae24c263 215 .type = EV_KEY,
e1a3c74f
MB		 216 .wakeup = 1,
217 .active_low = 1,
218 },
ae24c263
MB		 219 [1] = {
220 .code = SW_FRONT_PROXIMITY,
221 .gpio = S3C64XX_GPN(11), /* EINT 11 */
222 .type = EV_SW,
223 },
e1a3c74f
MB		 224};
225
226static struct gpio_keys_platform_data crag6410_gpio_keydata = {
227 .buttons = crag6410_gpio_keys,
228 .nbuttons = ARRAY_SIZE(crag6410_gpio_keys),
229};
230
231static struct platform_device crag6410_gpio_keydev = {
232 .name = "gpio-keys",
233 .id = 0,
234 .dev.platform_data = &crag6410_gpio_keydata,
235};
236
237static struct resource crag6410_dm9k_resource[] = {
8ebf148a
TB		 238 [0] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN5, 2),
239 [1] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN5 + (1 << 8), 2),
240 [2] = DEFINE_RES_NAMED(S3C_EINT(17), 1, NULL, IORESOURCE_IRQ \
241 | IORESOURCE_IRQ_HIGHLEVEL),
e1a3c74f
MB		 242};
243
244static struct dm9000_plat_data mini6410_dm9k_pdata = {
245 .flags = DM9000_PLATF_16BITONLY,
246};
247
248static struct platform_device crag6410_dm9k_device = {
249 .name = "dm9000",
250 .id = -1,
251 .num_resources = ARRAY_SIZE(crag6410_dm9k_resource),
252 .resource = crag6410_dm9k_resource,
253 .dev.platform_data = &mini6410_dm9k_pdata,
254};
255
256static struct resource crag6410_mmgpio_resource[] = {
8ebf148a 257 [0] = DEFINE_RES_MEM_NAMED(S3C64XX_PA_XM0CSN4, 1, "dat"),
e1a3c74f
MB		 258};
259
260static struct platform_device crag6410_mmgpio = {
261 .name = "basic-mmio-gpio",
262 .id = -1,
263 .resource = crag6410_mmgpio_resource,
264 .num_resources = ARRAY_SIZE(crag6410_mmgpio_resource),
265 .dev.platform_data = &(struct bgpio_pdata) {
91b60b1d 266 .base = MMGPIO_GPIO_BASE,
e1a3c74f
MB		 267 },
268};
269
ae24c263
MB		 270static struct platform_device speyside_device = {
271 .name = "speyside",
272 .id = -1,
273};
274
8c051ab4
MB		 275static struct platform_device lowland_device = {
276 .name = "lowland",
277 .id = -1,
278};
279
6414261f
MB		 280static struct platform_device tobermory_device = {
281 .name = "tobermory",
ae24c263
MB		 282 .id = -1,
283};
284
c5c32c96
MB		 285static struct platform_device littlemill_device = {
286 .name = "littlemill",
287 .id = -1,
288};
289
25752b78
MB		 290static struct platform_device bells_wm5102_device = {
291 .name = "bells",
292 .id = 0,
293};
294
295static struct platform_device bells_wm5110_device = {
296 .name = "bells",
297 .id = 1,
298};
299
ae24c263 300static struct regulator_consumer_supply wallvdd_consumers[] = {
554f01fb 301 REGULATOR_SUPPLY("SPKVDD", "1-001a"),
ae24c263
MB		 302 REGULATOR_SUPPLY("SPKVDD1", "1-001a"),
303 REGULATOR_SUPPLY("SPKVDD2", "1-001a"),
4ed12b50
MB		 304 REGULATOR_SUPPLY("SPKVDDL", "1-001a"),
305 REGULATOR_SUPPLY("SPKVDDR", "1-001a"),
402f624b
MB		 306
307 REGULATOR_SUPPLY("DC1VDD", "0-0034"),
308 REGULATOR_SUPPLY("DC2VDD", "0-0034"),
309 REGULATOR_SUPPLY("DC3VDD", "0-0034"),
310 REGULATOR_SUPPLY("LDO1VDD", "0-0034"),
311 REGULATOR_SUPPLY("LDO2VDD", "0-0034"),
312 REGULATOR_SUPPLY("LDO4VDD", "0-0034"),
313 REGULATOR_SUPPLY("LDO5VDD", "0-0034"),
314 REGULATOR_SUPPLY("LDO6VDD", "0-0034"),
315 REGULATOR_SUPPLY("LDO7VDD", "0-0034"),
316 REGULATOR_SUPPLY("LDO8VDD", "0-0034"),
317 REGULATOR_SUPPLY("LDO9VDD", "0-0034"),
318 REGULATOR_SUPPLY("LDO10VDD", "0-0034"),
319 REGULATOR_SUPPLY("LDO11VDD", "0-0034"),
320
321 REGULATOR_SUPPLY("DC1VDD", "1-0034"),
322 REGULATOR_SUPPLY("DC2VDD", "1-0034"),
323 REGULATOR_SUPPLY("DC3VDD", "1-0034"),
ae24c263
MB		 324};
325
326static struct regulator_init_data wallvdd_data = {
327 .constraints = {
328 .always_on = 1,
329 },
330 .num_consumer_supplies = ARRAY_SIZE(wallvdd_consumers),
331 .consumer_supplies = wallvdd_consumers,
332};
333
334static struct fixed_voltage_config wallvdd_pdata = {
335 .supply_name = "WALLVDD",
336 .microvolts = 5000000,
337 .init_data = &wallvdd_data,
338 .gpio = -EINVAL,
339};
340
341static struct platform_device wallvdd_device = {
342 .name = "reg-fixed-voltage",
343 .id = -1,
344 .dev = {
345 .platform_data = &wallvdd_pdata,
346 },
347};
348
e1a3c74f
MB		 349static struct platform_device *crag6410_devices[] __initdata = {
350 &s3c_device_hsmmc0,
e1a3c74f
MB		 351 &s3c_device_hsmmc2,
352 &s3c_device_i2c0,
353 &s3c_device_i2c1,
354 &s3c_device_fb,
355 &s3c_device_ohci,
356 &s3c_device_usb_hsotg,
e1a3c74f
MB		 357 &s3c_device_timer[0],
358 &s3c64xx_device_iis0,
359 &s3c64xx_device_iis1,
e1a3c74f
MB		 360 &samsung_device_keypad,
361 &crag6410_gpio_keydev,
362 &crag6410_dm9k_device,
363 &s3c64xx_device_spi0,
364 &crag6410_mmgpio,
365 &crag6410_lcd_powerdev,
366 &crag6410_backlight_device,
ae24c263 367 &speyside_device,
6414261f 368 &tobermory_device,
c5c32c96 369 &littlemill_device,
8c051ab4 370 &lowland_device,
25752b78
MB		 371 &bells_wm5102_device,
372 &bells_wm5110_device,
ae24c263 373 &wallvdd_device,
e1a3c74f
MB		 374};
375
376static struct pca953x_platform_data crag6410_pca_data = {
377 .gpio_base = PCA935X_GPIO_BASE,
6e11e0bd 378 .irq_base = -1,
e1a3c74f
MB		 379};
380
986afc98
MB		 381/* VDDARM is controlled by DVS1 connected to GPK(0) */
382static struct wm831x_buckv_pdata vddarm_pdata = {
383 .dvs_control_src = 1,
384 .dvs_gpio = S3C64XX_GPK(0),
385};
386
70660e5d 387static struct regulator_consumer_supply vddarm_consumers[] __devinitdata = {
e1a3c74f
MB		 388 REGULATOR_SUPPLY("vddarm", NULL),
389};
390
70660e5d 391static struct regulator_init_data vddarm __devinitdata = {
e1a3c74f
MB		 392 .constraints = {
393 .name = "VDDARM",
394 .min_uV = 1000000,
395 .max_uV = 1300000,
396 .always_on = 1,
397 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
398 },
399 .num_consumer_supplies = ARRAY_SIZE(vddarm_consumers),
400 .consumer_supplies = vddarm_consumers,
35127296 401 .supply_regulator = "WALLVDD",
986afc98 402 .driver_data = &vddarm_pdata,
e1a3c74f
MB		 403};
404
70660e5d 405static struct regulator_consumer_supply vddint_consumers[] __devinitdata = {
39cb263e
MB		 406 REGULATOR_SUPPLY("vddint", NULL),
407};
408
70660e5d 409static struct regulator_init_data vddint __devinitdata = {
e1a3c74f
MB		 410 .constraints = {
411 .name = "VDDINT",
412 .min_uV = 1000000,
413 .max_uV = 1200000,
414 .always_on = 1,
415 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
416 },
39cb263e
MB		 417 .num_consumer_supplies = ARRAY_SIZE(vddint_consumers),
418 .consumer_supplies = vddint_consumers,
419 .supply_regulator = "WALLVDD",
e1a3c74f
MB		 420};
421
70660e5d 422static struct regulator_init_data vddmem __devinitdata = {
e1a3c74f
MB		 423 .constraints = {
424 .name = "VDDMEM",
425 .always_on = 1,
426 },
427};
428
70660e5d 429static struct regulator_init_data vddsys __devinitdata = {
e1a3c74f
MB		 430 .constraints = {
431 .name = "VDDSYS,VDDEXT,VDDPCM,VDDSS",
432 .always_on = 1,
433 },
434};
435
70660e5d 436static struct regulator_consumer_supply vddmmc_consumers[] __devinitdata = {
e1a3c74f
MB		 437 REGULATOR_SUPPLY("vmmc", "s3c-sdhci.0"),
438 REGULATOR_SUPPLY("vmmc", "s3c-sdhci.1"),
439 REGULATOR_SUPPLY("vmmc", "s3c-sdhci.2"),
440};
441
70660e5d 442static struct regulator_init_data vddmmc __devinitdata = {
e1a3c74f
MB		 443 .constraints = {
444 .name = "VDDMMC,UH",
445 .always_on = 1,
446 },
447 .num_consumer_supplies = ARRAY_SIZE(vddmmc_consumers),
448 .consumer_supplies = vddmmc_consumers,
35127296 449 .supply_regulator = "WALLVDD",
e1a3c74f
MB		 450};
451
70660e5d 452static struct regulator_init_data vddotgi __devinitdata = {
e1a3c74f
MB		 453 .constraints = {
454 .name = "VDDOTGi",
455 .always_on = 1,
456 },
35127296 457 .supply_regulator = "WALLVDD",
e1a3c74f
MB		 458};
459
70660e5d 460static struct regulator_init_data vddotg __devinitdata = {
e1a3c74f
MB		 461 .constraints = {
462 .name = "VDDOTG",
463 .always_on = 1,
464 },
35127296 465 .supply_regulator = "WALLVDD",
e1a3c74f
MB		 466};
467
70660e5d 468static struct regulator_init_data vddhi __devinitdata = {
e1a3c74f
MB		 469 .constraints = {
470 .name = "VDDHI",
471 .always_on = 1,
472 },
35127296 473 .supply_regulator = "WALLVDD",
e1a3c74f
MB		 474};
475
70660e5d 476static struct regulator_init_data vddadc __devinitdata = {
e1a3c74f
MB		 477 .constraints = {
478 .name = "VDDADC,VDDDAC",
479 .always_on = 1,
480 },
35127296 481 .supply_regulator = "WALLVDD",
e1a3c74f
MB		 482};
483
70660e5d 484static struct regulator_init_data vddmem0 __devinitdata = {
e1a3c74f
MB		 485 .constraints = {
486 .name = "VDDMEM0",
487 .always_on = 1,
488 },
35127296 489 .supply_regulator = "WALLVDD",
e1a3c74f
MB		 490};
491
70660e5d 492static struct regulator_init_data vddpll __devinitdata = {
e1a3c74f
MB		 493 .constraints = {
494 .name = "VDDPLL",
495 .always_on = 1,
496 },
35127296 497 .supply_regulator = "WALLVDD",
e1a3c74f
MB		 498};
499
70660e5d 500static struct regulator_init_data vddlcd __devinitdata = {
e1a3c74f
MB		 501 .constraints = {
502 .name = "VDDLCD",
503 .always_on = 1,
504 },
35127296 505 .supply_regulator = "WALLVDD",
e1a3c74f
MB		 506};
507
70660e5d 508static struct regulator_init_data vddalive __devinitdata = {
e1a3c74f
MB		 509 .constraints = {
510 .name = "VDDALIVE",
511 .always_on = 1,
512 },
35127296 513 .supply_regulator = "WALLVDD",
e1a3c74f
MB		 514};
515
70660e5d 516static struct wm831x_backup_pdata banff_backup_pdata __devinitdata = {
89e1c3d0
MB		 517 .charger_enable = 1,
518 .vlim = 2500, /* mV */
519 .ilim = 200, /* uA */
520};
521
70660e5d 522static struct wm831x_status_pdata banff_red_led __devinitdata = {
e1a3c74f
MB		 523 .name = "banff:red:",
524 .default_src = WM831X_STATUS_MANUAL,
525};
526
70660e5d 527static struct wm831x_status_pdata banff_green_led __devinitdata = {
e1a3c74f
MB		 528 .name = "banff:green:",
529 .default_src = WM831X_STATUS_MANUAL,
530};
531
70660e5d 532static struct wm831x_touch_pdata touch_pdata __devinitdata = {
e1a3c74f 533 .data_irq = S3C_EINT(26),
ae24c263 534 .pd_irq = S3C_EINT(27),
e1a3c74f
MB		 535};
536
70660e5d 537static struct wm831x_pdata crag_pmic_pdata __devinitdata = {
ae24c263 538 .wm831x_num = 1,
aaed44e1 539 .gpio_base = BANFF_PMIC_GPIO_BASE,
dcf3580a 540 .soft_shutdown = true,
e1a3c74f 541
89e1c3d0
MB		 542 .backup = &banff_backup_pdata,
543
ae24c263 544 .gpio_defaults = {
986afc98
MB		 545 /* GPIO5: DVS1_REQ - CMOS, DBVDD, active high */
546 [4] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA | 0x8,
ae24c263
MB		 547 /* GPIO11: Touchscreen data - CMOS, DBVDD, active high*/
548 [10] = WM831X_GPN_POL | WM831X_GPN_ENA | 0x6,
549 /* GPIO12: Touchscreen pen down - CMOS, DBVDD, active high*/
550 [11] = WM831X_GPN_POL | WM831X_GPN_ENA | 0x7,
551 },
552
e1a3c74f
MB		 553 .dcdc = {
554 &vddarm, /* DCDC1 */
555 &vddint, /* DCDC2 */
556 &vddmem, /* DCDC3 */
557 },
558
559 .ldo = {
560 &vddsys, /* LDO1 */
561 &vddmmc, /* LDO2 */
562 NULL, /* LDO3 */
563 &vddotgi, /* LDO4 */
564 &vddotg, /* LDO5 */
565 &vddhi, /* LDO6 */
566 &vddadc, /* LDO7 */
567 &vddmem0, /* LDO8 */
568 &vddpll, /* LDO9 */
569 &vddlcd, /* LDO10 */
570 &vddalive, /* LDO11 */
571 },
572
573 .status = {
574 &banff_green_led,
575 &banff_red_led,
576 },
577
578 .touch = &touch_pdata,
579};
580
70660e5d 581static struct i2c_board_info i2c_devs0[] __devinitdata = {
e1a3c74f
MB		 582 { I2C_BOARD_INFO("24c08", 0x50), },
583 { I2C_BOARD_INFO("tca6408", 0x20),
584 .platform_data = &crag6410_pca_data,
585 },
586 { I2C_BOARD_INFO("wm8312", 0x34),
587 .platform_data = &crag_pmic_pdata,
588 .irq = S3C_EINT(23),
589 },
590};
591
592static struct s3c2410_platform_i2c i2c0_pdata = {
593 .frequency = 400000,
594};
595
70660e5d 596static struct regulator_consumer_supply pvdd_1v2_consumers[] __devinitdata = {
cda2349a
MB		 597 REGULATOR_SUPPLY("DCVDD", "spi0.0"),
598 REGULATOR_SUPPLY("AVDD", "spi0.0"),
599};
600
70660e5d 601static struct regulator_init_data pvdd_1v2 __devinitdata = {
ae24c263
MB		 602 .constraints = {
603 .name = "PVDD_1V2",
cda2349a 604 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
ae24c263 605 },
cda2349a
MB		 606
607 .consumer_supplies = pvdd_1v2_consumers,
608 .num_consumer_supplies = ARRAY_SIZE(pvdd_1v2_consumers),
ae24c263
MB		 609};
610
70660e5d 611static struct regulator_consumer_supply pvdd_1v8_consumers[] __devinitdata = {
d5160ecf 612 REGULATOR_SUPPLY("LDOVDD", "1-001a"),
ae24c263
MB		 613 REGULATOR_SUPPLY("PLLVDD", "1-001a"),
614 REGULATOR_SUPPLY("DBVDD", "1-001a"),
4ed12b50
MB		 615 REGULATOR_SUPPLY("DBVDD1", "1-001a"),
616 REGULATOR_SUPPLY("DBVDD2", "1-001a"),
617 REGULATOR_SUPPLY("DBVDD3", "1-001a"),
ae24c263
MB		 618 REGULATOR_SUPPLY("CPVDD", "1-001a"),
619 REGULATOR_SUPPLY("AVDD2", "1-001a"),
620 REGULATOR_SUPPLY("DCVDD", "1-001a"),
621 REGULATOR_SUPPLY("AVDD", "1-001a"),
cda2349a 622 REGULATOR_SUPPLY("DBVDD", "spi0.0"),
ae24c263
MB		 623};
624
70660e5d 625static struct regulator_init_data pvdd_1v8 __devinitdata = {
ae24c263
MB		 626 .constraints = {
627 .name = "PVDD_1V8",
628 .always_on = 1,
629 },
630
631 .consumer_supplies = pvdd_1v8_consumers,
632 .num_consumer_supplies = ARRAY_SIZE(pvdd_1v8_consumers),
633};
634
70660e5d 635static struct regulator_consumer_supply pvdd_3v3_consumers[] __devinitdata = {
ae24c263
MB		 636 REGULATOR_SUPPLY("MICVDD", "1-001a"),
637 REGULATOR_SUPPLY("AVDD1", "1-001a"),
638};
639
70660e5d 640static struct regulator_init_data pvdd_3v3 __devinitdata = {
ae24c263
MB		 641 .constraints = {
642 .name = "PVDD_3V3",
643 .always_on = 1,
644 },
645
646 .consumer_supplies = pvdd_3v3_consumers,
647 .num_consumer_supplies = ARRAY_SIZE(pvdd_3v3_consumers),
648};
649
70660e5d 650static struct wm831x_pdata glenfarclas_pmic_pdata __devinitdata = {
ae24c263
MB		 651 .wm831x_num = 2,
652 .irq_base = GLENFARCLAS_PMIC_IRQ_BASE,
653 .gpio_base = GLENFARCLAS_PMIC_GPIO_BASE,
dcf3580a 654 .soft_shutdown = true,
ae24c263
MB		 655
656 .gpio_defaults = {
657 /* GPIO1-3: IRQ inputs, rising edge triggered, CMOS */
658 [0] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
659 [1] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
660 [2] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
661 },
662
663 .dcdc = {
664 &pvdd_1v2, /* DCDC1 */
665 &pvdd_1v8, /* DCDC2 */
666 &pvdd_3v3, /* DCDC3 */
667 },
668
669 .disable_touch = true,
670};
671
8504a3cb
MB		 672static struct wm1250_ev1_pdata wm1250_ev1_pdata = {
673 .gpios = {
674 [WM1250_EV1_GPIO_CLK_ENA] = S3C64XX_GPN(12),
675 [WM1250_EV1_GPIO_CLK_SEL0] = S3C64XX_GPL(12),
676 [WM1250_EV1_GPIO_CLK_SEL1] = S3C64XX_GPL(13),
677 [WM1250_EV1_GPIO_OSR] = S3C64XX_GPL(14),
678 [WM1250_EV1_GPIO_MASTER] = S3C64XX_GPL(8),
679 },
680};
681
70660e5d 682static struct i2c_board_info i2c_devs1[] __devinitdata = {
e1a3c74f 683 { I2C_BOARD_INFO("wm8311", 0x34),
ae24c263
MB		 684 .irq = S3C_EINT(0),
685 .platform_data = &glenfarclas_pmic_pdata },
686
ea070cd2 687 { I2C_BOARD_INFO("wlf-gf-module", 0x22) },
d0f0b43f
MB		 688 { I2C_BOARD_INFO("wlf-gf-module", 0x24) },
689 { I2C_BOARD_INFO("wlf-gf-module", 0x25) },
690 { I2C_BOARD_INFO("wlf-gf-module", 0x26) },
691
8504a3cb
MB		 692 { I2C_BOARD_INFO("wm1250-ev1", 0x27),
693 .platform_data = &wm1250_ev1_pdata },
e1a3c74f
MB		 694};
695
8351c7aa
MB		 696static struct s3c2410_platform_i2c i2c1_pdata = {
697 .frequency = 400000,
698 .bus_num = 1,
e1a3c74f
MB		 699};
700
701static void __init crag6410_map_io(void)
702{
703 s3c64xx_init_io(NULL, 0);
704 s3c24xx_init_clocks(12000000);
705 s3c24xx_init_uarts(crag6410_uartcfgs, ARRAY_SIZE(crag6410_uartcfgs));
706
707 /* LCD type and Bypass set by bootloader */
708}
709
710static struct s3c_sdhci_platdata crag6410_hsmmc2_pdata = {
711 .max_width = 4,
712 .cd_type = S3C_SDHCI_CD_PERMANENT,
a9294cdc 713 .host_caps = MMC_CAP_POWER_OFF_CARD,
e1a3c74f
MB		 714};
715
e1a3c74f
MB		 716static void crag6410_cfg_sdhci0(struct platform_device *dev, int width)
717{
718 /* Set all the necessary GPG pins to special-function 2 */
719 s3c_gpio_cfgrange_nopull(S3C64XX_GPG(0), 2 + width, S3C_GPIO_SFN(2));
720
721 /* force card-detected for prototype 0 */
722 s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_DOWN);
723}
724
725static struct s3c_sdhci_platdata crag6410_hsmmc0_pdata = {
726 .max_width = 4,
727 .cd_type = S3C_SDHCI_CD_INTERNAL,
728 .cfg_gpio = crag6410_cfg_sdhci0,
fb7f60f3 729 .host_caps = MMC_CAP_POWER_OFF_CARD,
e1a3c74f
MB		 730};
731
66211f98
MB		 732static const struct gpio_led gpio_leds[] = {
733 {
734 .name = "d13:green:",
735 .gpio = MMGPIO_GPIO_BASE + 0,
736 .default_state = LEDS_GPIO_DEFSTATE_ON,
737 },
738 {
739 .name = "d14:green:",
740 .gpio = MMGPIO_GPIO_BASE + 1,
741 .default_state = LEDS_GPIO_DEFSTATE_ON,
742 },
743 {
744 .name = "d15:green:",
745 .gpio = MMGPIO_GPIO_BASE + 2,
746 .default_state = LEDS_GPIO_DEFSTATE_ON,
747 },
748 {
749 .name = "d16:green:",
750 .gpio = MMGPIO_GPIO_BASE + 3,
751 .default_state = LEDS_GPIO_DEFSTATE_ON,
752 },
753 {
754 .name = "d17:green:",
755 .gpio = MMGPIO_GPIO_BASE + 4,
756 .default_state = LEDS_GPIO_DEFSTATE_ON,
757 },
758 {
759 .name = "d18:green:",
760 .gpio = MMGPIO_GPIO_BASE + 5,
761 .default_state = LEDS_GPIO_DEFSTATE_ON,
762 },
763 {
764 .name = "d19:green:",
765 .gpio = MMGPIO_GPIO_BASE + 6,
766 .default_state = LEDS_GPIO_DEFSTATE_ON,
767 },
768 {
769 .name = "d20:green:",
770 .gpio = MMGPIO_GPIO_BASE + 7,
771 .default_state = LEDS_GPIO_DEFSTATE_ON,
772 },
773};
774
775static const struct gpio_led_platform_data gpio_leds_pdata = {
776 .leds = gpio_leds,
777 .num_leds = ARRAY_SIZE(gpio_leds),
e1a3c74f
MB		 778};
779
99f6e1f5
JS		 780static struct s3c_hsotg_plat crag6410_hsotg_pdata;
781
e1a3c74f
MB		 782static void __init crag6410_machine_init(void)
783{
784 /* Open drain IRQs need pullups */
785 s3c_gpio_setpull(S3C64XX_GPM(0), S3C_GPIO_PULL_UP);
786 s3c_gpio_setpull(S3C64XX_GPN(0), S3C_GPIO_PULL_UP);
787
788 gpio_request(S3C64XX_GPB(0), "LCD power");
789 gpio_direction_output(S3C64XX_GPB(0), 0);
790
791 gpio_request(S3C64XX_GPF(14), "LCD PWM");
792 gpio_direction_output(S3C64XX_GPF(14), 0); /* turn off */
793
794 gpio_request(S3C64XX_GPB(1), "SD power");
795 gpio_direction_output(S3C64XX_GPB(1), 0);
796
797 gpio_request(S3C64XX_GPF(10), "nRESETSEL");
798 gpio_direction_output(S3C64XX_GPF(10), 1);
799
800 s3c_sdhci0_set_platdata(&crag6410_hsmmc0_pdata);
e1a3c74f
MB		 801 s3c_sdhci2_set_platdata(&crag6410_hsmmc2_pdata);
802
803 s3c_i2c0_set_platdata(&i2c0_pdata);
8351c7aa 804 s3c_i2c1_set_platdata(&i2c1_pdata);
e1a3c74f 805 s3c_fb_set_platdata(&crag6410_lcd_pdata);
99f6e1f5 806 s3c_hsotg_set_platdata(&crag6410_hsotg_pdata);
e1a3c74f
MB		 807
808 i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
809 i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
810
811 samsung_keypad_set_platdata(&crag6410_keypad_data);
4d0efdd5 812 s3c64xx_spi0_set_platdata(NULL, 0, 1);
e1a3c74f
MB		 813
814 platform_add_devices(crag6410_devices, ARRAY_SIZE(crag6410_devices));
815
66211f98
MB		 816 gpio_led_register_device(-1, &gpio_leds_pdata);
817
ae24c263
MB		 818 regulator_has_full_constraints();
819
c656c306 820 s3c64xx_pm_init();
e1a3c74f
MB		 821}
822
823MACHINE_START(WLF_CRAGG_6410, "Wolfson Cragganmore 6410")
824 /* Maintainer: Mark Brown <broonie@opensource.wolfsonmicro.com> */
170a5908 825 .atag_offset = 0x100,
e1a3c74f 826 .init_irq = s3c6410_init_irq,
774b51f8 827 .handle_irq = vic_handle_irq,
e1a3c74f
MB		 828 .map_io = crag6410_map_io,
829 .init_machine = crag6410_machine_init,
cc8f252b 830 .init_late = s3c64xx_init_late,
e1a3c74f 831 .timer = &s3c24xx_timer,
ff84ded2 832 .restart = s3c64xx_restart,
e1a3c74f 833MACHINE_END
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