[mirror_ubuntu-zesty-kernel.git] / arch / arm / mach-s3c64xx / mach-crag6410.c

/* linux/arch/arm/mach-s3c64xx/mach-crag6410.c
 *
 * Copyright 2011 Wolfson Microelectronics plc
 *	Mark Brown <broonie@opensource.wolfsonmicro.com>
 *
 * Copyright 2011 Simtec Electronics
 *	Ben Dooks <ben@simtec.co.uk>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <linux/kernel.h>
#include <linux/list.h>
#include <linux/serial_core.h>
#include <linux/platform_device.h>
#include <linux/fb.h>
#include <linux/io.h>
#include <linux/init.h>
#include <linux/gpio.h>
#include <linux/delay.h>
#include <linux/regulator/machine.h>
#include <linux/regulator/fixed.h>
#include <linux/pwm_backlight.h>
#include <linux/dm9000.h>
#include <linux/gpio_keys.h>
#include <linux/basic_mmio_gpio.h>
#include <linux/spi/spi.h>

#include <linux/i2c/pca953x.h>

#include <video/platform_lcd.h>

#include <linux/mfd/wm831x/core.h>
#include <linux/mfd/wm831x/pdata.h>
#include <linux/mfd/wm831x/irq.h>
#include <linux/mfd/wm831x/gpio.h>

#include <asm/mach/arch.h>
#include <asm/mach-types.h>

#include <mach/hardware.h>
#include <mach/map.h>

#include <mach/s3c6410.h>
#include <mach/regs-sys.h>
#include <mach/regs-gpio.h>
#include <mach/regs-modem.h>
#include <mach/crag6410.h>

#include <mach/regs-gpio-memport.h>

#include <plat/regs-serial.h>
#include <plat/regs-fb-v4.h>
#include <plat/fb.h>
#include <plat/sdhci.h>
#include <plat/gpio-cfg.h>
#include <plat/s3c64xx-spi.h>

#include <plat/keypad.h>
#include <plat/clock.h>
#include <plat/devs.h>
#include <plat/cpu.h>
#include <plat/adc.h>
#include <plat/iic.h>
#include <plat/pm.h>

/* serial port setup */

#define UCON (S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK)
#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB)
#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)

static struct s3c2410_uartcfg crag6410_uartcfgs[] __initdata = {
	[0] = {
		.hwport		= 0,
		.flags		= 0,
		.ucon		= UCON,
		.ulcon		= ULCON,
		.ufcon		= UFCON,
	},
	[1] = {
		.hwport		= 1,
		.flags		= 0,
		.ucon		= UCON,
		.ulcon		= ULCON,
		.ufcon		= UFCON,
	},
	[2] = {
		.hwport		= 2,
		.flags		= 0,
		.ucon		= UCON,
		.ulcon		= ULCON,
		.ufcon		= UFCON,
	},
	[3] = {
		.hwport		= 3,
		.flags		= 0,
		.ucon		= UCON,
		.ulcon		= ULCON,
		.ufcon		= UFCON,
	},
};

static struct platform_pwm_backlight_data crag6410_backlight_data = {
	.pwm_id		= 0,
	.max_brightness	= 1000,
	.dft_brightness	= 600,
	.pwm_period_ns	= 100000,	/* about 1kHz */
};

static struct platform_device crag6410_backlight_device = {
	.name		= "pwm-backlight",
	.id		= -1,
	.dev		= {
		.parent	= &s3c_device_timer[0].dev,
		.platform_data = &crag6410_backlight_data,
	},
};

static void crag6410_lcd_power_set(struct plat_lcd_data *pd, unsigned int power)
{
	pr_debug("%s: setting power %d\n", __func__, power);

	if (power) {
		gpio_set_value(S3C64XX_GPB(0), 1);
		msleep(1);
		s3c_gpio_cfgpin(S3C64XX_GPF(14), S3C_GPIO_SFN(2));
	} else {
		gpio_direction_output(S3C64XX_GPF(14), 0);
		gpio_set_value(S3C64XX_GPB(0), 0);
	}
}

static struct platform_device crag6410_lcd_powerdev = {
	.name			= "platform-lcd",
	.id			= -1,
	.dev.parent		= &s3c_device_fb.dev,
	.dev.platform_data	= &(struct plat_lcd_data) {
		.set_power	= crag6410_lcd_power_set,
	},
};

/* 640x480 URT */
static struct s3c_fb_pd_win crag6410_fb_win0 = {
	/* this is to ensure we use win0 */
	.win_mode	= {
		.left_margin	= 150,
		.right_margin	= 80,
		.upper_margin	= 40,
		.lower_margin	= 5,
		.hsync_len	= 40,
		.vsync_len	= 5,
		.xres		= 640,
		.yres		= 480,
	},
	.max_bpp	= 32,
	.default_bpp	= 16,
	.virtual_y	= 480 * 2,
	.virtual_x	= 640,
};

/* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */
static struct s3c_fb_platdata crag6410_lcd_pdata __initdata = {
	.setup_gpio	= s3c64xx_fb_gpio_setup_24bpp,
	.win[0]		= &crag6410_fb_win0,
	.vidcon0	= VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
	.vidcon1	= VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
};

/* 2x6 keypad */

static uint32_t crag6410_keymap[] __initdata = {
	/* KEY(row, col, keycode) */
	KEY(0, 0, KEY_VOLUMEUP),
	KEY(0, 1, KEY_HOME),
	KEY(0, 2, KEY_VOLUMEDOWN),
	KEY(0, 3, KEY_HELP),
	KEY(0, 4, KEY_MENU),
	KEY(0, 5, KEY_MEDIA),
	KEY(1, 0, 232),
	KEY(1, 1, KEY_DOWN),
	KEY(1, 2, KEY_LEFT),
	KEY(1, 3, KEY_UP),
	KEY(1, 4, KEY_RIGHT),
	KEY(1, 5, KEY_CAMERA),
};

static struct matrix_keymap_data crag6410_keymap_data __initdata = {
	.keymap		= crag6410_keymap,
	.keymap_size	= ARRAY_SIZE(crag6410_keymap),
};

static struct samsung_keypad_platdata crag6410_keypad_data __initdata = {
	.keymap_data	= &crag6410_keymap_data,
	.rows		= 2,
	.cols		= 6,
};

static struct gpio_keys_button crag6410_gpio_keys[] = {
	[0] = {
		.code	= KEY_SUSPEND,
		.gpio	= S3C64XX_GPL(10),	/* EINT 18 */
		.type	= EV_KEY,
		.wakeup	= 1,
		.active_low = 1,
	},
	[1] = {
		.code	= SW_FRONT_PROXIMITY,
		.gpio	= S3C64XX_GPN(11),	/* EINT 11 */
		.type	= EV_SW,
	},
};

static struct gpio_keys_platform_data crag6410_gpio_keydata = {
	.buttons	= crag6410_gpio_keys,
	.nbuttons	= ARRAY_SIZE(crag6410_gpio_keys),
};

static struct platform_device crag6410_gpio_keydev = {
	.name		= "gpio-keys",
	.id		= 0,
	.dev.platform_data = &crag6410_gpio_keydata,
};

static struct resource crag6410_dm9k_resource[] = {
	[0] = {
		.start	= S3C64XX_PA_XM0CSN5,
		.end	= S3C64XX_PA_XM0CSN5 + 1,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= S3C64XX_PA_XM0CSN5 + (1 << 8),
		.end	= S3C64XX_PA_XM0CSN5 + (1 << 8) + 1,
		.flags	= IORESOURCE_MEM,
	},
	[2] = {
		.start	= S3C_EINT(17),
		.end	= S3C_EINT(17),
		.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
	},
};

static struct dm9000_plat_data mini6410_dm9k_pdata = {
	.flags	= DM9000_PLATF_16BITONLY,
};

static struct platform_device crag6410_dm9k_device = {
	.name		= "dm9000",
	.id		= -1,
	.num_resources	= ARRAY_SIZE(crag6410_dm9k_resource),
	.resource	= crag6410_dm9k_resource,
	.dev.platform_data = &mini6410_dm9k_pdata,
};

static struct resource crag6410_mmgpio_resource[] = {
	[0] = {
		.start	= S3C64XX_PA_XM0CSN4 + 1,
		.end	= S3C64XX_PA_XM0CSN4 + 1,
		.flags	= IORESOURCE_MEM,
	},
};

static struct platform_device crag6410_mmgpio = {
	.name		= "basic-mmio-gpio",
	.id		= -1,
	.resource	= crag6410_mmgpio_resource,
	.num_resources	= ARRAY_SIZE(crag6410_mmgpio_resource),
	.dev.platform_data = &(struct bgpio_pdata) {
		.base	= -1,
	},
};

static struct platform_device speyside_device = {
	.name		= "speyside",
	.id		= -1,
};

static struct platform_device lowland_device = {
	.name		= "lowland",
	.id		= -1,
};

static struct platform_device speyside_wm8962_device = {
	.name		= "speyside-wm8962",
	.id		= -1,
};

static struct regulator_consumer_supply wallvdd_consumers[] = {
	REGULATOR_SUPPLY("SPKVDD1", "1-001a"),
	REGULATOR_SUPPLY("SPKVDD2", "1-001a"),
	REGULATOR_SUPPLY("SPKVDDL", "1-001a"),
	REGULATOR_SUPPLY("SPKVDDR", "1-001a"),
};

static struct regulator_init_data wallvdd_data = {
	.constraints = {
		.always_on = 1,
	},
	.num_consumer_supplies = ARRAY_SIZE(wallvdd_consumers),
	.consumer_supplies = wallvdd_consumers,
};

static struct fixed_voltage_config wallvdd_pdata = {
	.supply_name = "WALLVDD",
	.microvolts = 5000000,
	.init_data = &wallvdd_data,
	.gpio = -EINVAL,
};

static struct platform_device wallvdd_device = {
	.name		= "reg-fixed-voltage",
	.id		= -1,
	.dev = {
		.platform_data = &wallvdd_pdata,
	},
};

static struct platform_device *crag6410_devices[] __initdata = {
	&s3c_device_hsmmc0,
	&s3c_device_hsmmc1,
	&s3c_device_hsmmc2,
	&s3c_device_i2c0,
	&s3c_device_i2c1,
	&s3c_device_fb,
	&s3c_device_ohci,
	&s3c_device_usb_hsotg,
	&s3c_device_adc,
	&s3c_device_rtc,
	&s3c_device_ts,
	&s3c_device_timer[0],
	&s3c64xx_device_iis0,
	&s3c64xx_device_iis1,
	&samsung_asoc_dma,
	&samsung_device_keypad,
	&crag6410_gpio_keydev,
	&crag6410_dm9k_device,
	&s3c64xx_device_spi0,
	&crag6410_mmgpio,
	&crag6410_lcd_powerdev,
	&crag6410_backlight_device,
	&speyside_device,
	&speyside_wm8962_device,
	&lowland_device,
	&wallvdd_device,
};

static struct pca953x_platform_data crag6410_pca_data = {
	.gpio_base	= PCA935X_GPIO_BASE,
	.irq_base	= 0,
};

/* VDDARM is controlled by DVS1 connected to GPK(0) */
static struct wm831x_buckv_pdata vddarm_pdata = {
	.dvs_control_src = 1,
	.dvs_gpio = S3C64XX_GPK(0),
};

static struct regulator_consumer_supply vddarm_consumers[] __initdata = {
	REGULATOR_SUPPLY("vddarm", NULL),
};

static struct regulator_init_data vddarm __initdata = {
	.constraints = {
		.name = "VDDARM",
		.min_uV = 1000000,
		.max_uV = 1300000,
		.always_on = 1,
		.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
	},
	.num_consumer_supplies = ARRAY_SIZE(vddarm_consumers),
	.consumer_supplies = vddarm_consumers,
	.supply_regulator = "WALLVDD",
	.driver_data = &vddarm_pdata,
};

static struct regulator_init_data vddint __initdata = {
	.constraints = {
		.name = "VDDINT",
		.min_uV = 1000000,
		.max_uV = 1200000,
		.always_on = 1,
		.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
	},
};

static struct regulator_init_data vddmem __initdata = {
	.constraints = {
		.name = "VDDMEM",
		.always_on = 1,
	},
};

static struct regulator_init_data vddsys __initdata = {
	.constraints = {
		.name = "VDDSYS,VDDEXT,VDDPCM,VDDSS",
		.always_on = 1,
	},
};

static struct regulator_consumer_supply vddmmc_consumers[] __initdata = {
	REGULATOR_SUPPLY("vmmc", "s3c-sdhci.0"),
	REGULATOR_SUPPLY("vmmc", "s3c-sdhci.1"),
	REGULATOR_SUPPLY("vmmc", "s3c-sdhci.2"),
};

static struct regulator_init_data vddmmc __initdata = {
	.constraints = {
		.name = "VDDMMC,UH",
		.always_on = 1,
	},
	.num_consumer_supplies = ARRAY_SIZE(vddmmc_consumers),
	.consumer_supplies = vddmmc_consumers,
	.supply_regulator = "WALLVDD",
};

static struct regulator_init_data vddotgi __initdata = {
	.constraints = {
		.name = "VDDOTGi",
		.always_on = 1,
	},
	.supply_regulator = "WALLVDD",
};

static struct regulator_init_data vddotg __initdata = {
	.constraints = {
		.name = "VDDOTG",
		.always_on = 1,
	},
	.supply_regulator = "WALLVDD",
};

static struct regulator_init_data vddhi __initdata = {
	.constraints = {
		.name = "VDDHI",
		.always_on = 1,
	},
	.supply_regulator = "WALLVDD",
};

static struct regulator_init_data vddadc __initdata = {
	.constraints = {
		.name = "VDDADC,VDDDAC",
		.always_on = 1,
	},
	.supply_regulator = "WALLVDD",
};

static struct regulator_init_data vddmem0 __initdata = {
	.constraints = {
		.name = "VDDMEM0",
		.always_on = 1,
	},
	.supply_regulator = "WALLVDD",
};

static struct regulator_init_data vddpll __initdata = {
	.constraints = {
		.name = "VDDPLL",
		.always_on = 1,
	},
	.supply_regulator = "WALLVDD",
};

static struct regulator_init_data vddlcd __initdata = {
	.constraints = {
		.name = "VDDLCD",
		.always_on = 1,
	},
	.supply_regulator = "WALLVDD",
};

static struct regulator_init_data vddalive __initdata = {
	.constraints = {
		.name = "VDDALIVE",
		.always_on = 1,
	},
	.supply_regulator = "WALLVDD",
};

static struct wm831x_backup_pdata banff_backup_pdata __initdata = {
	.charger_enable = 1,
	.vlim = 2500,  /* mV */
	.ilim = 200,   /* uA */
};

static struct wm831x_status_pdata banff_red_led __initdata = {
	.name = "banff:red:",
	.default_src = WM831X_STATUS_MANUAL,
};

static struct wm831x_status_pdata banff_green_led __initdata = {
	.name = "banff:green:",
	.default_src = WM831X_STATUS_MANUAL,
};

static struct wm831x_touch_pdata touch_pdata __initdata = {
	.data_irq = S3C_EINT(26),
	.pd_irq = S3C_EINT(27),
};

static struct wm831x_pdata crag_pmic_pdata __initdata = {
	.wm831x_num = 1,
	.irq_base = BANFF_PMIC_IRQ_BASE,
	.gpio_base = GPIO_BOARD_START + 8,

	.backup = &banff_backup_pdata,

	.gpio_defaults = {
		/* GPIO5: DVS1_REQ - CMOS, DBVDD, active high */
		[4] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA | 0x8,
		/* GPIO11: Touchscreen data - CMOS, DBVDD, active high*/
		[10] = WM831X_GPN_POL | WM831X_GPN_ENA | 0x6,
		/* GPIO12: Touchscreen pen down - CMOS, DBVDD, active high*/
		[11] = WM831X_GPN_POL | WM831X_GPN_ENA | 0x7,
	},

	.dcdc = {
		&vddarm,  /* DCDC1 */
		&vddint,  /* DCDC2 */
		&vddmem,  /* DCDC3 */
	},

	.ldo = {
		&vddsys,   /* LDO1 */
		&vddmmc,   /* LDO2 */
		NULL,      /* LDO3 */
		&vddotgi,  /* LDO4 */
		&vddotg,   /* LDO5 */
		&vddhi,    /* LDO6 */
		&vddadc,   /* LDO7 */
		&vddmem0,  /* LDO8 */
		&vddpll,   /* LDO9 */
		&vddlcd,   /* LDO10 */
		&vddalive, /* LDO11 */
	},

	.status = {
		&banff_green_led,
		&banff_red_led,
	},

	.touch = &touch_pdata,
};

static struct i2c_board_info i2c_devs0[] __initdata = {
	{ I2C_BOARD_INFO("24c08", 0x50), },
	{ I2C_BOARD_INFO("tca6408", 0x20),
	  .platform_data = &crag6410_pca_data,
	},
	{ I2C_BOARD_INFO("wm8312", 0x34),
	  .platform_data = &crag_pmic_pdata,
	  .irq = S3C_EINT(23),
	},
};

static struct s3c2410_platform_i2c i2c0_pdata = {
	.frequency = 400000,
};

static struct regulator_init_data pvdd_1v2 __initdata = {
	.constraints = {
		.name = "PVDD_1V2",
		.always_on = 1,
	},
};

static struct regulator_consumer_supply pvdd_1v8_consumers[] __initdata = {
	REGULATOR_SUPPLY("PLLVDD", "1-001a"),
	REGULATOR_SUPPLY("DBVDD", "1-001a"),
	REGULATOR_SUPPLY("DBVDD1", "1-001a"),
	REGULATOR_SUPPLY("DBVDD2", "1-001a"),
	REGULATOR_SUPPLY("DBVDD3", "1-001a"),
	REGULATOR_SUPPLY("CPVDD", "1-001a"),
	REGULATOR_SUPPLY("AVDD2", "1-001a"),
	REGULATOR_SUPPLY("DCVDD", "1-001a"),
	REGULATOR_SUPPLY("AVDD", "1-001a"),
};

static struct regulator_init_data pvdd_1v8 __initdata = {
	.constraints = {
		.name = "PVDD_1V8",
		.always_on = 1,
	},

	.consumer_supplies = pvdd_1v8_consumers,
	.num_consumer_supplies = ARRAY_SIZE(pvdd_1v8_consumers),
};

static struct regulator_consumer_supply pvdd_3v3_consumers[] __initdata = {
	REGULATOR_SUPPLY("MICVDD", "1-001a"),
	REGULATOR_SUPPLY("AVDD1", "1-001a"),
};

static struct regulator_init_data pvdd_3v3 __initdata = {
	.constraints = {
		.name = "PVDD_3V3",
		.always_on = 1,
	},

	.consumer_supplies = pvdd_3v3_consumers,
	.num_consumer_supplies = ARRAY_SIZE(pvdd_3v3_consumers),
};

static struct wm831x_pdata glenfarclas_pmic_pdata __initdata = {
	.wm831x_num = 2,
	.irq_base = GLENFARCLAS_PMIC_IRQ_BASE,
	.gpio_base = GLENFARCLAS_PMIC_GPIO_BASE,

	.gpio_defaults = {
		/* GPIO1-3: IRQ inputs, rising edge triggered, CMOS */
		[0] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
		[1] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
		[2] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
	},

	.dcdc = {
		&pvdd_1v2,  /* DCDC1 */
		&pvdd_1v8,  /* DCDC2 */
		&pvdd_3v3,  /* DCDC3 */
	},

	.disable_touch = true,
};

static struct i2c_board_info i2c_devs1[] __initdata = {
	{ I2C_BOARD_INFO("wm8311", 0x34),
	  .irq = S3C_EINT(0),
	  .platform_data = &glenfarclas_pmic_pdata },

	{ I2C_BOARD_INFO("wlf-gf-module", 0x24) },
	{ I2C_BOARD_INFO("wlf-gf-module", 0x25) },
	{ I2C_BOARD_INFO("wlf-gf-module", 0x26) },

	{ I2C_BOARD_INFO("wm1250-ev1", 0x27) },
};

static void __init crag6410_map_io(void)
{
	s3c64xx_init_io(NULL, 0);
	s3c24xx_init_clocks(12000000);
	s3c24xx_init_uarts(crag6410_uartcfgs, ARRAY_SIZE(crag6410_uartcfgs));

	/* LCD type and Bypass set by bootloader */
}

static struct s3c_sdhci_platdata crag6410_hsmmc2_pdata = {
	.max_width		= 4,
	.cd_type		= S3C_SDHCI_CD_PERMANENT,
};

static struct s3c_sdhci_platdata crag6410_hsmmc1_pdata = {
	.max_width		= 4,
	.cd_type		= S3C_SDHCI_CD_GPIO,
	.ext_cd_gpio		= S3C64XX_GPF(11),
};

static void crag6410_cfg_sdhci0(struct platform_device *dev, int width)
{
	/* Set all the necessary GPG pins to special-function 2 */
	s3c_gpio_cfgrange_nopull(S3C64XX_GPG(0), 2 + width, S3C_GPIO_SFN(2));

	/* force card-detected for prototype 0 */
	s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_DOWN);
}

static struct s3c_sdhci_platdata crag6410_hsmmc0_pdata = {
	.max_width		= 4,
	.cd_type		= S3C_SDHCI_CD_INTERNAL,
	.cfg_gpio		= crag6410_cfg_sdhci0,
};

static void __init crag6410_machine_init(void)
{
	/* Open drain IRQs need pullups */
	s3c_gpio_setpull(S3C64XX_GPM(0), S3C_GPIO_PULL_UP);
	s3c_gpio_setpull(S3C64XX_GPN(0), S3C_GPIO_PULL_UP);

	gpio_request(S3C64XX_GPB(0), "LCD power");
	gpio_direction_output(S3C64XX_GPB(0), 0);

	gpio_request(S3C64XX_GPF(14), "LCD PWM");
	gpio_direction_output(S3C64XX_GPF(14), 0);  /* turn off */

	gpio_request(S3C64XX_GPB(1), "SD power");
	gpio_direction_output(S3C64XX_GPB(1), 0);

	gpio_request(S3C64XX_GPF(10), "nRESETSEL");
	gpio_direction_output(S3C64XX_GPF(10), 1);

	s3c_sdhci0_set_platdata(&crag6410_hsmmc0_pdata);
	s3c_sdhci1_set_platdata(&crag6410_hsmmc1_pdata);
	s3c_sdhci2_set_platdata(&crag6410_hsmmc2_pdata);

	s3c_i2c0_set_platdata(&i2c0_pdata);
	s3c_i2c1_set_platdata(NULL);
	s3c_fb_set_platdata(&crag6410_lcd_pdata);

	i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
	i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));

	samsung_keypad_set_platdata(&crag6410_keypad_data);

	platform_add_devices(crag6410_devices, ARRAY_SIZE(crag6410_devices));

	regulator_has_full_constraints();

	s3c_pm_init();
}

MACHINE_START(WLF_CRAGG_6410, "Wolfson Cragganmore 6410")
	/* Maintainer: Mark Brown <broonie@opensource.wolfsonmicro.com> */
	.boot_params	= S3C64XX_PA_SDRAM + 0x100,
	.init_irq	= s3c6410_init_irq,
	.map_io		= crag6410_map_io,
	.init_machine	= crag6410_machine_init,
	.timer		= &s3c24xx_timer,
MACHINE_END
Commit	Line	Data
e1a3c74f MB	1	/* linux/arch/arm/mach-s3c64xx/mach-crag6410.c
	2	*
	3	* Copyright 2011 Wolfson Microelectronics plc
	4	* Mark Brown <broonie@opensource.wolfsonmicro.com>
	5	*
	6	* Copyright 2011 Simtec Electronics
	7	* Ben Dooks <ben@simtec.co.uk>
	8	*
	9	* This program is free software; you can redistribute it and/or modify
	10	* it under the terms of the GNU General Public License version 2 as
	11	* published by the Free Software Foundation.
	12	*/
	13
	14	#include <linux/kernel.h>
	15	#include <linux/list.h>
	16	#include <linux/serial_core.h>
	17	#include <linux/platform_device.h>
	18	#include <linux/fb.h>
	19	#include <linux/io.h>
	20	#include <linux/init.h>
	21	#include <linux/gpio.h>
	22	#include <linux/delay.h>
	23	#include <linux/regulator/machine.h>
ae24c263	24	#include <linux/regulator/fixed.h>
e1a3c74f MB	25	#include <linux/pwm_backlight.h>
	26	#include <linux/dm9000.h>
	27	#include <linux/gpio_keys.h>
	28	#include <linux/basic_mmio_gpio.h>
	29	#include <linux/spi/spi.h>
	30
	31	#include <linux/i2c/pca953x.h>
	32
	33	#include <video/platform_lcd.h>
	34
	35	#include <linux/mfd/wm831x/core.h>
	36	#include <linux/mfd/wm831x/pdata.h>
ae24c263	37	#include <linux/mfd/wm831x/irq.h>
e1a3c74f MB	38	#include <linux/mfd/wm831x/gpio.h>
	39
	40	#include <asm/mach/arch.h>
	41	#include <asm/mach-types.h>
	42
	43	#include <mach/hardware.h>
	44	#include <mach/map.h>
	45
	46	#include <mach/s3c6410.h>
	47	#include <mach/regs-sys.h>
	48	#include <mach/regs-gpio.h>
	49	#include <mach/regs-modem.h>
d0f0b43f	50	#include <mach/crag6410.h>
e1a3c74f	51
e1a3c74f MB	52	#include <mach/regs-gpio-memport.h>
	53
	54	#include <plat/regs-serial.h>
	55	#include <plat/regs-fb-v4.h>
	56	#include <plat/fb.h>
	57	#include <plat/sdhci.h>
	58	#include <plat/gpio-cfg.h>
	59	#include <plat/s3c64xx-spi.h>
	60
	61	#include <plat/keypad.h>
	62	#include <plat/clock.h>
	63	#include <plat/devs.h>
	64	#include <plat/cpu.h>
	65	#include <plat/adc.h>
	66	#include <plat/iic.h>
	67	#include <plat/pm.h>
	68
e1a3c74f MB	69	/* serial port setup */
	70
	71	#define UCON (S3C2410_UCON_DEFAULT \| S3C2410_UCON_UCLK)
	72	#define ULCON (S3C2410_LCON_CS8 \| S3C2410_LCON_PNONE \| S3C2410_LCON_STOPB)
	73	#define UFCON (S3C2410_UFCON_RXTRIG8 \| S3C2410_UFCON_FIFOMODE)
	74
	75	static struct s3c2410_uartcfg crag6410_uartcfgs[] __initdata = {
	76	[0] = {
ae24c263 MB	77	.hwport = 0,
	78	.flags = 0,
	79	.ucon = UCON,
	80	.ulcon = ULCON,
	81	.ufcon = UFCON,
e1a3c74f MB	82	},
e1a3c74f MB	83	[1] = {
ae24c263 MB	84	.hwport = 1,
	85	.flags = 0,
	86	.ucon = UCON,
	87	.ulcon = ULCON,
	88	.ufcon = UFCON,
e1a3c74f MB	89	},
e1a3c74f MB	90	[2] = {
ae24c263 MB	91	.hwport = 2,
	92	.flags = 0,
	93	.ucon = UCON,
	94	.ulcon = ULCON,
	95	.ufcon = UFCON,
e1a3c74f MB	96	},
e1a3c74f MB	97	[3] = {
ae24c263 MB	98	.hwport = 3,
	99	.flags = 0,
	100	.ucon = UCON,
	101	.ulcon = ULCON,
	102	.ufcon = UFCON,
e1a3c74f MB	103	},
	104	};
	105
	106	static struct platform_pwm_backlight_data crag6410_backlight_data = {
	107	.pwm_id = 0,
	108	.max_brightness = 1000,
	109	.dft_brightness = 600,
	110	.pwm_period_ns = 100000, /* about 1kHz */
	111	};
	112
	113	static struct platform_device crag6410_backlight_device = {
	114	.name = "pwm-backlight",
	115	.id = -1,
	116	.dev = {
	117	.parent = &s3c_device_timer[0].dev,
	118	.platform_data = &crag6410_backlight_data,
	119	},
	120	};
	121
	122	static void crag6410_lcd_power_set(struct plat_lcd_data *pd, unsigned int power)
	123	{
	124	pr_debug("%s: setting power %d\n", __func__, power);
	125
	126	if (power) {
	127	gpio_set_value(S3C64XX_GPB(0), 1);
	128	msleep(1);
	129	s3c_gpio_cfgpin(S3C64XX_GPF(14), S3C_GPIO_SFN(2));
	130	} else {
	131	gpio_direction_output(S3C64XX_GPF(14), 0);
	132	gpio_set_value(S3C64XX_GPB(0), 0);
	133	}
	134	}
	135
	136	static struct platform_device crag6410_lcd_powerdev = {
	137	.name = "platform-lcd",
	138	.id = -1,
	139	.dev.parent = &s3c_device_fb.dev,
	140	.dev.platform_data = &(struct plat_lcd_data) {
	141	.set_power = crag6410_lcd_power_set,
	142	},
	143	};
	144
	145	/* 640x480 URT */
	146	static struct s3c_fb_pd_win crag6410_fb_win0 = {
	147	/* this is to ensure we use win0 */
	148	.win_mode = {
	149	.left_margin = 150,
	150	.right_margin = 80,
	151	.upper_margin = 40,
	152	.lower_margin = 5,
	153	.hsync_len = 40,
	154	.vsync_len = 5,
	155	.xres = 640,
	156	.yres = 480,
	157	},
	158	.max_bpp = 32,
	159	.default_bpp = 16,
	160	.virtual_y = 480 * 2,
	161	.virtual_x = 640,
	162	};
	163
	164	/* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */
	165	static struct s3c_fb_platdata crag6410_lcd_pdata __initdata = {
	166	.setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
167	.win[0] = &crag6410_fb_win0,
168	.vidcon0 = VIDCON0_VIDOUT_RGB \| VIDCON0_PNRMODE_RGB,
169	.vidcon1 = VIDCON1_INV_HSYNC \| VIDCON1_INV_VSYNC,
170	};
171
172	/* 2x6 keypad */
173
174	static uint32_t crag6410_keymap[] __initdata = {
175	/* KEY(row, col, keycode) */
176	KEY(0, 0, KEY_VOLUMEUP),
177	KEY(0, 1, KEY_HOME),
178	KEY(0, 2, KEY_VOLUMEDOWN),
179	KEY(0, 3, KEY_HELP),
180	KEY(0, 4, KEY_MENU),
181	KEY(0, 5, KEY_MEDIA),
182	KEY(1, 0, 232),
183	KEY(1, 1, KEY_DOWN),
184	KEY(1, 2, KEY_LEFT),
185	KEY(1, 3, KEY_UP),
186	KEY(1, 4, KEY_RIGHT),
187	KEY(1, 5, KEY_CAMERA),
188	};
189
190	static struct matrix_keymap_data crag6410_keymap_data __initdata = {
191	.keymap = crag6410_keymap,
192	.keymap_size = ARRAY_SIZE(crag6410_keymap),
193	};
194
195	static struct samsung_keypad_platdata crag6410_keypad_data __initdata = {
196	.keymap_data = &crag6410_keymap_data,
197	.rows = 2,
198	.cols = 6,
199	};
200
201	static struct gpio_keys_button crag6410_gpio_keys[] = {
202	[0] = {
203	.code = KEY_SUSPEND,
204	.gpio = S3C64XX_GPL(10), /* EINT 18 */
ae24c263	205	.type = EV_KEY,
e1a3c74f MB	206	.wakeup = 1,
	207	.active_low = 1,
	208	},
ae24c263 MB	209	[1] = {
	210	.code = SW_FRONT_PROXIMITY,
	211	.gpio = S3C64XX_GPN(11), /* EINT 11 */
	212	.type = EV_SW,
	213	},
e1a3c74f MB	214	};
	215
	216	static struct gpio_keys_platform_data crag6410_gpio_keydata = {
	217	.buttons = crag6410_gpio_keys,
	218	.nbuttons = ARRAY_SIZE(crag6410_gpio_keys),
	219	};
	220
	221	static struct platform_device crag6410_gpio_keydev = {
	222	.name = "gpio-keys",
	223	.id = 0,
	224	.dev.platform_data = &crag6410_gpio_keydata,
	225	};
	226
	227	static struct resource crag6410_dm9k_resource[] = {
	228	[0] = {
	229	.start = S3C64XX_PA_XM0CSN5,
	230	.end = S3C64XX_PA_XM0CSN5 + 1,
	231	.flags = IORESOURCE_MEM,
	232	},
	233	[1] = {
	234	.start = S3C64XX_PA_XM0CSN5 + (1 << 8),
	235	.end = S3C64XX_PA_XM0CSN5 + (1 << 8) + 1,
	236	.flags = IORESOURCE_MEM,
	237	},
	238	[2] = {
	239	.start = S3C_EINT(17),
	240	.end = S3C_EINT(17),
	241	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_HIGHLEVEL,
	242	},
	243	};
	244
	245	static struct dm9000_plat_data mini6410_dm9k_pdata = {
	246	.flags = DM9000_PLATF_16BITONLY,
	247	};
	248
	249	static struct platform_device crag6410_dm9k_device = {
	250	.name = "dm9000",
	251	.id = -1,
	252	.num_resources = ARRAY_SIZE(crag6410_dm9k_resource),
	253	.resource = crag6410_dm9k_resource,
	254	.dev.platform_data = &mini6410_dm9k_pdata,
	255	};
	256
	257	static struct resource crag6410_mmgpio_resource[] = {
	258	[0] = {
	259	.start = S3C64XX_PA_XM0CSN4 + 1,
	260	.end = S3C64XX_PA_XM0CSN4 + 1,
	261	.flags = IORESOURCE_MEM,
	262	},
	263	};
	264
	265	static struct platform_device crag6410_mmgpio = {
	266	.name = "basic-mmio-gpio",
	267	.id = -1,
	268	.resource = crag6410_mmgpio_resource,
	269	.num_resources = ARRAY_SIZE(crag6410_mmgpio_resource),
	270	.dev.platform_data = &(struct bgpio_pdata) {
	271	.base = -1,
	272	},
	273	};
	274
ae24c263 MB	275	static struct platform_device speyside_device = {
	276	.name = "speyside",
	277	.id = -1,
	278	};
	279
8c051ab4 MB	280	static struct platform_device lowland_device = {
	281	.name = "lowland",
	282	.id = -1,
	283	};
	284
ae24c263 MB	285	static struct platform_device speyside_wm8962_device = {
	286	.name = "speyside-wm8962",
	287	.id = -1,
	288	};
	289
	290	static struct regulator_consumer_supply wallvdd_consumers[] = {
	291	REGULATOR_SUPPLY("SPKVDD1", "1-001a"),
	292	REGULATOR_SUPPLY("SPKVDD2", "1-001a"),
4ed12b50 MB	293	REGULATOR_SUPPLY("SPKVDDL", "1-001a"),
4ed12b50 MB	294	REGULATOR_SUPPLY("SPKVDDR", "1-001a"),
ae24c263 MB	295	};
	296
	297	static struct regulator_init_data wallvdd_data = {
	298	.constraints = {
	299	.always_on = 1,
	300	},
	301	.num_consumer_supplies = ARRAY_SIZE(wallvdd_consumers),
	302	.consumer_supplies = wallvdd_consumers,
	303	};
	304
	305	static struct fixed_voltage_config wallvdd_pdata = {
	306	.supply_name = "WALLVDD",
	307	.microvolts = 5000000,
	308	.init_data = &wallvdd_data,
	309	.gpio = -EINVAL,
	310	};
	311
	312	static struct platform_device wallvdd_device = {
	313	.name = "reg-fixed-voltage",
	314	.id = -1,
	315	.dev = {
	316	.platform_data = &wallvdd_pdata,
	317	},
	318	};
	319
e1a3c74f MB	320	static struct platform_device *crag6410_devices[] __initdata = {
	321	&s3c_device_hsmmc0,
	322	&s3c_device_hsmmc1,
	323	&s3c_device_hsmmc2,
	324	&s3c_device_i2c0,
	325	&s3c_device_i2c1,
	326	&s3c_device_fb,
	327	&s3c_device_ohci,
	328	&s3c_device_usb_hsotg,
	329	&s3c_device_adc,
	330	&s3c_device_rtc,
	331	&s3c_device_ts,
	332	&s3c_device_timer[0],
	333	&s3c64xx_device_iis0,
	334	&s3c64xx_device_iis1,
	335	&samsung_asoc_dma,
	336	&samsung_device_keypad,
	337	&crag6410_gpio_keydev,
	338	&crag6410_dm9k_device,
	339	&s3c64xx_device_spi0,
	340	&crag6410_mmgpio,
	341	&crag6410_lcd_powerdev,
	342	&crag6410_backlight_device,
ae24c263 MB	343	&speyside_device,
ae24c263 MB	344	&speyside_wm8962_device,
8c051ab4	345	&lowland_device,
ae24c263	346	&wallvdd_device,
e1a3c74f MB	347	};
	348
	349	static struct pca953x_platform_data crag6410_pca_data = {
	350	.gpio_base = PCA935X_GPIO_BASE,
	351	.irq_base = 0,
	352	};
	353
986afc98 MB	354	/* VDDARM is controlled by DVS1 connected to GPK(0) */
	355	static struct wm831x_buckv_pdata vddarm_pdata = {
	356	.dvs_control_src = 1,
	357	.dvs_gpio = S3C64XX_GPK(0),
	358	};
	359
e1a3c74f MB	360	static struct regulator_consumer_supply vddarm_consumers[] __initdata = {
	361	REGULATOR_SUPPLY("vddarm", NULL),
	362	};
	363
	364	static struct regulator_init_data vddarm __initdata = {
	365	.constraints = {
	366	.name = "VDDARM",
	367	.min_uV = 1000000,
	368	.max_uV = 1300000,
	369	.always_on = 1,
	370	.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
	371	},
	372	.num_consumer_supplies = ARRAY_SIZE(vddarm_consumers),
	373	.consumer_supplies = vddarm_consumers,
35127296	374	.supply_regulator = "WALLVDD",
986afc98	375	.driver_data = &vddarm_pdata,
e1a3c74f MB	376	};
	377
	378	static struct regulator_init_data vddint __initdata = {
	379	.constraints = {
	380	.name = "VDDINT",
	381	.min_uV = 1000000,
	382	.max_uV = 1200000,
	383	.always_on = 1,
	384	.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
	385	},
	386	};
	387
	388	static struct regulator_init_data vddmem __initdata = {
	389	.constraints = {
	390	.name = "VDDMEM",
	391	.always_on = 1,
	392	},
	393	};
	394
	395	static struct regulator_init_data vddsys __initdata = {
	396	.constraints = {
	397	.name = "VDDSYS,VDDEXT,VDDPCM,VDDSS",
	398	.always_on = 1,
	399	},
	400	};
	401
	402	static struct regulator_consumer_supply vddmmc_consumers[] __initdata = {
	403	REGULATOR_SUPPLY("vmmc", "s3c-sdhci.0"),
	404	REGULATOR_SUPPLY("vmmc", "s3c-sdhci.1"),
	405	REGULATOR_SUPPLY("vmmc", "s3c-sdhci.2"),
	406	};
	407
	408	static struct regulator_init_data vddmmc __initdata = {
	409	.constraints = {
	410	.name = "VDDMMC,UH",
	411	.always_on = 1,
	412	},
	413	.num_consumer_supplies = ARRAY_SIZE(vddmmc_consumers),
	414	.consumer_supplies = vddmmc_consumers,
35127296	415	.supply_regulator = "WALLVDD",
e1a3c74f MB	416	};
	417
	418	static struct regulator_init_data vddotgi __initdata = {
	419	.constraints = {
	420	.name = "VDDOTGi",
	421	.always_on = 1,
	422	},
35127296	423	.supply_regulator = "WALLVDD",
e1a3c74f MB	424	};
	425
	426	static struct regulator_init_data vddotg __initdata = {
	427	.constraints = {
	428	.name = "VDDOTG",
	429	.always_on = 1,
	430	},
35127296	431	.supply_regulator = "WALLVDD",
e1a3c74f MB	432	};
	433
	434	static struct regulator_init_data vddhi __initdata = {
	435	.constraints = {
	436	.name = "VDDHI",
	437	.always_on = 1,
	438	},
35127296	439	.supply_regulator = "WALLVDD",
e1a3c74f MB	440	};
	441
	442	static struct regulator_init_data vddadc __initdata = {
	443	.constraints = {
	444	.name = "VDDADC,VDDDAC",
	445	.always_on = 1,
	446	},
35127296	447	.supply_regulator = "WALLVDD",
e1a3c74f MB	448	};
	449
	450	static struct regulator_init_data vddmem0 __initdata = {
	451	.constraints = {
	452	.name = "VDDMEM0",
	453	.always_on = 1,
	454	},
35127296	455	.supply_regulator = "WALLVDD",
e1a3c74f MB	456	};
	457
	458	static struct regulator_init_data vddpll __initdata = {
	459	.constraints = {
	460	.name = "VDDPLL",
	461	.always_on = 1,
	462	},
35127296	463	.supply_regulator = "WALLVDD",
e1a3c74f MB	464	};
	465
	466	static struct regulator_init_data vddlcd __initdata = {
	467	.constraints = {
	468	.name = "VDDLCD",
	469	.always_on = 1,
	470	},
35127296	471	.supply_regulator = "WALLVDD",
e1a3c74f MB	472	};
	473
	474	static struct regulator_init_data vddalive __initdata = {
	475	.constraints = {
	476	.name = "VDDALIVE",
	477	.always_on = 1,
	478	},
35127296	479	.supply_regulator = "WALLVDD",
e1a3c74f MB	480	};
e1a3c74f MB	481
89e1c3d0 MB	482	static struct wm831x_backup_pdata banff_backup_pdata __initdata = {
	483	.charger_enable = 1,
	484	.vlim = 2500, /* mV */
	485	.ilim = 200, /* uA */
	486	};
	487
e1a3c74f MB	488	static struct wm831x_status_pdata banff_red_led __initdata = {
	489	.name = "banff:red:",
	490	.default_src = WM831X_STATUS_MANUAL,
	491	};
	492
	493	static struct wm831x_status_pdata banff_green_led __initdata = {
	494	.name = "banff:green:",
	495	.default_src = WM831X_STATUS_MANUAL,
	496	};
	497
	498	static struct wm831x_touch_pdata touch_pdata __initdata = {
	499	.data_irq = S3C_EINT(26),
ae24c263	500	.pd_irq = S3C_EINT(27),
e1a3c74f MB	501	};
e1a3c74f MB	502
e1a3c74f	503	static struct wm831x_pdata crag_pmic_pdata __initdata = {
ae24c263	504	.wm831x_num = 1,
e1a3c74f MB	505	.irq_base = BANFF_PMIC_IRQ_BASE,
	506	.gpio_base = GPIO_BOARD_START + 8,
	507
89e1c3d0 MB	508	.backup = &banff_backup_pdata,
89e1c3d0 MB	509
ae24c263	510	.gpio_defaults = {
986afc98 MB	511	/* GPIO5: DVS1_REQ - CMOS, DBVDD, active high */
986afc98 MB	512	[4] = WM831X_GPN_DIR \| WM831X_GPN_POL \| WM831X_GPN_ENA \| 0x8,
ae24c263 MB	513	/* GPIO11: Touchscreen data - CMOS, DBVDD, active high*/
	514	[10] = WM831X_GPN_POL \| WM831X_GPN_ENA \| 0x6,
	515	/* GPIO12: Touchscreen pen down - CMOS, DBVDD, active high*/
	516	[11] = WM831X_GPN_POL \| WM831X_GPN_ENA \| 0x7,
	517	},
	518
e1a3c74f MB	519	.dcdc = {
	520	&vddarm, /* DCDC1 */
	521	&vddint, /* DCDC2 */
	522	&vddmem, /* DCDC3 */
	523	},
	524
	525	.ldo = {
	526	&vddsys, /* LDO1 */
	527	&vddmmc, /* LDO2 */
	528	NULL, /* LDO3 */
	529	&vddotgi, /* LDO4 */
	530	&vddotg, /* LDO5 */
	531	&vddhi, /* LDO6 */
	532	&vddadc, /* LDO7 */
	533	&vddmem0, /* LDO8 */
	534	&vddpll, /* LDO9 */
	535	&vddlcd, /* LDO10 */
	536	&vddalive, /* LDO11 */
	537	},
	538
	539	.status = {
	540	&banff_green_led,
	541	&banff_red_led,
	542	},
	543
	544	.touch = &touch_pdata,
	545	};
	546
	547	static struct i2c_board_info i2c_devs0[] __initdata = {
	548	{ I2C_BOARD_INFO("24c08", 0x50), },
	549	{ I2C_BOARD_INFO("tca6408", 0x20),
	550	.platform_data = &crag6410_pca_data,
	551	},
	552	{ I2C_BOARD_INFO("wm8312", 0x34),
	553	.platform_data = &crag_pmic_pdata,
	554	.irq = S3C_EINT(23),
	555	},
	556	};
	557
	558	static struct s3c2410_platform_i2c i2c0_pdata = {
	559	.frequency = 400000,
	560	};
	561
ae24c263 MB	562	static struct regulator_init_data pvdd_1v2 __initdata = {
	563	.constraints = {
	564	.name = "PVDD_1V2",
	565	.always_on = 1,
	566	},
	567	};
	568
	569	static struct regulator_consumer_supply pvdd_1v8_consumers[] __initdata = {
	570	REGULATOR_SUPPLY("PLLVDD", "1-001a"),
	571	REGULATOR_SUPPLY("DBVDD", "1-001a"),
4ed12b50 MB	572	REGULATOR_SUPPLY("DBVDD1", "1-001a"),
	573	REGULATOR_SUPPLY("DBVDD2", "1-001a"),
	574	REGULATOR_SUPPLY("DBVDD3", "1-001a"),
ae24c263 MB	575	REGULATOR_SUPPLY("CPVDD", "1-001a"),
	576	REGULATOR_SUPPLY("AVDD2", "1-001a"),
	577	REGULATOR_SUPPLY("DCVDD", "1-001a"),
	578	REGULATOR_SUPPLY("AVDD", "1-001a"),
	579	};
	580
	581	static struct regulator_init_data pvdd_1v8 __initdata = {
	582	.constraints = {
	583	.name = "PVDD_1V8",
	584	.always_on = 1,
	585	},
	586
	587	.consumer_supplies = pvdd_1v8_consumers,
	588	.num_consumer_supplies = ARRAY_SIZE(pvdd_1v8_consumers),
	589	};
	590
	591	static struct regulator_consumer_supply pvdd_3v3_consumers[] __initdata = {
	592	REGULATOR_SUPPLY("MICVDD", "1-001a"),
	593	REGULATOR_SUPPLY("AVDD1", "1-001a"),
	594	};
	595
	596	static struct regulator_init_data pvdd_3v3 __initdata = {
	597	.constraints = {
	598	.name = "PVDD_3V3",
	599	.always_on = 1,
	600	},
	601
	602	.consumer_supplies = pvdd_3v3_consumers,
	603	.num_consumer_supplies = ARRAY_SIZE(pvdd_3v3_consumers),
	604	};
	605
	606	static struct wm831x_pdata glenfarclas_pmic_pdata __initdata = {
	607	.wm831x_num = 2,
	608	.irq_base = GLENFARCLAS_PMIC_IRQ_BASE,
	609	.gpio_base = GLENFARCLAS_PMIC_GPIO_BASE,
	610
	611	.gpio_defaults = {
	612	/* GPIO1-3: IRQ inputs, rising edge triggered, CMOS */
	613	[0] = WM831X_GPN_DIR \| WM831X_GPN_POL \| WM831X_GPN_ENA,
	614	[1] = WM831X_GPN_DIR \| WM831X_GPN_POL \| WM831X_GPN_ENA,
	615	[2] = WM831X_GPN_DIR \| WM831X_GPN_POL \| WM831X_GPN_ENA,
	616	},
	617
	618	.dcdc = {
	619	&pvdd_1v2, /* DCDC1 */
	620	&pvdd_1v8, /* DCDC2 */
	621	&pvdd_3v3, /* DCDC3 */
	622	},
	623
	624	.disable_touch = true,
	625	};
	626
e1a3c74f MB	627	static struct i2c_board_info i2c_devs1[] __initdata = {
e1a3c74f MB	628	{ I2C_BOARD_INFO("wm8311", 0x34),
ae24c263 MB	629	.irq = S3C_EINT(0),
	630	.platform_data = &glenfarclas_pmic_pdata },
	631
d0f0b43f MB	632	{ I2C_BOARD_INFO("wlf-gf-module", 0x24) },
	633	{ I2C_BOARD_INFO("wlf-gf-module", 0x25) },
	634	{ I2C_BOARD_INFO("wlf-gf-module", 0x26) },
	635
ae24c263	636	{ I2C_BOARD_INFO("wm1250-ev1", 0x27) },
e1a3c74f MB	637	};
	638
	639	static void __init crag6410_map_io(void)
	640	{
	641	s3c64xx_init_io(NULL, 0);
	642	s3c24xx_init_clocks(12000000);
	643	s3c24xx_init_uarts(crag6410_uartcfgs, ARRAY_SIZE(crag6410_uartcfgs));
	644
	645	/* LCD type and Bypass set by bootloader */
	646	}
	647
	648	static struct s3c_sdhci_platdata crag6410_hsmmc2_pdata = {
	649	.max_width = 4,
	650	.cd_type = S3C_SDHCI_CD_PERMANENT,
	651	};
	652
	653	static struct s3c_sdhci_platdata crag6410_hsmmc1_pdata = {
	654	.max_width = 4,
	655	.cd_type = S3C_SDHCI_CD_GPIO,
	656	.ext_cd_gpio = S3C64XX_GPF(11),
	657	};
	658
	659	static void crag6410_cfg_sdhci0(struct platform_device *dev, int width)
	660	{
	661	/* Set all the necessary GPG pins to special-function 2 */
	662	s3c_gpio_cfgrange_nopull(S3C64XX_GPG(0), 2 + width, S3C_GPIO_SFN(2));
	663
	664	/* force card-detected for prototype 0 */
	665	s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_DOWN);
	666	}
	667
	668	static struct s3c_sdhci_platdata crag6410_hsmmc0_pdata = {
	669	.max_width = 4,
	670	.cd_type = S3C_SDHCI_CD_INTERNAL,
	671	.cfg_gpio = crag6410_cfg_sdhci0,
	672	};
	673
	674	static void __init crag6410_machine_init(void)
	675	{
	676	/* Open drain IRQs need pullups */
	677	s3c_gpio_setpull(S3C64XX_GPM(0), S3C_GPIO_PULL_UP);
	678	s3c_gpio_setpull(S3C64XX_GPN(0), S3C_GPIO_PULL_UP);
	679
	680	gpio_request(S3C64XX_GPB(0), "LCD power");
	681	gpio_direction_output(S3C64XX_GPB(0), 0);
	682
	683	gpio_request(S3C64XX_GPF(14), "LCD PWM");
	684	gpio_direction_output(S3C64XX_GPF(14), 0); /* turn off */
	685
	686	gpio_request(S3C64XX_GPB(1), "SD power");
	687	gpio_direction_output(S3C64XX_GPB(1), 0);
	688
	689	gpio_request(S3C64XX_GPF(10), "nRESETSEL");
	690	gpio_direction_output(S3C64XX_GPF(10), 1);
	691
	692	s3c_sdhci0_set_platdata(&crag6410_hsmmc0_pdata);
	693	s3c_sdhci1_set_platdata(&crag6410_hsmmc1_pdata);
	694	s3c_sdhci2_set_platdata(&crag6410_hsmmc2_pdata);
	695
	696	s3c_i2c0_set_platdata(&i2c0_pdata);
	697	s3c_i2c1_set_platdata(NULL);
	698	s3c_fb_set_platdata(&crag6410_lcd_pdata);
	699
	700	i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
701	i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
702
703	samsung_keypad_set_platdata(&crag6410_keypad_data);
704
705	platform_add_devices(crag6410_devices, ARRAY_SIZE(crag6410_devices));
706
ae24c263 MB	707	regulator_has_full_constraints();
ae24c263 MB	708
e1a3c74f MB	709	s3c_pm_init();
	710	}
	711
	712	MACHINE_START(WLF_CRAGG_6410, "Wolfson Cragganmore 6410")
	713	/* Maintainer: Mark Brown <broonie@opensource.wolfsonmicro.com> */
	714	.boot_params = S3C64XX_PA_SDRAM + 0x100,
	715	.init_irq = s3c6410_init_irq,
	716	.map_io = crag6410_map_io,
	717	.init_machine = crag6410_machine_init,
	718	.timer = &s3c24xx_timer,
	719	MACHINE_END