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[mirror_ubuntu-zesty-kernel.git] / arch / arm / mach-s3c64xx / mach-real6410.c
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1/* linux/arch/arm/mach-s3c64xx/mach-real6410.c
2 *
3 * Copyright 2010 Darius Augulis <augulis.darius@gmail.com>
4 * Copyright 2008 Openmoko, Inc.
5 * Copyright 2008 Simtec Electronics
6 * Ben Dooks <ben@simtec.co.uk>
7 * http://armlinux.simtec.co.uk/
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 *
13*/
14
c115f67c 15#include <linux/init.h>
eab5cfa0 16#include <linux/interrupt.h>
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17#include <linux/fb.h>
18#include <linux/gpio.h>
19#include <linux/kernel.h>
eab5cfa0 20#include <linux/list.h>
ff266c0c 21#include <linux/dm9000.h>
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22#include <linux/mtd/mtd.h>
23#include <linux/mtd/partitions.h>
eab5cfa0 24#include <linux/platform_device.h>
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25#include <linux/serial_core.h>
26#include <linux/types.h>
27
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28#include <asm/mach-types.h>
29#include <asm/mach/arch.h>
30#include <asm/mach/map.h>
c115f67c 31
eab5cfa0 32#include <mach/map.h>
c115f67c 33#include <mach/regs-gpio.h>
c115f67c 34
4374c456 35#include <plat/adc.h>
eab5cfa0 36#include <plat/cpu.h>
ce611d7b 37#include <plat/devs.h>
c115f67c 38#include <plat/fb.h>
436d42c6 39#include <linux/platform_data/mtd-nand-s3c2410.h>
eab5cfa0 40#include <plat/regs-serial.h>
436d42c6 41#include <linux/platform_data/touchscreen-s3c2410.h>
eab5cfa0 42
c115f67c 43#include <video/platform_lcd.h>
5a213a55 44#include <video/samsung_fimd.h>
04a49b71 45#include <plat/samsung-time.h>
eab5cfa0 46
b024043b 47#include "common.h"
a81c1970 48#include "regs-modem.h"
8eba8ea2 49#include "regs-srom.h"
b024043b 50
8b8c87de 51#define UCON S3C2410_UCON_DEFAULT
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52#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB)
53#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
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54
55static struct s3c2410_uartcfg real6410_uartcfgs[] __initdata = {
56 [0] = {
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57 .hwport = 0,
58 .flags = 0,
59 .ucon = UCON,
60 .ulcon = ULCON,
61 .ufcon = UFCON,
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62 },
63 [1] = {
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64 .hwport = 1,
65 .flags = 0,
66 .ucon = UCON,
67 .ulcon = ULCON,
68 .ufcon = UFCON,
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69 },
70 [2] = {
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71 .hwport = 2,
72 .flags = 0,
73 .ucon = UCON,
74 .ulcon = ULCON,
75 .ufcon = UFCON,
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76 },
77 [3] = {
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78 .hwport = 3,
79 .flags = 0,
80 .ucon = UCON,
81 .ulcon = ULCON,
82 .ufcon = UFCON,
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83 },
84};
85
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86/* DM9000AEP 10/100 ethernet controller */
87
88static struct resource real6410_dm9k_resource[] = {
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89 [0] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN1, 2),
90 [1] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN1 + 4, 2),
91 [2] = DEFINE_RES_NAMED(S3C_EINT(7), 1, NULL, IORESOURCE_IRQ \
92 | IORESOURCE_IRQ_HIGHLEVEL),
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93};
94
95static struct dm9000_plat_data real6410_dm9k_pdata = {
591cd25e 96 .flags = (DM9000_PLATF_16BITONLY | DM9000_PLATF_NO_EEPROM),
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97};
98
99static struct platform_device real6410_device_eth = {
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100 .name = "dm9000",
101 .id = -1,
102 .num_resources = ARRAY_SIZE(real6410_dm9k_resource),
103 .resource = real6410_dm9k_resource,
104 .dev = {
105 .platform_data = &real6410_dm9k_pdata,
106 },
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107};
108
884924be 109static struct s3c_fb_pd_win real6410_lcd_type0_fb_win = {
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110 .max_bpp = 32,
111 .default_bpp = 16,
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112 .xres = 480,
113 .yres = 272,
114};
115
116static struct fb_videomode real6410_lcd_type0_timing = {
117 /* 4.3" 480x272 */
118 .left_margin = 3,
119 .right_margin = 2,
120 .upper_margin = 1,
121 .lower_margin = 1,
122 .hsync_len = 40,
123 .vsync_len = 1,
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124};
125
884924be 126static struct s3c_fb_pd_win real6410_lcd_type1_fb_win = {
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127 .max_bpp = 32,
128 .default_bpp = 16,
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129 .xres = 800,
130 .yres = 480,
131};
132
133static struct fb_videomode real6410_lcd_type1_timing = {
134 /* 7.0" 800x480 */
135 .left_margin = 8,
136 .right_margin = 13,
137 .upper_margin = 7,
138 .lower_margin = 5,
139 .hsync_len = 3,
140 .vsync_len = 1,
141 .xres = 800,
142 .yres = 480,
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143};
144
145static struct s3c_fb_platdata real6410_lcd_pdata[] __initdata = {
c115f67c 146 {
884924be 147 .setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
79d3c41a 148 .vtiming = &real6410_lcd_type0_timing,
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149 .win[0] = &real6410_lcd_type0_fb_win,
150 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
151 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
c115f67c 152 }, {
884924be 153 .setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
79d3c41a 154 .vtiming = &real6410_lcd_type1_timing,
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155 .win[0] = &real6410_lcd_type1_fb_win,
156 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
157 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
c115f67c 158 },
884924be 159 { },
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160};
161
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162static struct mtd_partition real6410_nand_part[] = {
163 [0] = {
164 .name = "uboot",
165 .size = SZ_1M,
166 .offset = 0,
167 },
168 [1] = {
169 .name = "kernel",
170 .size = SZ_2M,
171 .offset = SZ_1M,
172 },
173 [2] = {
174 .name = "rootfs",
175 .size = MTDPART_SIZ_FULL,
176 .offset = SZ_1M + SZ_2M,
177 },
178};
179
180static struct s3c2410_nand_set real6410_nand_sets[] = {
181 [0] = {
182 .name = "nand",
183 .nr_chips = 1,
184 .nr_partitions = ARRAY_SIZE(real6410_nand_part),
185 .partitions = real6410_nand_part,
186 },
187};
188
189static struct s3c2410_platform_nand real6410_nand_info = {
190 .tacls = 25,
191 .twrph0 = 55,
192 .twrph1 = 40,
193 .nr_sets = ARRAY_SIZE(real6410_nand_sets),
194 .sets = real6410_nand_sets,
195};
196
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197static struct platform_device *real6410_devices[] __initdata = {
198 &real6410_device_eth,
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199 &s3c_device_hsmmc0,
200 &s3c_device_hsmmc1,
c115f67c 201 &s3c_device_fb,
88fbadea 202 &s3c_device_nand,
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203 &s3c_device_adc,
204 &s3c_device_ts,
10dcc7a2 205 &s3c_device_ohci,
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206};
207
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208static void __init real6410_map_io(void)
209{
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210 u32 tmp;
211
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212 s3c64xx_init_io(NULL, 0);
213 s3c24xx_init_clocks(12000000);
214 s3c24xx_init_uarts(real6410_uartcfgs, ARRAY_SIZE(real6410_uartcfgs));
04a49b71 215 samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4);
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216
217 /* set the LCD type */
218 tmp = __raw_readl(S3C64XX_SPCON);
219 tmp &= ~S3C64XX_SPCON_LCD_SEL_MASK;
220 tmp |= S3C64XX_SPCON_LCD_SEL_RGB;
221 __raw_writel(tmp, S3C64XX_SPCON);
222
223 /* remove the LCD bypass */
224 tmp = __raw_readl(S3C64XX_MODEM_MIFPCON);
225 tmp &= ~MIFPCON_LCD_BYPASS;
226 __raw_writel(tmp, S3C64XX_MODEM_MIFPCON);
227}
228
229/*
230 * real6410_features string
231 *
232 * 0-9 LCD configuration
233 *
234 */
235static char real6410_features_str[12] __initdata = "0";
236
237static int __init real6410_features_setup(char *str)
238{
239 if (str)
240 strlcpy(real6410_features_str, str,
241 sizeof(real6410_features_str));
242 return 1;
243}
244
245__setup("real6410=", real6410_features_setup);
246
247#define FEATURE_SCREEN (1 << 0)
248
249struct real6410_features_t {
250 int done;
251 int lcd_index;
252};
253
254static void real6410_parse_features(
255 struct real6410_features_t *features,
256 const char *features_str)
257{
258 const char *fp = features_str;
259
260 features->done = 0;
261 features->lcd_index = 0;
262
263 while (*fp) {
264 char f = *fp++;
265
266 switch (f) {
267 case '0'...'9': /* tft screen */
268 if (features->done & FEATURE_SCREEN) {
269 printk(KERN_INFO "REAL6410: '%c' ignored, "
270 "screen type already set\n", f);
271 } else {
272 int li = f - '0';
884924be 273 if (li >= ARRAY_SIZE(real6410_lcd_pdata))
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274 printk(KERN_INFO "REAL6410: '%c' out "
275 "of range LCD mode\n", f);
276 else {
277 features->lcd_index = li;
278 }
279 }
280 features->done |= FEATURE_SCREEN;
281 break;
282 }
283 }
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284}
285
286static void __init real6410_machine_init(void)
287{
ff266c0c 288 u32 cs1;
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289 struct real6410_features_t features = { 0 };
290
291 printk(KERN_INFO "REAL6410: Option string real6410=%s\n",
292 real6410_features_str);
293
294 /* Parse the feature string */
295 real6410_parse_features(&features, real6410_features_str);
296
c115f67c 297 printk(KERN_INFO "REAL6410: selected LCD display is %dx%d\n",
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298 real6410_lcd_pdata[features.lcd_index].win[0]->xres,
299 real6410_lcd_pdata[features.lcd_index].win[0]->yres);
c115f67c 300
884924be 301 s3c_fb_set_platdata(&real6410_lcd_pdata[features.lcd_index]);
88fbadea 302 s3c_nand_set_platdata(&real6410_nand_info);
0804765a 303 s3c24xx_ts_set_platdata(NULL);
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304
305 /* configure nCS1 width to 16 bits */
306
307 cs1 = __raw_readl(S3C64XX_SROM_BW) &
308 ~(S3C64XX_SROM_BW__CS_MASK << S3C64XX_SROM_BW__NCS1__SHIFT);
309 cs1 |= ((1 << S3C64XX_SROM_BW__DATAWIDTH__SHIFT) |
310 (1 << S3C64XX_SROM_BW__WAITENABLE__SHIFT) |
311 (1 << S3C64XX_SROM_BW__BYTEENABLE__SHIFT)) <<
312 S3C64XX_SROM_BW__NCS1__SHIFT;
313 __raw_writel(cs1, S3C64XX_SROM_BW);
314
315 /* set timing for nCS1 suitable for ethernet chip */
316
317 __raw_writel((0 << S3C64XX_SROM_BCX__PMC__SHIFT) |
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318 (6 << S3C64XX_SROM_BCX__TACP__SHIFT) |
319 (4 << S3C64XX_SROM_BCX__TCAH__SHIFT) |
320 (1 << S3C64XX_SROM_BCX__TCOH__SHIFT) |
321 (13 << S3C64XX_SROM_BCX__TACC__SHIFT) |
322 (4 << S3C64XX_SROM_BCX__TCOS__SHIFT) |
323 (0 << S3C64XX_SROM_BCX__TACS__SHIFT), S3C64XX_SROM_BC1);
ff266c0c 324
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325 gpio_request(S3C64XX_GPF(15), "LCD power");
326
ff266c0c 327 platform_add_devices(real6410_devices, ARRAY_SIZE(real6410_devices));
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328}
329
330MACHINE_START(REAL6410, "REAL6410")
331 /* Maintainer: Darius Augulis <augulis.darius@gmail.com> */
170a5908 332 .atag_offset = 0x100,
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333
334 .init_irq = s3c6410_init_irq,
335 .map_io = real6410_map_io,
336 .init_machine = real6410_machine_init,
cc8f252b 337 .init_late = s3c64xx_init_late,
04a49b71 338 .init_time = samsung_timer_init,
ff84ded2 339 .restart = s3c64xx_restart,
eab5cfa0 340MACHINE_END