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eab5cfa0 DA |
1 | /* linux/arch/arm/mach-s3c64xx/mach-real6410.c |
2 | * | |
3 | * Copyright 2010 Darius Augulis <augulis.darius@gmail.com> | |
4 | * Copyright 2008 Openmoko, Inc. | |
5 | * Copyright 2008 Simtec Electronics | |
6 | * Ben Dooks <ben@simtec.co.uk> | |
7 | * http://armlinux.simtec.co.uk/ | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License version 2 as | |
11 | * published by the Free Software Foundation. | |
12 | * | |
13 | */ | |
14 | ||
c115f67c | 15 | #include <linux/init.h> |
eab5cfa0 | 16 | #include <linux/interrupt.h> |
c115f67c DA |
17 | #include <linux/fb.h> |
18 | #include <linux/gpio.h> | |
19 | #include <linux/kernel.h> | |
eab5cfa0 | 20 | #include <linux/list.h> |
ff266c0c | 21 | #include <linux/dm9000.h> |
88fbadea DA |
22 | #include <linux/mtd/mtd.h> |
23 | #include <linux/mtd/partitions.h> | |
eab5cfa0 | 24 | #include <linux/platform_device.h> |
c115f67c DA |
25 | #include <linux/serial_core.h> |
26 | #include <linux/types.h> | |
27 | ||
eab5cfa0 DA |
28 | #include <asm/mach-types.h> |
29 | #include <asm/mach/arch.h> | |
30 | #include <asm/mach/map.h> | |
c115f67c | 31 | |
eab5cfa0 | 32 | #include <mach/map.h> |
c115f67c DA |
33 | #include <mach/regs-fb.h> |
34 | #include <mach/regs-gpio.h> | |
35 | #include <mach/regs-modem.h> | |
ff266c0c | 36 | #include <mach/regs-srom.h> |
c115f67c DA |
37 | #include <mach/s3c6410.h> |
38 | ||
4374c456 | 39 | #include <plat/adc.h> |
eab5cfa0 | 40 | #include <plat/cpu.h> |
ce611d7b | 41 | #include <plat/devs.h> |
c115f67c | 42 | #include <plat/fb.h> |
88fbadea | 43 | #include <plat/nand.h> |
eab5cfa0 | 44 | #include <plat/regs-serial.h> |
4374c456 | 45 | #include <plat/ts.h> |
eab5cfa0 | 46 | |
c115f67c DA |
47 | #include <video/platform_lcd.h> |
48 | ||
591cd25e DA |
49 | #define UCON (S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK) |
50 | #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB) | |
51 | #define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE) | |
eab5cfa0 DA |
52 | |
53 | static struct s3c2410_uartcfg real6410_uartcfgs[] __initdata = { | |
54 | [0] = { | |
591cd25e DA |
55 | .hwport = 0, |
56 | .flags = 0, | |
57 | .ucon = UCON, | |
58 | .ulcon = ULCON, | |
59 | .ufcon = UFCON, | |
eab5cfa0 DA |
60 | }, |
61 | [1] = { | |
591cd25e DA |
62 | .hwport = 1, |
63 | .flags = 0, | |
64 | .ucon = UCON, | |
65 | .ulcon = ULCON, | |
66 | .ufcon = UFCON, | |
eab5cfa0 DA |
67 | }, |
68 | [2] = { | |
591cd25e DA |
69 | .hwport = 2, |
70 | .flags = 0, | |
71 | .ucon = UCON, | |
72 | .ulcon = ULCON, | |
73 | .ufcon = UFCON, | |
eab5cfa0 DA |
74 | }, |
75 | [3] = { | |
591cd25e DA |
76 | .hwport = 3, |
77 | .flags = 0, | |
78 | .ucon = UCON, | |
79 | .ulcon = ULCON, | |
80 | .ufcon = UFCON, | |
eab5cfa0 DA |
81 | }, |
82 | }; | |
83 | ||
ff266c0c DA |
84 | /* DM9000AEP 10/100 ethernet controller */ |
85 | ||
86 | static struct resource real6410_dm9k_resource[] = { | |
591cd25e DA |
87 | [0] = { |
88 | .start = S3C64XX_PA_XM0CSN1, | |
89 | .end = S3C64XX_PA_XM0CSN1 + 1, | |
90 | .flags = IORESOURCE_MEM | |
91 | }, | |
92 | [1] = { | |
93 | .start = S3C64XX_PA_XM0CSN1 + 4, | |
94 | .end = S3C64XX_PA_XM0CSN1 + 5, | |
95 | .flags = IORESOURCE_MEM | |
96 | }, | |
97 | [2] = { | |
98 | .start = S3C_EINT(7), | |
99 | .end = S3C_EINT(7), | |
4d89ecaa | 100 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL |
591cd25e | 101 | } |
ff266c0c DA |
102 | }; |
103 | ||
104 | static struct dm9000_plat_data real6410_dm9k_pdata = { | |
591cd25e | 105 | .flags = (DM9000_PLATF_16BITONLY | DM9000_PLATF_NO_EEPROM), |
ff266c0c DA |
106 | }; |
107 | ||
108 | static struct platform_device real6410_device_eth = { | |
591cd25e DA |
109 | .name = "dm9000", |
110 | .id = -1, | |
111 | .num_resources = ARRAY_SIZE(real6410_dm9k_resource), | |
112 | .resource = real6410_dm9k_resource, | |
113 | .dev = { | |
114 | .platform_data = &real6410_dm9k_pdata, | |
115 | }, | |
ff266c0c DA |
116 | }; |
117 | ||
c115f67c DA |
118 | static struct s3c_fb_pd_win real6410_fb_win[] = { |
119 | { | |
120 | .win_mode = { /* 4.3" 480x272 */ | |
121 | .left_margin = 3, | |
122 | .right_margin = 2, | |
123 | .upper_margin = 1, | |
124 | .lower_margin = 1, | |
125 | .hsync_len = 40, | |
126 | .vsync_len = 1, | |
127 | .xres = 480, | |
128 | .yres = 272, | |
129 | }, | |
130 | .max_bpp = 32, | |
131 | .default_bpp = 16, | |
132 | }, { | |
133 | .win_mode = { /* 7.0" 800x480 */ | |
134 | .left_margin = 8, | |
135 | .right_margin = 13, | |
136 | .upper_margin = 7, | |
137 | .lower_margin = 5, | |
138 | .hsync_len = 3, | |
139 | .vsync_len = 1, | |
140 | .xres = 800, | |
141 | .yres = 480, | |
142 | }, | |
143 | .max_bpp = 32, | |
144 | .default_bpp = 16, | |
145 | }, | |
146 | }; | |
147 | ||
148 | static struct s3c_fb_platdata real6410_lcd_pdata __initdata = { | |
149 | .setup_gpio = s3c64xx_fb_gpio_setup_24bpp, | |
150 | .win[0] = &real6410_fb_win[0], | |
151 | .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB, | |
152 | .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC, | |
153 | }; | |
154 | ||
88fbadea DA |
155 | static struct mtd_partition real6410_nand_part[] = { |
156 | [0] = { | |
157 | .name = "uboot", | |
158 | .size = SZ_1M, | |
159 | .offset = 0, | |
160 | }, | |
161 | [1] = { | |
162 | .name = "kernel", | |
163 | .size = SZ_2M, | |
164 | .offset = SZ_1M, | |
165 | }, | |
166 | [2] = { | |
167 | .name = "rootfs", | |
168 | .size = MTDPART_SIZ_FULL, | |
169 | .offset = SZ_1M + SZ_2M, | |
170 | }, | |
171 | }; | |
172 | ||
173 | static struct s3c2410_nand_set real6410_nand_sets[] = { | |
174 | [0] = { | |
175 | .name = "nand", | |
176 | .nr_chips = 1, | |
177 | .nr_partitions = ARRAY_SIZE(real6410_nand_part), | |
178 | .partitions = real6410_nand_part, | |
179 | }, | |
180 | }; | |
181 | ||
182 | static struct s3c2410_platform_nand real6410_nand_info = { | |
183 | .tacls = 25, | |
184 | .twrph0 = 55, | |
185 | .twrph1 = 40, | |
186 | .nr_sets = ARRAY_SIZE(real6410_nand_sets), | |
187 | .sets = real6410_nand_sets, | |
188 | }; | |
189 | ||
ff266c0c DA |
190 | static struct platform_device *real6410_devices[] __initdata = { |
191 | &real6410_device_eth, | |
ce611d7b DA |
192 | &s3c_device_hsmmc0, |
193 | &s3c_device_hsmmc1, | |
c115f67c | 194 | &s3c_device_fb, |
88fbadea | 195 | &s3c_device_nand, |
4374c456 DA |
196 | &s3c_device_adc, |
197 | &s3c_device_ts, | |
198 | }; | |
199 | ||
200 | static struct s3c2410_ts_mach_info s3c_ts_platform __initdata = { | |
201 | .delay = 10000, | |
202 | .presc = 49, | |
203 | .oversampling_shift = 2, | |
ff266c0c DA |
204 | }; |
205 | ||
eab5cfa0 DA |
206 | static void __init real6410_map_io(void) |
207 | { | |
c115f67c DA |
208 | u32 tmp; |
209 | ||
eab5cfa0 DA |
210 | s3c64xx_init_io(NULL, 0); |
211 | s3c24xx_init_clocks(12000000); | |
212 | s3c24xx_init_uarts(real6410_uartcfgs, ARRAY_SIZE(real6410_uartcfgs)); | |
c115f67c DA |
213 | |
214 | /* set the LCD type */ | |
215 | tmp = __raw_readl(S3C64XX_SPCON); | |
216 | tmp &= ~S3C64XX_SPCON_LCD_SEL_MASK; | |
217 | tmp |= S3C64XX_SPCON_LCD_SEL_RGB; | |
218 | __raw_writel(tmp, S3C64XX_SPCON); | |
219 | ||
220 | /* remove the LCD bypass */ | |
221 | tmp = __raw_readl(S3C64XX_MODEM_MIFPCON); | |
222 | tmp &= ~MIFPCON_LCD_BYPASS; | |
223 | __raw_writel(tmp, S3C64XX_MODEM_MIFPCON); | |
224 | } | |
225 | ||
226 | /* | |
227 | * real6410_features string | |
228 | * | |
229 | * 0-9 LCD configuration | |
230 | * | |
231 | */ | |
232 | static char real6410_features_str[12] __initdata = "0"; | |
233 | ||
234 | static int __init real6410_features_setup(char *str) | |
235 | { | |
236 | if (str) | |
237 | strlcpy(real6410_features_str, str, | |
238 | sizeof(real6410_features_str)); | |
239 | return 1; | |
240 | } | |
241 | ||
242 | __setup("real6410=", real6410_features_setup); | |
243 | ||
244 | #define FEATURE_SCREEN (1 << 0) | |
245 | ||
246 | struct real6410_features_t { | |
247 | int done; | |
248 | int lcd_index; | |
249 | }; | |
250 | ||
251 | static void real6410_parse_features( | |
252 | struct real6410_features_t *features, | |
253 | const char *features_str) | |
254 | { | |
255 | const char *fp = features_str; | |
256 | ||
257 | features->done = 0; | |
258 | features->lcd_index = 0; | |
259 | ||
260 | while (*fp) { | |
261 | char f = *fp++; | |
262 | ||
263 | switch (f) { | |
264 | case '0'...'9': /* tft screen */ | |
265 | if (features->done & FEATURE_SCREEN) { | |
266 | printk(KERN_INFO "REAL6410: '%c' ignored, " | |
267 | "screen type already set\n", f); | |
268 | } else { | |
269 | int li = f - '0'; | |
270 | if (li >= ARRAY_SIZE(real6410_fb_win)) | |
271 | printk(KERN_INFO "REAL6410: '%c' out " | |
272 | "of range LCD mode\n", f); | |
273 | else { | |
274 | features->lcd_index = li; | |
275 | } | |
276 | } | |
277 | features->done |= FEATURE_SCREEN; | |
278 | break; | |
279 | } | |
280 | } | |
eab5cfa0 DA |
281 | } |
282 | ||
283 | static void __init real6410_machine_init(void) | |
284 | { | |
ff266c0c | 285 | u32 cs1; |
c115f67c DA |
286 | struct real6410_features_t features = { 0 }; |
287 | ||
288 | printk(KERN_INFO "REAL6410: Option string real6410=%s\n", | |
289 | real6410_features_str); | |
290 | ||
291 | /* Parse the feature string */ | |
292 | real6410_parse_features(&features, real6410_features_str); | |
293 | ||
294 | real6410_lcd_pdata.win[0] = &real6410_fb_win[features.lcd_index]; | |
295 | ||
296 | printk(KERN_INFO "REAL6410: selected LCD display is %dx%d\n", | |
297 | real6410_lcd_pdata.win[0]->win_mode.xres, | |
298 | real6410_lcd_pdata.win[0]->win_mode.yres); | |
299 | ||
300 | s3c_fb_set_platdata(&real6410_lcd_pdata); | |
88fbadea | 301 | s3c_nand_set_platdata(&real6410_nand_info); |
4374c456 | 302 | s3c24xx_ts_set_platdata(&s3c_ts_platform); |
ff266c0c DA |
303 | |
304 | /* configure nCS1 width to 16 bits */ | |
305 | ||
306 | cs1 = __raw_readl(S3C64XX_SROM_BW) & | |
307 | ~(S3C64XX_SROM_BW__CS_MASK << S3C64XX_SROM_BW__NCS1__SHIFT); | |
308 | cs1 |= ((1 << S3C64XX_SROM_BW__DATAWIDTH__SHIFT) | | |
309 | (1 << S3C64XX_SROM_BW__WAITENABLE__SHIFT) | | |
310 | (1 << S3C64XX_SROM_BW__BYTEENABLE__SHIFT)) << | |
311 | S3C64XX_SROM_BW__NCS1__SHIFT; | |
312 | __raw_writel(cs1, S3C64XX_SROM_BW); | |
313 | ||
314 | /* set timing for nCS1 suitable for ethernet chip */ | |
315 | ||
316 | __raw_writel((0 << S3C64XX_SROM_BCX__PMC__SHIFT) | | |
591cd25e DA |
317 | (6 << S3C64XX_SROM_BCX__TACP__SHIFT) | |
318 | (4 << S3C64XX_SROM_BCX__TCAH__SHIFT) | | |
319 | (1 << S3C64XX_SROM_BCX__TCOH__SHIFT) | | |
320 | (13 << S3C64XX_SROM_BCX__TACC__SHIFT) | | |
321 | (4 << S3C64XX_SROM_BCX__TCOS__SHIFT) | | |
322 | (0 << S3C64XX_SROM_BCX__TACS__SHIFT), S3C64XX_SROM_BC1); | |
ff266c0c | 323 | |
c115f67c DA |
324 | gpio_request(S3C64XX_GPF(15), "LCD power"); |
325 | ||
ff266c0c | 326 | platform_add_devices(real6410_devices, ARRAY_SIZE(real6410_devices)); |
eab5cfa0 DA |
327 | } |
328 | ||
329 | MACHINE_START(REAL6410, "REAL6410") | |
330 | /* Maintainer: Darius Augulis <augulis.darius@gmail.com> */ | |
331 | .phys_io = S3C_PA_UART & 0xfff00000, | |
332 | .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc, | |
333 | .boot_params = S3C64XX_PA_SDRAM + 0x100, | |
334 | ||
335 | .init_irq = s3c6410_init_irq, | |
336 | .map_io = real6410_map_io, | |
337 | .init_machine = real6410_machine_init, | |
338 | .timer = &s3c24xx_timer, | |
339 | MACHINE_END |