[mirror_ubuntu-zesty-kernel.git] / arch / arm / mach-s3c64xx / mach-smdk6410.c

/* linux/arch/arm/mach-s3c64xx/mach-smdk6410.c
 *
 * Copyright 2008 Openmoko, Inc.
 * Copyright 2008 Simtec Electronics
 *	Ben Dooks <ben@simtec.co.uk>
 *	http://armlinux.simtec.co.uk/
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
*/

#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/interrupt.h>
#include <linux/list.h>
#include <linux/timer.h>
#include <linux/init.h>
#include <linux/input.h>
#include <linux/serial_core.h>
#include <linux/platform_device.h>
#include <linux/io.h>
#include <linux/i2c.h>
#include <linux/leds.h>
#include <linux/fb.h>
#include <linux/gpio.h>
#include <linux/delay.h>
#include <linux/smsc911x.h>
#include <linux/regulator/fixed.h>
#include <linux/regulator/machine.h>
#include <linux/pwm_backlight.h>

#ifdef CONFIG_SMDK6410_WM1190_EV1
#include <linux/mfd/wm8350/core.h>
#include <linux/mfd/wm8350/pmic.h>
#endif

#ifdef CONFIG_SMDK6410_WM1192_EV1
#include <linux/mfd/wm831x/core.h>
#include <linux/mfd/wm831x/pdata.h>
#endif

#include <video/platform_lcd.h>

#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/irq.h>

#include <mach/hardware.h>
#include <mach/map.h>

#include <asm/irq.h>
#include <asm/mach-types.h>

#include <plat/regs-serial.h>
#include <mach/regs-modem.h>
#include <mach/regs-gpio.h>
#include <mach/regs-sys.h>
#include <mach/regs-srom.h>
#include <plat/ata.h>
#include <plat/iic.h>
#include <plat/fb.h>
#include <plat/gpio-cfg.h>

#include <plat/s3c6410.h>
#include <plat/clock.h>
#include <plat/devs.h>
#include <plat/cpu.h>
#include <plat/adc.h>
#include <plat/ts.h>
#include <plat/keypad.h>
#include <plat/backlight.h>
#include <plat/regs-fb-v4.h>

#define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE

static struct s3c2410_uartcfg smdk6410_uartcfgs[] __initdata = {
	[0] = {
		.hwport	     = 0,
		.flags	     = 0,
		.ucon	     = UCON,
		.ulcon	     = ULCON,
		.ufcon	     = UFCON,
	},
	[1] = {
		.hwport	     = 1,
		.flags	     = 0,
		.ucon	     = UCON,
		.ulcon	     = ULCON,
		.ufcon	     = UFCON,
	},
	[2] = {
		.hwport	     = 2,
		.flags	     = 0,
		.ucon	     = UCON,
		.ulcon	     = ULCON,
		.ufcon	     = UFCON,
	},
	[3] = {
		.hwport	     = 3,
		.flags	     = 0,
		.ucon	     = UCON,
		.ulcon	     = ULCON,
		.ufcon	     = UFCON,
	},
};

/* framebuffer and LCD setup. */

/* GPF15 = LCD backlight control
 * GPF13 => Panel power
 * GPN5 = LCD nRESET signal
 * PWM_TOUT1 => backlight brightness
 */

static void smdk6410_lcd_power_set(struct plat_lcd_data *pd,
				   unsigned int power)
{
	if (power) {
		gpio_direction_output(S3C64XX_GPF(13), 1);

		/* fire nRESET on power up */
		gpio_direction_output(S3C64XX_GPN(5), 0);
		msleep(10);
		gpio_direction_output(S3C64XX_GPN(5), 1);
		msleep(1);
	} else {
		gpio_direction_output(S3C64XX_GPF(13), 0);
	}
}

static struct plat_lcd_data smdk6410_lcd_power_data = {
	.set_power	= smdk6410_lcd_power_set,
};

static struct platform_device smdk6410_lcd_powerdev = {
	.name			= "platform-lcd",
	.dev.parent		= &s3c_device_fb.dev,
	.dev.platform_data	= &smdk6410_lcd_power_data,
};

static struct s3c_fb_pd_win smdk6410_fb_win0 = {
	/* this is to ensure we use win0 */
	.win_mode	= {
		.left_margin	= 8,
		.right_margin	= 13,
		.upper_margin	= 7,
		.lower_margin	= 5,
		.hsync_len	= 3,
		.vsync_len	= 1,
		.xres		= 800,
		.yres		= 480,
	},
	.max_bpp	= 32,
	.default_bpp	= 16,
	.virtual_y	= 480 * 2,
	.virtual_x	= 800,
};

/* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */
static struct s3c_fb_platdata smdk6410_lcd_pdata __initdata = {
	.setup_gpio	= s3c64xx_fb_gpio_setup_24bpp,
	.win[0]		= &smdk6410_fb_win0,
	.vidcon0	= VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
	.vidcon1	= VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
};

/*
 * Configuring Ethernet on SMDK6410
 *
 * Both CS8900A and LAN9115 chips share one chip select mediated by CFG6.
 * The constant address below corresponds to nCS1
 *
 *  1) Set CFGB2 p3 ON others off, no other CFGB selects "ethernet"
 *  2) CFG6 needs to be switched to "LAN9115" side
 */

static struct resource smdk6410_smsc911x_resources[] = {
	[0] = {
		.start = S3C64XX_PA_XM0CSN1,
		.end   = S3C64XX_PA_XM0CSN1 + SZ_64K - 1,
		.flags = IORESOURCE_MEM,
	},
	[1] = {
		.start = S3C_EINT(10),
		.end   = S3C_EINT(10),
		.flags = IORESOURCE_IRQ | IRQ_TYPE_LEVEL_LOW,
	},
};

static struct smsc911x_platform_config smdk6410_smsc911x_pdata = {
	.irq_polarity  = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
	.irq_type      = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
	.flags         = SMSC911X_USE_32BIT | SMSC911X_FORCE_INTERNAL_PHY,
	.phy_interface = PHY_INTERFACE_MODE_MII,
};


static struct platform_device smdk6410_smsc911x = {
	.name          = "smsc911x",
	.id            = -1,
	.num_resources = ARRAY_SIZE(smdk6410_smsc911x_resources),
	.resource      = &smdk6410_smsc911x_resources[0],
	.dev = {
		.platform_data = &smdk6410_smsc911x_pdata,
	},
};

#ifdef CONFIG_REGULATOR
static struct regulator_consumer_supply smdk6410_b_pwr_5v_consumers[] __initdata = {
	REGULATOR_SUPPLY("PVDD", "0-001b"),
	REGULATOR_SUPPLY("AVDD", "0-001b"),
};

static struct regulator_init_data smdk6410_b_pwr_5v_data = {
	.constraints = {
		.always_on = 1,
	},
	.num_consumer_supplies = ARRAY_SIZE(smdk6410_b_pwr_5v_consumers),
	.consumer_supplies = smdk6410_b_pwr_5v_consumers,
};

static struct fixed_voltage_config smdk6410_b_pwr_5v_pdata = {
	.supply_name = "B_PWR_5V",
	.microvolts = 5000000,
	.init_data = &smdk6410_b_pwr_5v_data,
	.gpio = -EINVAL,
};

static struct platform_device smdk6410_b_pwr_5v = {
	.name          = "reg-fixed-voltage",
	.id            = -1,
	.dev = {
		.platform_data = &smdk6410_b_pwr_5v_pdata,
	},
};
#endif

static struct s3c_ide_platdata smdk6410_ide_pdata __initdata = {
	.setup_gpio	= s3c64xx_ide_setup_gpio,
};

static uint32_t smdk6410_keymap[] __initdata = {
	/* KEY(row, col, keycode) */
	KEY(0, 3, KEY_1), KEY(0, 4, KEY_2), KEY(0, 5, KEY_3),
	KEY(0, 6, KEY_4), KEY(0, 7, KEY_5),
	KEY(1, 3, KEY_A), KEY(1, 4, KEY_B), KEY(1, 5, KEY_C),
	KEY(1, 6, KEY_D), KEY(1, 7, KEY_E)
};

static struct matrix_keymap_data smdk6410_keymap_data __initdata = {
	.keymap		= smdk6410_keymap,
	.keymap_size	= ARRAY_SIZE(smdk6410_keymap),
};

static struct samsung_keypad_platdata smdk6410_keypad_data __initdata = {
	.keymap_data	= &smdk6410_keymap_data,
	.rows		= 2,
	.cols		= 8,
};

static struct map_desc smdk6410_iodesc[] = {};

static struct platform_device *smdk6410_devices[] __initdata = {
#ifdef CONFIG_SMDK6410_SD_CH0
	&s3c_device_hsmmc0,
#endif
#ifdef CONFIG_SMDK6410_SD_CH1
	&s3c_device_hsmmc1,
#endif
	&s3c_device_i2c0,
	&s3c_device_i2c1,
	&s3c_device_fb,
	&s3c_device_ohci,
	&s3c_device_usb_hsotg,
	&samsung_asoc_dma,
	&s3c64xx_device_iisv4,
	&samsung_device_keypad,

#ifdef CONFIG_REGULATOR
	&smdk6410_b_pwr_5v,
#endif
	&smdk6410_lcd_powerdev,

	&smdk6410_smsc911x,
	&s3c_device_adc,
	&s3c_device_cfcon,
	&s3c_device_rtc,
	&s3c_device_ts,
	&s3c_device_wdt,
};

#ifdef CONFIG_REGULATOR
/* ARM core */
static struct regulator_consumer_supply smdk6410_vddarm_consumers[] = {
	REGULATOR_SUPPLY("vddarm", NULL),
};

/* VDDARM, BUCK1 on J5 */
static struct regulator_init_data smdk6410_vddarm = {
	.constraints = {
		.name = "PVDD_ARM",
		.min_uV = 1000000,
		.max_uV = 1300000,
		.always_on = 1,
		.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
	},
	.num_consumer_supplies = ARRAY_SIZE(smdk6410_vddarm_consumers),
	.consumer_supplies = smdk6410_vddarm_consumers,
};

/* VDD_INT, BUCK2 on J5 */
static struct regulator_init_data smdk6410_vddint = {
	.constraints = {
		.name = "PVDD_INT",
		.min_uV = 1000000,
		.max_uV = 1200000,
		.always_on = 1,
		.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
	},
};

/* VDD_HI, LDO3 on J5 */
static struct regulator_init_data smdk6410_vddhi = {
	.constraints = {
		.name = "PVDD_HI",
		.always_on = 1,
	},
};

/* VDD_PLL, LDO2 on J5 */
static struct regulator_init_data smdk6410_vddpll = {
	.constraints = {
		.name = "PVDD_PLL",
		.always_on = 1,
	},
};

/* VDD_UH_MMC, LDO5 on J5 */
static struct regulator_init_data smdk6410_vdduh_mmc = {
	.constraints = {
		.name = "PVDD_UH+PVDD_MMC",
		.always_on = 1,
	},
};

/* VCCM3BT, LDO8 on J5 */
static struct regulator_init_data smdk6410_vccmc3bt = {
	.constraints = {
		.name = "PVCCM3BT",
		.always_on = 1,
	},
};

/* VCCM2MTV, LDO11 on J5 */
static struct regulator_init_data smdk6410_vccm2mtv = {
	.constraints = {
		.name = "PVCCM2MTV",
		.always_on = 1,
	},
};

/* VDD_LCD, LDO12 on J5 */
static struct regulator_init_data smdk6410_vddlcd = {
	.constraints = {
		.name = "PVDD_LCD",
		.always_on = 1,
	},
};

/* VDD_OTGI, LDO9 on J5 */
static struct regulator_init_data smdk6410_vddotgi = {
	.constraints = {
		.name = "PVDD_OTGI",
		.always_on = 1,
	},
};

/* VDD_OTG, LDO14 on J5 */
static struct regulator_init_data smdk6410_vddotg = {
	.constraints = {
		.name = "PVDD_OTG",
		.always_on = 1,
	},
};

/* VDD_ALIVE, LDO15 on J5 */
static struct regulator_init_data smdk6410_vddalive = {
	.constraints = {
		.name = "PVDD_ALIVE",
		.always_on = 1,
	},
};

/* VDD_AUDIO, VLDO_AUDIO on J5 */
static struct regulator_init_data smdk6410_vddaudio = {
	.constraints = {
		.name = "PVDD_AUDIO",
		.always_on = 1,
	},
};
#endif

#ifdef CONFIG_SMDK6410_WM1190_EV1
/* S3C64xx internal logic & PLL */
static struct regulator_init_data wm8350_dcdc1_data = {
	.constraints = {
		.name = "PVDD_INT+PVDD_PLL",
		.min_uV = 1200000,
		.max_uV = 1200000,
		.always_on = 1,
		.apply_uV = 1,
	},
};

/* Memory */
static struct regulator_init_data wm8350_dcdc3_data = {
	.constraints = {
		.name = "PVDD_MEM",
		.min_uV = 1800000,
		.max_uV = 1800000,
		.always_on = 1,
		.state_mem = {
			 .uV = 1800000,
			 .mode = REGULATOR_MODE_NORMAL,
			 .enabled = 1,
		},
		.initial_state = PM_SUSPEND_MEM,
	},
};

/* USB, EXT, PCM, ADC/DAC, USB, MMC */
static struct regulator_consumer_supply wm8350_dcdc4_consumers[] = {
	REGULATOR_SUPPLY("DVDD", "0-001b"),
};

static struct regulator_init_data wm8350_dcdc4_data = {
	.constraints = {
		.name = "PVDD_HI+PVDD_EXT+PVDD_SYS+PVCCM2MTV",
		.min_uV = 3000000,
		.max_uV = 3000000,
		.always_on = 1,
	},
	.num_consumer_supplies = ARRAY_SIZE(wm8350_dcdc4_consumers),
	.consumer_supplies = wm8350_dcdc4_consumers,
};

/* OTGi/1190-EV1 HPVDD & AVDD */
static struct regulator_init_data wm8350_ldo4_data = {
	.constraints = {
		.name = "PVDD_OTGI+HPVDD+AVDD",
		.min_uV = 1200000,
		.max_uV = 1200000,
		.apply_uV = 1,
		.always_on = 1,
	},
};

static struct {
	int regulator;
	struct regulator_init_data *initdata;
} wm1190_regulators[] = {
	{ WM8350_DCDC_1, &wm8350_dcdc1_data },
	{ WM8350_DCDC_3, &wm8350_dcdc3_data },
	{ WM8350_DCDC_4, &wm8350_dcdc4_data },
	{ WM8350_DCDC_6, &smdk6410_vddarm },
	{ WM8350_LDO_1, &smdk6410_vddalive },
	{ WM8350_LDO_2, &smdk6410_vddotg },
	{ WM8350_LDO_3, &smdk6410_vddlcd },
	{ WM8350_LDO_4, &wm8350_ldo4_data },
};

static int __init smdk6410_wm8350_init(struct wm8350 *wm8350)
{
	int i;

	/* Configure the IRQ line */
	s3c_gpio_setpull(S3C64XX_GPN(12), S3C_GPIO_PULL_UP);

	/* Instantiate the regulators */
	for (i = 0; i < ARRAY_SIZE(wm1190_regulators); i++)
		wm8350_register_regulator(wm8350,
					  wm1190_regulators[i].regulator,
					  wm1190_regulators[i].initdata);

	return 0;
}

static struct wm8350_platform_data __initdata smdk6410_wm8350_pdata = {
	.init = smdk6410_wm8350_init,
	.irq_high = 1,
	.irq_base = IRQ_BOARD_START,
};
#endif

#ifdef CONFIG_SMDK6410_WM1192_EV1
static struct gpio_led wm1192_pmic_leds[] = {
	{
		.name = "PMIC:red:power",
		.gpio = GPIO_BOARD_START + 3,
		.default_state = LEDS_GPIO_DEFSTATE_ON,
	},
};

static struct gpio_led_platform_data wm1192_pmic_led = {
	.num_leds = ARRAY_SIZE(wm1192_pmic_leds),
	.leds = wm1192_pmic_leds,
};

static struct platform_device wm1192_pmic_led_dev = {
	.name          = "leds-gpio",
	.id            = -1,
	.dev = {
		.platform_data = &wm1192_pmic_led,
	},
};

static int wm1192_pre_init(struct wm831x *wm831x)
{
	int ret;

	/* Configure the IRQ line */
	s3c_gpio_setpull(S3C64XX_GPN(12), S3C_GPIO_PULL_UP);

	ret = platform_device_register(&wm1192_pmic_led_dev);
	if (ret != 0)
		dev_err(wm831x->dev, "Failed to add PMIC LED: %d\n", ret);

	return 0;
}

static struct wm831x_backlight_pdata wm1192_backlight_pdata = {
	.isink = 1,
	.max_uA = 27554,
};

static struct regulator_init_data wm1192_dcdc3 = {
	.constraints = {
		.name = "PVDD_MEM+PVDD_GPS",
		.always_on = 1,
	},
};

static struct regulator_consumer_supply wm1192_ldo1_consumers[] = {
	REGULATOR_SUPPLY("DVDD", "0-001b"),   /* WM8580 */
};

static struct regulator_init_data wm1192_ldo1 = {
	.constraints = {
		.name = "PVDD_LCD+PVDD_EXT",
		.always_on = 1,
	},
	.consumer_supplies = wm1192_ldo1_consumers,
	.num_consumer_supplies = ARRAY_SIZE(wm1192_ldo1_consumers),
};

static struct wm831x_status_pdata wm1192_led7_pdata = {
	.name = "LED7:green:",
};

static struct wm831x_status_pdata wm1192_led8_pdata = {
	.name = "LED8:green:",
};

static struct wm831x_pdata smdk6410_wm1192_pdata = {
	.pre_init = wm1192_pre_init,
	.irq_base = IRQ_BOARD_START,

	.backlight = &wm1192_backlight_pdata,
	.dcdc = {
		&smdk6410_vddarm,  /* DCDC1 */
		&smdk6410_vddint,  /* DCDC2 */
		&wm1192_dcdc3,
	},
	.gpio_base = GPIO_BOARD_START,
	.ldo = {
		 &wm1192_ldo1,        /* LDO1 */
		 &smdk6410_vdduh_mmc, /* LDO2 */
		 NULL,                /* LDO3 NC */
		 &smdk6410_vddotgi,   /* LDO4 */
		 &smdk6410_vddotg,    /* LDO5 */
		 &smdk6410_vddhi,     /* LDO6 */
		 &smdk6410_vddaudio,  /* LDO7 */
		 &smdk6410_vccm2mtv,  /* LDO8 */
		 &smdk6410_vddpll,    /* LDO9 */
		 &smdk6410_vccmc3bt,  /* LDO10 */
		 &smdk6410_vddalive,  /* LDO11 */
	},
	.status = {
		&wm1192_led7_pdata,
		&wm1192_led8_pdata,
	},
};
#endif

static struct i2c_board_info i2c_devs0[] __initdata = {
	{ I2C_BOARD_INFO("24c08", 0x50), },
	{ I2C_BOARD_INFO("wm8580", 0x1b), },

#ifdef CONFIG_SMDK6410_WM1192_EV1
	{ I2C_BOARD_INFO("wm8312", 0x34),
	  .platform_data = &smdk6410_wm1192_pdata,
	  .irq = S3C_EINT(12),
	},
#endif

#ifdef CONFIG_SMDK6410_WM1190_EV1
	{ I2C_BOARD_INFO("wm8350", 0x1a),
	  .platform_data = &smdk6410_wm8350_pdata,
	  .irq = S3C_EINT(12),
	},
#endif
};

static struct i2c_board_info i2c_devs1[] __initdata = {
	{ I2C_BOARD_INFO("24c128", 0x57), },	/* Samsung S524AD0XD1 */
};

/* LCD Backlight data */
static struct samsung_bl_gpio_info smdk6410_bl_gpio_info = {
	.no = S3C64XX_GPF(15),
	.func = S3C_GPIO_SFN(2),
};

static struct platform_pwm_backlight_data smdk6410_bl_data = {
	.pwm_id = 1,
};

static void __init smdk6410_map_io(void)
{
	u32 tmp;

	s3c64xx_init_io(smdk6410_iodesc, ARRAY_SIZE(smdk6410_iodesc));
	s3c24xx_init_clocks(12000000);
	s3c24xx_init_uarts(smdk6410_uartcfgs, ARRAY_SIZE(smdk6410_uartcfgs));

	/* set the LCD type */

	tmp = __raw_readl(S3C64XX_SPCON);
	tmp &= ~S3C64XX_SPCON_LCD_SEL_MASK;
	tmp |= S3C64XX_SPCON_LCD_SEL_RGB;
	__raw_writel(tmp, S3C64XX_SPCON);

	/* remove the lcd bypass */
	tmp = __raw_readl(S3C64XX_MODEM_MIFPCON);
	tmp &= ~MIFPCON_LCD_BYPASS;
	__raw_writel(tmp, S3C64XX_MODEM_MIFPCON);
}

static void __init smdk6410_machine_init(void)
{
	u32 cs1;

	s3c_i2c0_set_platdata(NULL);
	s3c_i2c1_set_platdata(NULL);
	s3c_fb_set_platdata(&smdk6410_lcd_pdata);

	samsung_keypad_set_platdata(&smdk6410_keypad_data);

	s3c24xx_ts_set_platdata(NULL);

	/* configure nCS1 width to 16 bits */

	cs1 = __raw_readl(S3C64XX_SROM_BW) &
		    ~(S3C64XX_SROM_BW__CS_MASK << S3C64XX_SROM_BW__NCS1__SHIFT);
	cs1 |= ((1 << S3C64XX_SROM_BW__DATAWIDTH__SHIFT) |
		(1 << S3C64XX_SROM_BW__WAITENABLE__SHIFT) |
		(1 << S3C64XX_SROM_BW__BYTEENABLE__SHIFT)) <<
						   S3C64XX_SROM_BW__NCS1__SHIFT;
	__raw_writel(cs1, S3C64XX_SROM_BW);

	/* set timing for nCS1 suitable for ethernet chip */

	__raw_writel((0 << S3C64XX_SROM_BCX__PMC__SHIFT) |
		     (6 << S3C64XX_SROM_BCX__TACP__SHIFT) |
		     (4 << S3C64XX_SROM_BCX__TCAH__SHIFT) |
		     (1 << S3C64XX_SROM_BCX__TCOH__SHIFT) |
		     (0xe << S3C64XX_SROM_BCX__TACC__SHIFT) |
		     (4 << S3C64XX_SROM_BCX__TCOS__SHIFT) |
		     (0 << S3C64XX_SROM_BCX__TACS__SHIFT), S3C64XX_SROM_BC1);

	gpio_request(S3C64XX_GPN(5), "LCD power");
	gpio_request(S3C64XX_GPF(13), "LCD power");

	i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
	i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));

	s3c_ide_set_platdata(&smdk6410_ide_pdata);

	samsung_bl_set(&smdk6410_bl_gpio_info, &smdk6410_bl_data);

	platform_add_devices(smdk6410_devices, ARRAY_SIZE(smdk6410_devices));
}

MACHINE_START(SMDK6410, "SMDK6410")
	/* Maintainer: Ben Dooks <ben-linux@fluff.org> */
	.atag_offset	= 0x100,

	.init_irq	= s3c6410_init_irq,
	.map_io		= smdk6410_map_io,
	.init_machine	= smdk6410_machine_init,
	.timer		= &s3c24xx_timer,
MACHINE_END
Commit	Line	Data
431107ea	1	/* linux/arch/arm/mach-s3c64xx/mach-smdk6410.c
5718df9d BD	2	*
	3	* Copyright 2008 Openmoko, Inc.
	4	* Copyright 2008 Simtec Electronics
	5	* Ben Dooks <ben@simtec.co.uk>
	6	* http://armlinux.simtec.co.uk/
	7	*
	8	* This program is free software; you can redistribute it and/or modify
	9	* it under the terms of the GNU General Public License version 2 as
	10	* published by the Free Software Foundation.
	11	*
	12	*/
	13
	14	#include <linux/kernel.h>
	15	#include <linux/types.h>
	16	#include <linux/interrupt.h>
	17	#include <linux/list.h>
	18	#include <linux/timer.h>
	19	#include <linux/init.h>
290d0983	20	#include <linux/input.h>
5718df9d BD	21	#include <linux/serial_core.h>
	22	#include <linux/platform_device.h>
	23	#include <linux/io.h>
096941ed	24	#include <linux/i2c.h>
a7a81d0b	25	#include <linux/leds.h>
438a5d42 BD	26	#include <linux/fb.h>
	27	#include <linux/gpio.h>
	28	#include <linux/delay.h>
3056ea0a	29	#include <linux/smsc911x.h>
42015c13	30	#include <linux/regulator/fixed.h>
628e7eb5	31	#include <linux/regulator/machine.h>
075d1089	32	#include <linux/pwm_backlight.h>
438a5d42	33
ecc558ac MB	34	#ifdef CONFIG_SMDK6410_WM1190_EV1
	35	#include <linux/mfd/wm8350/core.h>
	36	#include <linux/mfd/wm8350/pmic.h>
	37	#endif
438a5d42	38
60f9101a	39	#ifdef CONFIG_SMDK6410_WM1192_EV1
a7a81d0b	40	#include <linux/mfd/wm831x/core.h>
60f9101a MB	41	#include <linux/mfd/wm831x/pdata.h>
	42	#endif
	43
438a5d42	44	#include <video/platform_lcd.h>
5718df9d BD	45
	46	#include <asm/mach/arch.h>
	47	#include <asm/mach/map.h>
	48	#include <asm/mach/irq.h>
	49
	50	#include <mach/hardware.h>
	51	#include <mach/map.h>
	52
	53	#include <asm/irq.h>
	54	#include <asm/mach-types.h>
	55
	56	#include <plat/regs-serial.h>
3501c9ae BD	57	#include <mach/regs-modem.h>
	58	#include <mach/regs-gpio.h>
	59	#include <mach/regs-sys.h>
	60	#include <mach/regs-srom.h>
0ab0b6d2	61	#include <plat/ata.h>
d85fa24c	62	#include <plat/iic.h>
438a5d42	63	#include <plat/fb.h>
3056ea0a	64	#include <plat/gpio-cfg.h>
5718df9d	65
3cd7b62b	66	#include <plat/s3c6410.h>
5718df9d BD	67	#include <plat/clock.h>
	68	#include <plat/devs.h>
	69	#include <plat/cpu.h>
85b14a3f NKC	70	#include <plat/adc.h>
85b14a3f NKC	71	#include <plat/ts.h>
290d0983	72	#include <plat/keypad.h>
96d78686	73	#include <plat/backlight.h>
49965e65	74	#include <plat/regs-fb-v4.h>
5718df9d BD	75
	76	#define UCON S3C2410_UCON_DEFAULT \| S3C2410_UCON_UCLK
	77	#define ULCON S3C2410_LCON_CS8 \| S3C2410_LCON_PNONE \| S3C2410_LCON_STOPB
	78	#define UFCON S3C2410_UFCON_RXTRIG8 \| S3C2410_UFCON_FIFOMODE
	79
	80	static struct s3c2410_uartcfg smdk6410_uartcfgs[] __initdata = {
	81	[0] = {
	82	.hwport = 0,
	83	.flags = 0,
bd258e52 MH	84	.ucon = UCON,
	85	.ulcon = ULCON,
	86	.ufcon = UFCON,
5718df9d BD	87	},
	88	[1] = {
	89	.hwport = 1,
	90	.flags = 0,
bd258e52 MH	91	.ucon = UCON,
	92	.ulcon = ULCON,
	93	.ufcon = UFCON,
	94	},
	95	[2] = {
	96	.hwport = 2,
	97	.flags = 0,
	98	.ucon = UCON,
	99	.ulcon = ULCON,
	100	.ufcon = UFCON,
	101	},
	102	[3] = {
	103	.hwport = 3,
	104	.flags = 0,
	105	.ucon = UCON,
	106	.ulcon = ULCON,
	107	.ufcon = UFCON,
5718df9d BD	108	},
	109	};
	110
438a5d42 BD	111	/* framebuffer and LCD setup. */
	112
	113	/* GPF15 = LCD backlight control
	114	* GPF13 => Panel power
	115	* GPN5 = LCD nRESET signal
	116	* PWM_TOUT1 => backlight brightness
	117	*/
	118
	119	static void smdk6410_lcd_power_set(struct plat_lcd_data *pd,
	120	unsigned int power)
	121	{
	122	if (power) {
	123	gpio_direction_output(S3C64XX_GPF(13), 1);
438a5d42 BD	124
	125	/* fire nRESET on power up */
	126	gpio_direction_output(S3C64XX_GPN(5), 0);
	127	msleep(10);
	128	gpio_direction_output(S3C64XX_GPN(5), 1);
	129	msleep(1);
	130	} else {
438a5d42 BD	131	gpio_direction_output(S3C64XX_GPF(13), 0);
	132	}
	133	}
	134
	135	static struct plat_lcd_data smdk6410_lcd_power_data = {
	136	.set_power = smdk6410_lcd_power_set,
	137	};
	138
	139	static struct platform_device smdk6410_lcd_powerdev = {
	140	.name = "platform-lcd",
	141	.dev.parent = &s3c_device_fb.dev,
	142	.dev.platform_data = &smdk6410_lcd_power_data,
	143	};
	144
	145	static struct s3c_fb_pd_win smdk6410_fb_win0 = {
	146	/* this is to ensure we use win0 */
	147	.win_mode = {
438a5d42 BD	148	.left_margin = 8,
	149	.right_margin = 13,
	150	.upper_margin = 7,
	151	.lower_margin = 5,
	152	.hsync_len = 3,
	153	.vsync_len = 1,
	154	.xres = 800,
	155	.yres = 480,
	156	},
	157	.max_bpp = 32,
	158	.default_bpp = 16,
001ca74f BD	159	.virtual_y = 480 * 2,
001ca74f BD	160	.virtual_x = 800,
438a5d42 BD	161	};
	162
	163	/* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */
	164	static struct s3c_fb_platdata smdk6410_lcd_pdata __initdata = {
	165	.setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
	166	.win[0] = &smdk6410_fb_win0,
	167	.vidcon0 = VIDCON0_VIDOUT_RGB \| VIDCON0_PNRMODE_RGB,
	168	.vidcon1 = VIDCON1_INV_HSYNC \| VIDCON1_INV_VSYNC,
	169	};
	170
a4e94694 AG	171	/*
	172	* Configuring Ethernet on SMDK6410
	173	*
	174	* Both CS8900A and LAN9115 chips share one chip select mediated by CFG6.
	175	* The constant address below corresponds to nCS1
	176	*
	177	* 1) Set CFGB2 p3 ON others off, no other CFGB selects "ethernet"
	178	* 2) CFG6 needs to be switched to "LAN9115" side
	179	*/
	180
3056ea0a MB	181	static struct resource smdk6410_smsc911x_resources[] = {
3056ea0a MB	182	[0] = {
f01fdac0 AG	183	.start = S3C64XX_PA_XM0CSN1,
f01fdac0 AG	184	.end = S3C64XX_PA_XM0CSN1 + SZ_64K - 1,
3056ea0a MB	185	.flags = IORESOURCE_MEM,
	186	},
	187	[1] = {
	188	.start = S3C_EINT(10),
	189	.end = S3C_EINT(10),
	190	.flags = IORESOURCE_IRQ \| IRQ_TYPE_LEVEL_LOW,
	191	},
	192	};
	193
	194	static struct smsc911x_platform_config smdk6410_smsc911x_pdata = {
	195	.irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
	196	.irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
	197	.flags = SMSC911X_USE_32BIT \| SMSC911X_FORCE_INTERNAL_PHY,
	198	.phy_interface = PHY_INTERFACE_MODE_MII,
	199	};
	200
	201
	202	static struct platform_device smdk6410_smsc911x = {
	203	.name = "smsc911x",
	204	.id = -1,
	205	.num_resources = ARRAY_SIZE(smdk6410_smsc911x_resources),
	206	.resource = &smdk6410_smsc911x_resources[0],
	207	.dev = {
	208	.platform_data = &smdk6410_smsc911x_pdata,
	209	},
	210	};
	211
42015c13	212	#ifdef CONFIG_REGULATOR
b5930b83 MB	213	static struct regulator_consumer_supply smdk6410_b_pwr_5v_consumers[] __initdata = {
	214	REGULATOR_SUPPLY("PVDD", "0-001b"),
	215	REGULATOR_SUPPLY("AVDD", "0-001b"),
42015c13 MB	216	};
	217
	218	static struct regulator_init_data smdk6410_b_pwr_5v_data = {
	219	.constraints = {
	220	.always_on = 1,
	221	},
	222	.num_consumer_supplies = ARRAY_SIZE(smdk6410_b_pwr_5v_consumers),
	223	.consumer_supplies = smdk6410_b_pwr_5v_consumers,
	224	};
	225
	226	static struct fixed_voltage_config smdk6410_b_pwr_5v_pdata = {
	227	.supply_name = "B_PWR_5V",
	228	.microvolts = 5000000,
	229	.init_data = &smdk6410_b_pwr_5v_data,
d3cf4489	230	.gpio = -EINVAL,
42015c13 MB	231	};
	232
	233	static struct platform_device smdk6410_b_pwr_5v = {
	234	.name = "reg-fixed-voltage",
	235	.id = -1,
	236	.dev = {
	237	.platform_data = &smdk6410_b_pwr_5v_pdata,
	238	},
	239	};
	240	#endif
	241
0ab0b6d2 AK	242	static struct s3c_ide_platdata smdk6410_ide_pdata __initdata = {
	243	.setup_gpio = s3c64xx_ide_setup_gpio,
	244	};
	245
290d0983 NKC	246	static uint32_t smdk6410_keymap[] __initdata = {
	247	/* KEY(row, col, keycode) */
	248	KEY(0, 3, KEY_1), KEY(0, 4, KEY_2), KEY(0, 5, KEY_3),
	249	KEY(0, 6, KEY_4), KEY(0, 7, KEY_5),
	250	KEY(1, 3, KEY_A), KEY(1, 4, KEY_B), KEY(1, 5, KEY_C),
	251	KEY(1, 6, KEY_D), KEY(1, 7, KEY_E)
	252	};
	253
	254	static struct matrix_keymap_data smdk6410_keymap_data __initdata = {
	255	.keymap = smdk6410_keymap,
	256	.keymap_size = ARRAY_SIZE(smdk6410_keymap),
	257	};
	258
	259	static struct samsung_keypad_platdata smdk6410_keypad_data __initdata = {
	260	.keymap_data = &smdk6410_keymap_data,
	261	.rows = 2,
	262	.cols = 8,
	263	};
	264
027191a8	265	static struct map_desc smdk6410_iodesc[] = {};
5718df9d BD	266
5718df9d BD	267	static struct platform_device *smdk6410_devices[] __initdata = {
b24636cf	268	#ifdef CONFIG_SMDK6410_SD_CH0
39057f23	269	&s3c_device_hsmmc0,
b24636cf BD	270	#endif
	271	#ifdef CONFIG_SMDK6410_SD_CH1
	272	&s3c_device_hsmmc1,
	273	#endif
d85fa24c	274	&s3c_device_i2c0,
d7ea3743	275	&s3c_device_i2c1,
438a5d42	276	&s3c_device_fb,
b813248c	277	&s3c_device_ohci,
06fa1d37	278	&s3c_device_usb_hsotg,
83e37b8e	279	&samsung_asoc_dma,
1f100868	280	&s3c64xx_device_iisv4,
290d0983	281	&samsung_device_keypad,
42015c13 MB	282
	283	#ifdef CONFIG_REGULATOR
	284	&smdk6410_b_pwr_5v,
	285	#endif
438a5d42	286	&smdk6410_lcd_powerdev,
3056ea0a MB	287
3056ea0a MB	288	&smdk6410_smsc911x,
85b14a3f	289	&s3c_device_adc,
0ab0b6d2	290	&s3c_device_cfcon,
9bbf4a63	291	&s3c_device_rtc,
85b14a3f	292	&s3c_device_ts,
b351c4a1	293	&s3c_device_wdt,
5718df9d BD	294	};
5718df9d BD	295
60f9101a MB	296	#ifdef CONFIG_REGULATOR
	297	/* ARM core */
	298	static struct regulator_consumer_supply smdk6410_vddarm_consumers[] = {
b5930b83	299	REGULATOR_SUPPLY("vddarm", NULL),
60f9101a MB	300	};
	301
	302	/* VDDARM, BUCK1 on J5 */
	303	static struct regulator_init_data smdk6410_vddarm = {
ecc558ac	304	.constraints = {
60f9101a MB	305	.name = "PVDD_ARM",
	306	.min_uV = 1000000,
	307	.max_uV = 1300000,
	308	.always_on = 1,
	309	.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
	310	},
	311	.num_consumer_supplies = ARRAY_SIZE(smdk6410_vddarm_consumers),
	312	.consumer_supplies = smdk6410_vddarm_consumers,
	313	};
	314
	315	/* VDD_INT, BUCK2 on J5 */
	316	static struct regulator_init_data smdk6410_vddint = {
	317	.constraints = {
	318	.name = "PVDD_INT",
	319	.min_uV = 1000000,
ecc558ac MB	320	.max_uV = 1200000,
ecc558ac MB	321	.always_on = 1,
60f9101a	322	.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
ecc558ac MB	323	},
	324	};
	325
60f9101a MB	326	/* VDD_HI, LDO3 on J5 */
60f9101a MB	327	static struct regulator_init_data smdk6410_vddhi = {
ecc558ac	328	.constraints = {
60f9101a	329	.name = "PVDD_HI",
ecc558ac	330	.always_on = 1,
ecc558ac MB	331	},
	332	};
	333
60f9101a MB	334	/* VDD_PLL, LDO2 on J5 */
	335	static struct regulator_init_data smdk6410_vddpll = {
	336	.constraints = {
	337	.name = "PVDD_PLL",
	338	.always_on = 1,
42015c13 MB	339	},
	340	};
	341
60f9101a MB	342	/* VDD_UH_MMC, LDO5 on J5 */
60f9101a MB	343	static struct regulator_init_data smdk6410_vdduh_mmc = {
ecc558ac	344	.constraints = {
18b52ca5	345	.name = "PVDD_UH+PVDD_MMC",
ecc558ac MB	346	.always_on = 1,
	347	},
	348	};
	349
60f9101a MB	350	/* VCCM3BT, LDO8 on J5 */
	351	static struct regulator_init_data smdk6410_vccmc3bt = {
	352	.constraints = {
	353	.name = "PVCCM3BT",
	354	.always_on = 1,
	355	},
e3980b6a MB	356	};
e3980b6a MB	357
60f9101a MB	358	/* VCCM2MTV, LDO11 on J5 */
60f9101a MB	359	static struct regulator_init_data smdk6410_vccm2mtv = {
ecc558ac	360	.constraints = {
60f9101a MB	361	.name = "PVCCM2MTV",
	362	.always_on = 1,
	363	},
	364	};
	365
	366	/* VDD_LCD, LDO12 on J5 */
	367	static struct regulator_init_data smdk6410_vddlcd = {
	368	.constraints = {
	369	.name = "PVDD_LCD",
	370	.always_on = 1,
	371	},
	372	};
	373
	374	/* VDD_OTGI, LDO9 on J5 */
	375	static struct regulator_init_data smdk6410_vddotgi = {
	376	.constraints = {
	377	.name = "PVDD_OTGI",
	378	.always_on = 1,
	379	},
	380	};
	381
	382	/* VDD_OTG, LDO14 on J5 */
	383	static struct regulator_init_data smdk6410_vddotg = {
	384	.constraints = {
	385	.name = "PVDD_OTG",
ecc558ac MB	386	.always_on = 1,
ecc558ac MB	387	},
5718df9d BD	388	};
5718df9d BD	389
60f9101a MB	390	/* VDD_ALIVE, LDO15 on J5 */
60f9101a MB	391	static struct regulator_init_data smdk6410_vddalive = {
ecc558ac MB	392	.constraints = {
ecc558ac MB	393	.name = "PVDD_ALIVE",
60f9101a MB	394	.always_on = 1,
	395	},
	396	};
	397
	398	/* VDD_AUDIO, VLDO_AUDIO on J5 */
	399	static struct regulator_init_data smdk6410_vddaudio = {
	400	.constraints = {
	401	.name = "PVDD_AUDIO",
	402	.always_on = 1,
	403	},
	404	};
	405	#endif
	406
	407	#ifdef CONFIG_SMDK6410_WM1190_EV1
	408	/* S3C64xx internal logic & PLL */
	409	static struct regulator_init_data wm8350_dcdc1_data = {
	410	.constraints = {
18b52ca5	411	.name = "PVDD_INT+PVDD_PLL",
ecc558ac MB	412	.min_uV = 1200000,
	413	.max_uV = 1200000,
	414	.always_on = 1,
	415	.apply_uV = 1,
	416	},
	417	};
	418
60f9101a MB	419	/* Memory */
60f9101a MB	420	static struct regulator_init_data wm8350_dcdc3_data = {
ecc558ac	421	.constraints = {
60f9101a MB	422	.name = "PVDD_MEM",
	423	.min_uV = 1800000,
	424	.max_uV = 1800000,
f53aee29	425	.always_on = 1,
60f9101a MB	426	.state_mem = {
	427	.uV = 1800000,
	428	.mode = REGULATOR_MODE_NORMAL,
	429	.enabled = 1,
	430	},
	431	.initial_state = PM_SUSPEND_MEM,
ecc558ac MB	432	},
	433	};
	434
60f9101a MB	435	/* USB, EXT, PCM, ADC/DAC, USB, MMC */
60f9101a MB	436	static struct regulator_consumer_supply wm8350_dcdc4_consumers[] = {
b5930b83	437	REGULATOR_SUPPLY("DVDD", "0-001b"),
60f9101a MB	438	};
	439
	440	static struct regulator_init_data wm8350_dcdc4_data = {
ecc558ac	441	.constraints = {
18b52ca5	442	.name = "PVDD_HI+PVDD_EXT+PVDD_SYS+PVCCM2MTV",
ecc558ac MB	443	.min_uV = 3000000,
ecc558ac MB	444	.max_uV = 3000000,
f53aee29	445	.always_on = 1,
ecc558ac	446	},
60f9101a MB	447	.num_consumer_supplies = ARRAY_SIZE(wm8350_dcdc4_consumers),
60f9101a MB	448	.consumer_supplies = wm8350_dcdc4_consumers,
ecc558ac MB	449	};
	450
	451	/* OTGi/1190-EV1 HPVDD & AVDD */
	452	static struct regulator_init_data wm8350_ldo4_data = {
	453	.constraints = {
18b52ca5	454	.name = "PVDD_OTGI+HPVDD+AVDD",
ecc558ac MB	455	.min_uV = 1200000,
	456	.max_uV = 1200000,
	457	.apply_uV = 1,
f53aee29	458	.always_on = 1,
ecc558ac MB	459	},
	460	};
	461
	462	static struct {
	463	int regulator;
	464	struct regulator_init_data *initdata;
	465	} wm1190_regulators[] = {
	466	{ WM8350_DCDC_1, &wm8350_dcdc1_data },
	467	{ WM8350_DCDC_3, &wm8350_dcdc3_data },
	468	{ WM8350_DCDC_4, &wm8350_dcdc4_data },
60f9101a MB	469	{ WM8350_DCDC_6, &smdk6410_vddarm },
	470	{ WM8350_LDO_1, &smdk6410_vddalive },
	471	{ WM8350_LDO_2, &smdk6410_vddotg },
	472	{ WM8350_LDO_3, &smdk6410_vddlcd },
ecc558ac MB	473	{ WM8350_LDO_4, &wm8350_ldo4_data },
	474	};
	475
	476	static int __init smdk6410_wm8350_init(struct wm8350 *wm8350)
	477	{
	478	int i;
	479
a3323b72 MB	480	/* Configure the IRQ line */
	481	s3c_gpio_setpull(S3C64XX_GPN(12), S3C_GPIO_PULL_UP);
	482
ecc558ac MB	483	/* Instantiate the regulators */
	484	for (i = 0; i < ARRAY_SIZE(wm1190_regulators); i++)
	485	wm8350_register_regulator(wm8350,
	486	wm1190_regulators[i].regulator,
	487	wm1190_regulators[i].initdata);
	488
	489	return 0;
	490	}
	491
	492	static struct wm8350_platform_data __initdata smdk6410_wm8350_pdata = {
	493	.init = smdk6410_wm8350_init,
db9256f3	494	.irq_high = 1,
9fca8786	495	.irq_base = IRQ_BOARD_START,
ecc558ac MB	496	};
	497	#endif
	498
60f9101a	499	#ifdef CONFIG_SMDK6410_WM1192_EV1
a7a81d0b MB	500	static struct gpio_led wm1192_pmic_leds[] = {
	501	{
	502	.name = "PMIC:red:power",
	503	.gpio = GPIO_BOARD_START + 3,
	504	.default_state = LEDS_GPIO_DEFSTATE_ON,
	505	},
	506	};
	507
	508	static struct gpio_led_platform_data wm1192_pmic_led = {
	509	.num_leds = ARRAY_SIZE(wm1192_pmic_leds),
	510	.leds = wm1192_pmic_leds,
	511	};
	512
	513	static struct platform_device wm1192_pmic_led_dev = {
	514	.name = "leds-gpio",
	515	.id = -1,
	516	.dev = {
	517	.platform_data = &wm1192_pmic_led,
	518	},
	519	};
	520
60f9101a MB	521	static int wm1192_pre_init(struct wm831x *wm831x)
60f9101a MB	522	{
a7a81d0b MB	523	int ret;
a7a81d0b MB	524
60f9101a MB	525	/* Configure the IRQ line */
	526	s3c_gpio_setpull(S3C64XX_GPN(12), S3C_GPIO_PULL_UP);
	527
a7a81d0b MB	528	ret = platform_device_register(&wm1192_pmic_led_dev);
	529	if (ret != 0)
	530	dev_err(wm831x->dev, "Failed to add PMIC LED: %d\n", ret);
	531
60f9101a MB	532	return 0;
	533	}
	534
	535	static struct wm831x_backlight_pdata wm1192_backlight_pdata = {
	536	.isink = 1,
	537	.max_uA = 27554,
	538	};
	539
	540	static struct regulator_init_data wm1192_dcdc3 = {
	541	.constraints = {
18b52ca5	542	.name = "PVDD_MEM+PVDD_GPS",
60f9101a MB	543	.always_on = 1,
	544	},
	545	};
	546
	547	static struct regulator_consumer_supply wm1192_ldo1_consumers[] = {
b5930b83	548	REGULATOR_SUPPLY("DVDD", "0-001b"), /* WM8580 */
60f9101a MB	549	};
	550
	551	static struct regulator_init_data wm1192_ldo1 = {
	552	.constraints = {
18b52ca5	553	.name = "PVDD_LCD+PVDD_EXT",
60f9101a MB	554	.always_on = 1,
	555	},
	556	.consumer_supplies = wm1192_ldo1_consumers,
	557	.num_consumer_supplies = ARRAY_SIZE(wm1192_ldo1_consumers),
	558	};
	559
	560	static struct wm831x_status_pdata wm1192_led7_pdata = {
	561	.name = "LED7:green:",
	562	};
	563
	564	static struct wm831x_status_pdata wm1192_led8_pdata = {
	565	.name = "LED8:green:",
	566	};
	567
	568	static struct wm831x_pdata smdk6410_wm1192_pdata = {
	569	.pre_init = wm1192_pre_init,
	570	.irq_base = IRQ_BOARD_START,
	571
	572	.backlight = &wm1192_backlight_pdata,
	573	.dcdc = {
	574	&smdk6410_vddarm, /* DCDC1 */
	575	&smdk6410_vddint, /* DCDC2 */
	576	&wm1192_dcdc3,
	577	},
a7a81d0b	578	.gpio_base = GPIO_BOARD_START,
60f9101a MB	579	.ldo = {
	580	&wm1192_ldo1, /* LDO1 */
	581	&smdk6410_vdduh_mmc, /* LDO2 */
	582	NULL, /* LDO3 NC */
	583	&smdk6410_vddotgi, /* LDO4 */
	584	&smdk6410_vddotg, /* LDO5 */
	585	&smdk6410_vddhi, /* LDO6 */
	586	&smdk6410_vddaudio, /* LDO7 */
	587	&smdk6410_vccm2mtv, /* LDO8 */
	588	&smdk6410_vddpll, /* LDO9 */
	589	&smdk6410_vccmc3bt, /* LDO10 */
	590	&smdk6410_vddalive, /* LDO11 */
	591	},
	592	.status = {
	593	&wm1192_led7_pdata,
	594	&wm1192_led8_pdata,
	595	},
	596	};
	597	#endif
	598
096941ed BD	599	static struct i2c_board_info i2c_devs0[] __initdata = {
096941ed BD	600	{ I2C_BOARD_INFO("24c08", 0x50), },
77897479	601	{ I2C_BOARD_INFO("wm8580", 0x1b), },
ecc558ac	602
60f9101a MB	603	#ifdef CONFIG_SMDK6410_WM1192_EV1
	604	{ I2C_BOARD_INFO("wm8312", 0x34),
	605	.platform_data = &smdk6410_wm1192_pdata,
	606	.irq = S3C_EINT(12),
	607	},
	608	#endif
	609
ecc558ac MB	610	#ifdef CONFIG_SMDK6410_WM1190_EV1
	611	{ I2C_BOARD_INFO("wm8350", 0x1a),
	612	.platform_data = &smdk6410_wm8350_pdata,
	613	.irq = S3C_EINT(12),
	614	},
	615	#endif
096941ed BD	616	};
	617
	618	static struct i2c_board_info i2c_devs1[] __initdata = {
	619	{ I2C_BOARD_INFO("24c128", 0x57), }, /* Samsung S524AD0XD1 */
5718df9d BD	620	};
5718df9d BD	621
96d78686 BG	622	/* LCD Backlight data */
	623	static struct samsung_bl_gpio_info smdk6410_bl_gpio_info = {
	624	.no = S3C64XX_GPF(15),
	625	.func = S3C_GPIO_SFN(2),
	626	};
	627
	628	static struct platform_pwm_backlight_data smdk6410_bl_data = {
	629	.pwm_id = 1,
	630	};
	631
5718df9d BD	632	static void __init smdk6410_map_io(void)
5718df9d BD	633	{
d6662c35 BD	634	u32 tmp;
d6662c35 BD	635
5718df9d BD	636	s3c64xx_init_io(smdk6410_iodesc, ARRAY_SIZE(smdk6410_iodesc));
	637	s3c24xx_init_clocks(12000000);
	638	s3c24xx_init_uarts(smdk6410_uartcfgs, ARRAY_SIZE(smdk6410_uartcfgs));
d6662c35 BD	639
	640	/* set the LCD type */
	641
	642	tmp = __raw_readl(S3C64XX_SPCON);
	643	tmp &= ~S3C64XX_SPCON_LCD_SEL_MASK;
	644	tmp \|= S3C64XX_SPCON_LCD_SEL_RGB;
	645	__raw_writel(tmp, S3C64XX_SPCON);
	646
	647	/* remove the lcd bypass */
	648	tmp = __raw_readl(S3C64XX_MODEM_MIFPCON);
	649	tmp &= ~MIFPCON_LCD_BYPASS;
	650	__raw_writel(tmp, S3C64XX_MODEM_MIFPCON);
5718df9d BD	651	}
	652
	653	static void __init smdk6410_machine_init(void)
	654	{
f01fdac0 AG	655	u32 cs1;
f01fdac0 AG	656
d85fa24c	657	s3c_i2c0_set_platdata(NULL);
d7ea3743	658	s3c_i2c1_set_platdata(NULL);
438a5d42	659	s3c_fb_set_platdata(&smdk6410_lcd_pdata);
096941ed	660
290d0983 NKC	661	samsung_keypad_set_platdata(&smdk6410_keypad_data);
290d0983 NKC	662
0804765a	663	s3c24xx_ts_set_platdata(NULL);
85b14a3f	664
f01fdac0 AG	665	/* configure nCS1 width to 16 bits */
	666
	667	cs1 = __raw_readl(S3C64XX_SROM_BW) &
	668	~(S3C64XX_SROM_BW__CS_MASK << S3C64XX_SROM_BW__NCS1__SHIFT);
	669	cs1 \|= ((1 << S3C64XX_SROM_BW__DATAWIDTH__SHIFT) \|
	670	(1 << S3C64XX_SROM_BW__WAITENABLE__SHIFT) \|
	671	(1 << S3C64XX_SROM_BW__BYTEENABLE__SHIFT)) <<
	672	S3C64XX_SROM_BW__NCS1__SHIFT;
	673	__raw_writel(cs1, S3C64XX_SROM_BW);
	674
	675	/* set timing for nCS1 suitable for ethernet chip */
	676
	677	__raw_writel((0 << S3C64XX_SROM_BCX__PMC__SHIFT) \|
	678	(6 << S3C64XX_SROM_BCX__TACP__SHIFT) \|
	679	(4 << S3C64XX_SROM_BCX__TCAH__SHIFT) \|
	680	(1 << S3C64XX_SROM_BCX__TCOH__SHIFT) \|
	681	(0xe << S3C64XX_SROM_BCX__TACC__SHIFT) \|
	682	(4 << S3C64XX_SROM_BCX__TCOS__SHIFT) \|
	683	(0 << S3C64XX_SROM_BCX__TACS__SHIFT), S3C64XX_SROM_BC1);
	684
b7f9a94b MB	685	gpio_request(S3C64XX_GPN(5), "LCD power");
b7f9a94b MB	686	gpio_request(S3C64XX_GPF(13), "LCD power");
b7f9a94b	687
096941ed BD	688	i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
	689	i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
	690
0ab0b6d2 AK	691	s3c_ide_set_platdata(&smdk6410_ide_pdata);
0ab0b6d2 AK	692
96d78686 BG	693	samsung_bl_set(&smdk6410_bl_gpio_info, &smdk6410_bl_data);
96d78686 BG	694
5718df9d BD	695	platform_add_devices(smdk6410_devices, ARRAY_SIZE(smdk6410_devices));
	696	}
	697
	698	MACHINE_START(SMDK6410, "SMDK6410")
afdd225d	699	/* Maintainer: Ben Dooks <ben-linux@fluff.org> */
170a5908	700	.atag_offset = 0x100,
5718df9d BD	701
	702	.init_irq = s3c6410_init_irq,
	703	.map_io = smdk6410_map_io,
	704	.init_machine = smdk6410_machine_init,
	705	.timer = &s3c24xx_timer,
	706	MACHINE_END