projects / mirror_ubuntu-bionic-kernel.git / blame
| Commit | Line | Data |
|---|---|---|
| 939d28aa KK |
1 | /* linux/arch/arm/mach-s5pv210/include/mach/map.h |
| 2 | * | |
| 3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | |
| 4 | * http://www.samsung.com/ | |
| 5 | * | |
| 6 | * S5PV210 - Memory map definitions | |
| 7 | * | |
| 8 | * This program is free software; you can redistribute it and/or modify | |
| 9 | * it under the terms of the GNU General Public License version 2 as | |
| 10 | * published by the Free Software Foundation. | |
| 11 | */ | |
| 12 | ||
| 13 | #ifndef __ASM_ARCH_MAP_H | |
| 14 | #define __ASM_ARCH_MAP_H __FILE__ | |
| 15 | ||
| 16 | #include <plat/map-base.h> | |
| 17 | #include <plat/map-s5p.h> | |
| 18 | ||
| 999304be | 19 | #define S5PC110_PA_ONENAND (0xB0000000) |
| 13904fba KK |
20 | #define S5P_PA_ONENAND S5PC110_PA_ONENAND |
| 21 | ||
| 999304be | 22 | #define S5PC110_PA_ONENAND_DMA (0xB0600000) |
| 13904fba | 23 | #define S5P_PA_ONENAND_DMA S5PC110_PA_ONENAND_DMA |
| 999304be | 24 | |
| 939d28aa KK |
25 | #define S5PV210_PA_CHIPID (0xE0000000) |
| 26 | #define S5P_PA_CHIPID S5PV210_PA_CHIPID | |
| 27 | ||
| 28 | #define S5PV210_PA_SYSCON (0xE0100000) | |
| 29 | #define S5P_PA_SYSCON S5PV210_PA_SYSCON | |
| 30 | ||
| 31 | #define S5PV210_PA_GPIO (0xE0200000) | |
| 939d28aa | 32 | |
| f0c303a6 JB |
33 | /* SPI */ |
| 34 | #define S5PV210_PA_SPI0 0xE1300000 | |
| 35 | #define S5PV210_PA_SPI1 0xE1400000 | |
| 36 | ||
| e7d0628c JS |
37 | #define S5PV210_PA_KEYPAD (0xE1600000) |
| 38 | ||
| 939d28aa | 39 | #define S5PV210_PA_IIC0 (0xE1800000) |
| c8d833bf MS |
40 | #define S5PV210_PA_IIC1 (0xFAB00000) |
| 41 | #define S5PV210_PA_IIC2 (0xE1A00000) | |
| 939d28aa KK |
42 | |
| 43 | #define S5PV210_PA_TIMER (0xE2500000) | |
| 44 | #define S5P_PA_TIMER S5PV210_PA_TIMER | |
| 45 | ||
| 46 | #define S5PV210_PA_SYSTIMER (0xE2600000) | |
| 47 | ||
| 5b7d7b22 BG |
48 | #define S5PV210_PA_WATCHDOG (0xE2700000) |
| 49 | ||
| f5807269 | 50 | #define S5PV210_PA_RTC (0xE2800000) |
| 939d28aa KK |
51 | #define S5PV210_PA_UART (0xE2900000) |
| 52 | ||
| 53 | #define S5P_PA_UART0 (S5PV210_PA_UART + 0x0) | |
| 54 | #define S5P_PA_UART1 (S5PV210_PA_UART + 0x400) | |
| 55 | #define S5P_PA_UART2 (S5PV210_PA_UART + 0x800) | |
| 56 | #define S5P_PA_UART3 (S5PV210_PA_UART + 0xC00) | |
| 57 | ||
| 58 | #define S5P_SZ_UART SZ_256 | |
| 59 | ||
| 60 | #define S5PV210_PA_SROMC (0xE8000000) | |
| 61 | ||
| 4b9a5ad5 AK |
62 | #define S5PV210_PA_CFCON (0xE8200000) |
| 63 | ||
| 7d1a2077 JB |
64 | #define S5PV210_PA_MDMA 0xFA200000 |
| 65 | #define S5PV210_PA_PDMA0 0xE0900000 | |
| 66 | #define S5PV210_PA_PDMA1 0xE0A00000 | |
| 67 | ||
| 5b696a67 MS |
68 | #define S5PV210_PA_FB (0xF8000000) |
| 69 | ||
| 33c14ff8 SN |
70 | #define S5PV210_PA_FIMC0 (0xFB200000) |
| 71 | #define S5PV210_PA_FIMC1 (0xFB300000) | |
| 72 | #define S5PV210_PA_FIMC2 (0xFB400000) | |
| 73 | ||
| e6f66a9f MS |
74 | #define S5PV210_PA_HSMMC(x) (0xEB000000 + ((x) * 0x100000)) |
| 75 | ||
| ca1931ca MS |
76 | #define S5PV210_PA_HSOTG (0xEC000000) |
| 77 | #define S5PV210_PA_HSPHY (0xEC100000) | |
| 78 | ||
| 939d28aa | 79 | #define S5PV210_PA_VIC0 (0xF2000000) |
| 939d28aa | 80 | #define S5PV210_PA_VIC1 (0xF2100000) |
| 939d28aa | 81 | #define S5PV210_PA_VIC2 (0xF2200000) |
| 939d28aa | 82 | #define S5PV210_PA_VIC3 (0xF2300000) |
| 939d28aa KK |
83 | |
| 84 | #define S5PV210_PA_SDRAM (0x20000000) | |
| 85 | #define S5P_PA_SDRAM S5PV210_PA_SDRAM | |
| 86 | ||
| 602bf0cf JB |
87 | /* I2S */ |
| 88 | #define S5PV210_PA_IIS0 0xEEE30000 | |
| 89 | #define S5PV210_PA_IIS1 0xE2100000 | |
| 90 | #define S5PV210_PA_IIS2 0xE2A00000 | |
| 91 | ||
| 92 | /* PCM */ | |
| 93 | #define S5PV210_PA_PCM0 0xE2300000 | |
| 94 | #define S5PV210_PA_PCM1 0xE1200000 | |
| 95 | #define S5PV210_PA_PCM2 0xE2B00000 | |
| 96 | ||
| 97 | /* AC97 */ | |
| 98 | #define S5PV210_PA_AC97 0xE2200000 | |
| 99 | ||
| 41d8289d NKC |
100 | #define S5PV210_PA_ADC (0xE1700000) |
| 101 | ||
| 1d826d14 JL |
102 | #define S5PV210_PA_DMC0 (0xF0000000) |
| 103 | #define S5PV210_PA_DMC1 (0xF1400000) | |
| 104 | ||
| 939d28aa KK |
105 | /* compatibiltiy defines. */ |
| 106 | #define S3C_PA_UART S5PV210_PA_UART | |
| e6f66a9f MS |
107 | #define S3C_PA_HSMMC0 S5PV210_PA_HSMMC(0) |
| 108 | #define S3C_PA_HSMMC1 S5PV210_PA_HSMMC(1) | |
| 109 | #define S3C_PA_HSMMC2 S5PV210_PA_HSMMC(2) | |
| 976a62f2 | 110 | #define S3C_PA_HSMMC3 S5PV210_PA_HSMMC(3) |
| 939d28aa | 111 | #define S3C_PA_IIC S5PV210_PA_IIC0 |
| c8d833bf MS |
112 | #define S3C_PA_IIC1 S5PV210_PA_IIC1 |
| 113 | #define S3C_PA_IIC2 S5PV210_PA_IIC2 | |
| 5b696a67 | 114 | #define S3C_PA_FB S5PV210_PA_FB |
| f5807269 | 115 | #define S3C_PA_RTC S5PV210_PA_RTC |
| 5b7d7b22 | 116 | #define S3C_PA_WDT S5PV210_PA_WATCHDOG |
| ca1931ca | 117 | #define S3C_PA_USB_HSOTG S5PV210_PA_HSOTG |
| 33c14ff8 SN |
118 | #define S5P_PA_FIMC0 S5PV210_PA_FIMC0 |
| 119 | #define S5P_PA_FIMC1 S5PV210_PA_FIMC1 | |
| 120 | #define S5P_PA_FIMC2 S5PV210_PA_FIMC2 | |
| 939d28aa | 121 | |
| 41d8289d | 122 | #define SAMSUNG_PA_ADC S5PV210_PA_ADC |
| 4b9a5ad5 | 123 | #define SAMSUNG_PA_CFCON S5PV210_PA_CFCON |
| e7d0628c | 124 | #define SAMSUNG_PA_KEYPAD S5PV210_PA_KEYPAD |
| 939d28aa KK |
125 | |
| 126 | #endif /* __ASM_ARCH_MAP_H */ |