]>
Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * linux/arch/arm/mach-sa1100/cerf.c | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of the GNU General Public License version 2 as | |
6 | * published by the Free Software Foundation. | |
7 | * | |
8 | * Apr-2003 : Removed some old PDA crud [FB] | |
9 | * Oct-2003 : Added uart2 resource [FB] | |
10 | * Jan-2004 : Removed io map for flash [FB] | |
11 | */ | |
12 | ||
1da177e4 LT |
13 | #include <linux/init.h> |
14 | #include <linux/kernel.h> | |
15 | #include <linux/tty.h> | |
6920b5a7 | 16 | #include <linux/platform_data/sa11x0-serial.h> |
d052d1be | 17 | #include <linux/platform_device.h> |
119c641c | 18 | #include <linux/irq.h> |
1da177e4 LT |
19 | #include <linux/mtd/mtd.h> |
20 | #include <linux/mtd/partitions.h> | |
18775a7b BW |
21 | #include <linux/gpio.h> |
22 | #include <linux/leds.h> | |
1da177e4 | 23 | |
a09e64fb | 24 | #include <mach/hardware.h> |
1da177e4 LT |
25 | #include <asm/setup.h> |
26 | ||
27 | #include <asm/mach-types.h> | |
28 | #include <asm/mach/arch.h> | |
29 | #include <asm/mach/flash.h> | |
30 | #include <asm/mach/map.h> | |
1da177e4 | 31 | |
a09e64fb | 32 | #include <mach/cerf.h> |
a1fd844c | 33 | #include <linux/platform_data/mfd-mcp-sa11x0.h> |
f314f33b | 34 | #include <mach/irqs.h> |
1da177e4 LT |
35 | #include "generic.h" |
36 | ||
37 | static struct resource cerfuart2_resources[] = { | |
a181099e | 38 | [0] = DEFINE_RES_MEM(0x80030000, SZ_64K), |
1da177e4 LT |
39 | }; |
40 | ||
41 | static struct platform_device cerfuart2_device = { | |
42 | .name = "sa11x0-uart", | |
43 | .id = 2, | |
44 | .num_resources = ARRAY_SIZE(cerfuart2_resources), | |
45 | .resource = cerfuart2_resources, | |
46 | }; | |
47 | ||
18775a7b BW |
48 | /* LEDs */ |
49 | struct gpio_led cerf_gpio_leds[] = { | |
50 | { | |
51 | .name = "cerf:d0", | |
52 | .default_trigger = "heartbeat", | |
53 | .gpio = 0, | |
54 | }, | |
55 | { | |
56 | .name = "cerf:d1", | |
57 | .default_trigger = "cpu0", | |
58 | .gpio = 1, | |
59 | }, | |
60 | { | |
61 | .name = "cerf:d2", | |
62 | .default_trigger = "default-on", | |
63 | .gpio = 2, | |
64 | }, | |
65 | { | |
66 | .name = "cerf:d3", | |
67 | .default_trigger = "default-on", | |
68 | .gpio = 3, | |
69 | }, | |
70 | ||
71 | }; | |
72 | ||
73 | static struct gpio_led_platform_data cerf_gpio_led_info = { | |
74 | .leds = cerf_gpio_leds, | |
75 | .num_leds = ARRAY_SIZE(cerf_gpio_leds), | |
76 | }; | |
77 | ||
78 | static struct platform_device cerf_leds = { | |
79 | .name = "leds-gpio", | |
80 | .id = -1, | |
81 | .dev = { | |
82 | .platform_data = &cerf_gpio_led_info, | |
83 | } | |
84 | }; | |
85 | ||
86 | ||
1da177e4 LT |
87 | static struct platform_device *cerf_devices[] __initdata = { |
88 | &cerfuart2_device, | |
18775a7b | 89 | &cerf_leds, |
1da177e4 LT |
90 | }; |
91 | ||
92 | #ifdef CONFIG_SA1100_CERF_FLASH_32MB | |
93 | # define CERF_FLASH_SIZE 0x02000000 | |
94 | #elif defined CONFIG_SA1100_CERF_FLASH_16MB | |
95 | # define CERF_FLASH_SIZE 0x01000000 | |
96 | #elif defined CONFIG_SA1100_CERF_FLASH_8MB | |
97 | # define CERF_FLASH_SIZE 0x00800000 | |
98 | #else | |
99 | # error "Undefined flash size for CERF" | |
100 | #endif | |
101 | ||
102 | static struct mtd_partition cerf_partitions[] = { | |
103 | { | |
104 | .name = "Bootloader", | |
105 | .size = 0x00020000, | |
106 | .offset = 0x00000000, | |
107 | }, { | |
108 | .name = "Params", | |
109 | .size = 0x00040000, | |
110 | .offset = 0x00020000, | |
111 | }, { | |
112 | .name = "Kernel", | |
113 | .size = 0x00100000, | |
114 | .offset = 0x00060000, | |
115 | }, { | |
116 | .name = "Filesystem", | |
117 | .size = CERF_FLASH_SIZE-0x00160000, | |
118 | .offset = 0x00160000, | |
119 | } | |
120 | }; | |
121 | ||
122 | static struct flash_platform_data cerf_flash_data = { | |
123 | .map_name = "cfi_probe", | |
124 | .parts = cerf_partitions, | |
125 | .nr_parts = ARRAY_SIZE(cerf_partitions), | |
126 | }; | |
127 | ||
a181099e RK |
128 | static struct resource cerf_flash_resource = |
129 | DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_32M); | |
1da177e4 LT |
130 | |
131 | static void __init cerf_init_irq(void) | |
132 | { | |
133 | sa1100_init_irq(); | |
6845664a | 134 | irq_set_irq_type(CERF_ETH_IRQ, IRQ_TYPE_EDGE_RISING); |
1da177e4 LT |
135 | } |
136 | ||
137 | static struct map_desc cerf_io_desc[] __initdata = { | |
92519d82 DS |
138 | { /* Crystal Ethernet Chip */ |
139 | .virtual = 0xf0000000, | |
140 | .pfn = __phys_to_pfn(0x08000000), | |
141 | .length = 0x00100000, | |
142 | .type = MT_DEVICE | |
143 | } | |
1da177e4 LT |
144 | }; |
145 | ||
146 | static void __init cerf_map_io(void) | |
147 | { | |
148 | sa1100_map_io(); | |
149 | iotable_init(cerf_io_desc, ARRAY_SIZE(cerf_io_desc)); | |
150 | ||
151 | sa1100_register_uart(0, 3); | |
152 | sa1100_register_uart(1, 2); /* disable this and the uart2 device for sa1100_fir */ | |
153 | sa1100_register_uart(2, 1); | |
154 | ||
155 | /* set some GPDR bits here while it's safe */ | |
156 | GPDR |= CERF_GPIO_CF_RESET; | |
157 | } | |
158 | ||
323cdfc1 RK |
159 | static struct mcp_plat_data cerf_mcp_data = { |
160 | .mccr0 = MCCR0_ADM, | |
161 | .sclk_rate = 11981000, | |
162 | }; | |
163 | ||
1da177e4 LT |
164 | static void __init cerf_init(void) |
165 | { | |
e36e26a8 | 166 | sa11x0_ppc_configure_mcp(); |
1da177e4 | 167 | platform_add_devices(cerf_devices, ARRAY_SIZE(cerf_devices)); |
7a5b4e16 RK |
168 | sa11x0_register_mtd(&cerf_flash_data, &cerf_flash_resource, 1); |
169 | sa11x0_register_mcp(&cerf_mcp_data); | |
1da177e4 LT |
170 | } |
171 | ||
172 | MACHINE_START(CERF, "Intrinsyc CerfBoard/CerfCube") | |
e9dea0c6 | 173 | /* Maintainer: support@intrinsyc.com */ |
e9dea0c6 | 174 | .map_io = cerf_map_io, |
f314f33b | 175 | .nr_irqs = SA1100_NR_IRQS, |
e9dea0c6 | 176 | .init_irq = cerf_init_irq, |
6bb27d73 | 177 | .init_time = sa1100_timer_init, |
1da177e4 | 178 | .init_machine = cerf_init, |
7fea1ba5 | 179 | .init_late = sa11x0_init_late, |
d9ca5839 | 180 | .restart = sa11x0_restart, |
1da177e4 | 181 | MACHINE_END |