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Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * linux/arch/arm/mach-sa1100/lart.c | |
3 | */ | |
4 | ||
5 | #include <linux/init.h> | |
6 | #include <linux/kernel.h> | |
7 | #include <linux/tty.h> | |
18775a7b BW |
8 | #include <linux/gpio.h> |
9 | #include <linux/leds.h> | |
10 | #include <linux/platform_device.h> | |
1da177e4 | 11 | |
e1b7a72a RK |
12 | #include <video/sa1100fb.h> |
13 | ||
a09e64fb | 14 | #include <mach/hardware.h> |
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15 | #include <asm/setup.h> |
16 | #include <asm/mach-types.h> | |
5876ee95 | 17 | #include <asm/page.h> |
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18 | |
19 | #include <asm/mach/arch.h> | |
20 | #include <asm/mach/map.h> | |
21 | #include <asm/mach/serial_sa1100.h> | |
a1fd844c | 22 | #include <linux/platform_data/mfd-mcp-sa11x0.h> |
f314f33b | 23 | #include <mach/irqs.h> |
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24 | |
25 | #include "generic.h" | |
26 | ||
27 | ||
28 | #warning "include/asm/arch-sa1100/ide.h needs fixing for lart" | |
29 | ||
323cdfc1 RK |
30 | static struct mcp_plat_data lart_mcp_data = { |
31 | .mccr0 = MCCR0_ADM, | |
32 | .sclk_rate = 11981000, | |
33 | }; | |
34 | ||
e1b7a72a RK |
35 | #ifdef LART_GREY_LCD |
36 | static struct sa1100fb_mach_info lart_grey_info = { | |
37 | .pixclock = 150000, .bpp = 4, | |
38 | .xres = 320, .yres = 240, | |
39 | ||
40 | .hsync_len = 1, .vsync_len = 1, | |
41 | .left_margin = 4, .upper_margin = 0, | |
42 | .right_margin = 2, .lower_margin = 0, | |
43 | ||
44 | .cmap_greyscale = 1, | |
45 | .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, | |
46 | ||
47 | .lccr0 = LCCR0_Mono | LCCR0_Sngl | LCCR0_Pas | LCCR0_4PixMono, | |
48 | .lccr3 = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(512), | |
49 | }; | |
50 | #endif | |
51 | #ifdef LART_COLOR_LCD | |
52 | static struct sa1100fb_mach_info lart_color_info = { | |
53 | .pixclock = 150000, .bpp = 16, | |
54 | .xres = 320, .yres = 240, | |
55 | ||
56 | .hsync_len = 2, .vsync_len = 3, | |
57 | .left_margin = 69, .upper_margin = 14, | |
58 | .right_margin = 8, .lower_margin = 4, | |
59 | ||
60 | .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act, | |
61 | .lccr3 = LCCR3_OutEnH | LCCR3_PixFlEdg | LCCR3_ACBsDiv(512), | |
62 | }; | |
63 | #endif | |
64 | #ifdef LART_VIDEO_OUT | |
65 | static struct sa1100fb_mach_info lart_video_info = { | |
66 | .pixclock = 39721, .bpp = 16, | |
67 | .xres = 640, .yres = 480, | |
68 | ||
69 | .hsync_len = 95, .vsync_len = 2, | |
70 | .left_margin = 40, .upper_margin = 32, | |
71 | .right_margin = 24, .lower_margin = 11, | |
72 | ||
73 | .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, | |
74 | ||
75 | .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act, | |
76 | .lccr3 = LCCR3_OutEnL | LCCR3_PixFlEdg | LCCR3_ACBsDiv(512), | |
77 | }; | |
78 | #endif | |
79 | ||
80 | #ifdef LART_KIT01_LCD | |
81 | static struct sa1100fb_mach_info lart_kit01_info = { | |
82 | .pixclock = 63291, .bpp = 16, | |
83 | .xres = 640, .yres = 480, | |
84 | ||
85 | .hsync_len = 64, .vsync_len = 3, | |
86 | .left_margin = 122, .upper_margin = 45, | |
87 | .right_margin = 10, .lower_margin = 10, | |
88 | ||
89 | .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act, | |
90 | .lccr3 = LCCR3_OutEnH | LCCR3_PixFlEdg | |
91 | }; | |
92 | #endif | |
93 | ||
323cdfc1 RK |
94 | static void __init lart_init(void) |
95 | { | |
e1b7a72a RK |
96 | struct sa1100fb_mach_info *inf = NULL; |
97 | ||
98 | #ifdef LART_GREY_LCD | |
99 | inf = &lart_grey_info; | |
100 | #endif | |
101 | #ifdef LART_COLOR_LCD | |
102 | inf = &lart_color_info; | |
103 | #endif | |
104 | #ifdef LART_VIDEO_OUT | |
105 | inf = &lart_video_info; | |
106 | #endif | |
107 | #ifdef LART_KIT01_LCD | |
108 | inf = &lart_kit01_info; | |
109 | #endif | |
110 | ||
111 | if (inf) | |
112 | sa11x0_register_lcd(inf); | |
113 | ||
e36e26a8 | 114 | sa11x0_ppc_configure_mcp(); |
7a5b4e16 | 115 | sa11x0_register_mcp(&lart_mcp_data); |
323cdfc1 RK |
116 | } |
117 | ||
1da177e4 | 118 | static struct map_desc lart_io_desc[] __initdata = { |
92519d82 DS |
119 | { /* main flash memory */ |
120 | .virtual = 0xe8000000, | |
121 | .pfn = __phys_to_pfn(0x00000000), | |
122 | .length = 0x00400000, | |
123 | .type = MT_DEVICE | |
124 | }, { /* main flash, alternative location */ | |
125 | .virtual = 0xec000000, | |
126 | .pfn = __phys_to_pfn(0x08000000), | |
127 | .length = 0x00400000, | |
128 | .type = MT_DEVICE | |
129 | } | |
1da177e4 LT |
130 | }; |
131 | ||
18775a7b BW |
132 | /* LEDs */ |
133 | struct gpio_led lart_gpio_leds[] = { | |
134 | { | |
135 | .name = "lart:red", | |
136 | .default_trigger = "cpu0", | |
137 | .gpio = 23, | |
138 | }, | |
139 | }; | |
140 | ||
141 | static struct gpio_led_platform_data lart_gpio_led_info = { | |
142 | .leds = lart_gpio_leds, | |
143 | .num_leds = ARRAY_SIZE(lart_gpio_leds), | |
144 | }; | |
145 | ||
146 | static struct platform_device lart_leds = { | |
147 | .name = "leds-gpio", | |
148 | .id = -1, | |
149 | .dev = { | |
150 | .platform_data = &lart_gpio_led_info, | |
151 | } | |
152 | }; | |
1da177e4 LT |
153 | static void __init lart_map_io(void) |
154 | { | |
155 | sa1100_map_io(); | |
156 | iotable_init(lart_io_desc, ARRAY_SIZE(lart_io_desc)); | |
157 | ||
158 | sa1100_register_uart(0, 3); | |
159 | sa1100_register_uart(1, 1); | |
160 | sa1100_register_uart(2, 2); | |
161 | ||
162 | GAFR |= (GPIO_UART_TXD | GPIO_UART_RXD); | |
163 | GPDR |= GPIO_UART_TXD; | |
164 | GPDR &= ~GPIO_UART_RXD; | |
165 | PPAR |= PPAR_UPR; | |
18775a7b BW |
166 | |
167 | platform_device_register(&lart_leds); | |
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168 | } |
169 | ||
170 | MACHINE_START(LART, "LART") | |
17f4425d | 171 | .atag_offset = 0x100, |
e9dea0c6 | 172 | .map_io = lart_map_io, |
f314f33b | 173 | .nr_irqs = SA1100_NR_IRQS, |
e9dea0c6 | 174 | .init_irq = sa1100_init_irq, |
323cdfc1 | 175 | .init_machine = lart_init, |
7fea1ba5 | 176 | .init_late = sa11x0_init_late, |
1da177e4 | 177 | .timer = &sa1100_timer, |
d9ca5839 | 178 | .restart = sa11x0_restart, |
1da177e4 | 179 | MACHINE_END |