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Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * linux/arch/arm/mach-sa1100/neponset.c | |
1da177e4 | 3 | */ |
9590e898 | 4 | #include <linux/err.h> |
1da177e4 | 5 | #include <linux/init.h> |
1da177e4 | 6 | #include <linux/ioport.h> |
ced8d21c | 7 | #include <linux/irq.h> |
92e617d9 | 8 | #include <linux/kernel.h> |
ae14c2e2 | 9 | #include <linux/module.h> |
d052d1be | 10 | #include <linux/platform_device.h> |
92e617d9 | 11 | #include <linux/serial_core.h> |
ae14c2e2 | 12 | #include <linux/slab.h> |
1da177e4 | 13 | |
1da177e4 | 14 | #include <asm/mach-types.h> |
1da177e4 | 15 | #include <asm/mach/map.h> |
1da177e4 | 16 | #include <asm/mach/serial_sa1100.h> |
1da177e4 LT |
17 | #include <asm/hardware/sa1111.h> |
18 | #include <asm/sizes.h> | |
19 | ||
92e617d9 RK |
20 | #include <mach/hardware.h> |
21 | #include <mach/assabet.h> | |
22 | #include <mach/neponset.h> | |
23 | ||
ced8d21c RK |
24 | #define NEP_IRQ_SMC91X 0 |
25 | #define NEP_IRQ_USAR 1 | |
26 | #define NEP_IRQ_SA1111 2 | |
27 | #define NEP_IRQ_NR 3 | |
28 | ||
ae14c2e2 | 29 | struct neponset_drvdata { |
9590e898 RK |
30 | struct platform_device *sa1111; |
31 | struct platform_device *smc91x; | |
ced8d21c | 32 | unsigned irq_base; |
ae14c2e2 RK |
33 | #ifdef CONFIG_PM_SLEEP |
34 | u32 ncr0; | |
35 | u32 mdm_ctl_0; | |
36 | #endif | |
37 | }; | |
38 | ||
6ad1b614 RK |
39 | void neponset_ncr_frob(unsigned int mask, unsigned int val) |
40 | { | |
41 | unsigned long flags; | |
42 | ||
43 | local_irq_save(flags); | |
44 | NCR_0 = (NCR_0 & ~mask) | val; | |
45 | local_irq_restore(flags); | |
46 | } | |
47 | ||
92e617d9 RK |
48 | static void neponset_set_mctrl(struct uart_port *port, u_int mctrl) |
49 | { | |
50 | u_int mdm_ctl0 = MDM_CTL_0; | |
51 | ||
52 | if (port->mapbase == _Ser1UTCR0) { | |
53 | if (mctrl & TIOCM_RTS) | |
54 | mdm_ctl0 &= ~MDM_CTL0_RTS2; | |
55 | else | |
56 | mdm_ctl0 |= MDM_CTL0_RTS2; | |
57 | ||
58 | if (mctrl & TIOCM_DTR) | |
59 | mdm_ctl0 &= ~MDM_CTL0_DTR2; | |
60 | else | |
61 | mdm_ctl0 |= MDM_CTL0_DTR2; | |
62 | } else if (port->mapbase == _Ser3UTCR0) { | |
63 | if (mctrl & TIOCM_RTS) | |
64 | mdm_ctl0 &= ~MDM_CTL0_RTS1; | |
65 | else | |
66 | mdm_ctl0 |= MDM_CTL0_RTS1; | |
67 | ||
68 | if (mctrl & TIOCM_DTR) | |
69 | mdm_ctl0 &= ~MDM_CTL0_DTR1; | |
70 | else | |
71 | mdm_ctl0 |= MDM_CTL0_DTR1; | |
72 | } | |
73 | ||
74 | MDM_CTL_0 = mdm_ctl0; | |
75 | } | |
76 | ||
77 | static u_int neponset_get_mctrl(struct uart_port *port) | |
78 | { | |
79 | u_int ret = TIOCM_CD | TIOCM_CTS | TIOCM_DSR; | |
80 | u_int mdm_ctl1 = MDM_CTL_1; | |
81 | ||
82 | if (port->mapbase == _Ser1UTCR0) { | |
83 | if (mdm_ctl1 & MDM_CTL1_DCD2) | |
84 | ret &= ~TIOCM_CD; | |
85 | if (mdm_ctl1 & MDM_CTL1_CTS2) | |
86 | ret &= ~TIOCM_CTS; | |
87 | if (mdm_ctl1 & MDM_CTL1_DSR2) | |
88 | ret &= ~TIOCM_DSR; | |
89 | } else if (port->mapbase == _Ser3UTCR0) { | |
90 | if (mdm_ctl1 & MDM_CTL1_DCD1) | |
91 | ret &= ~TIOCM_CD; | |
92 | if (mdm_ctl1 & MDM_CTL1_CTS1) | |
93 | ret &= ~TIOCM_CTS; | |
94 | if (mdm_ctl1 & MDM_CTL1_DSR1) | |
95 | ret &= ~TIOCM_DSR; | |
96 | } | |
97 | ||
98 | return ret; | |
99 | } | |
100 | ||
101 | static struct sa1100_port_fns neponset_port_fns __devinitdata = { | |
102 | .set_mctrl = neponset_set_mctrl, | |
103 | .get_mctrl = neponset_get_mctrl, | |
104 | }; | |
105 | ||
1da177e4 LT |
106 | /* |
107 | * Install handler for Neponset IRQ. Note that we have to loop here | |
108 | * since the ETHERNET and USAR IRQs are level based, and we need to | |
109 | * ensure that the IRQ signal is deasserted before returning. This | |
110 | * is rather unfortunate. | |
111 | */ | |
ced8d21c | 112 | static void neponset_irq_handler(unsigned int irq, struct irq_desc *desc) |
1da177e4 | 113 | { |
ced8d21c | 114 | struct neponset_drvdata *d = irq_desc_get_handler_data(desc); |
1da177e4 LT |
115 | unsigned int irr; |
116 | ||
117 | while (1) { | |
1da177e4 LT |
118 | /* |
119 | * Acknowledge the parent IRQ. | |
120 | */ | |
c4e8964e | 121 | desc->irq_data.chip->irq_ack(&desc->irq_data); |
1da177e4 LT |
122 | |
123 | /* | |
124 | * Read the interrupt reason register. Let's have all | |
125 | * active IRQ bits high. Note: there is a typo in the | |
126 | * Neponset user's guide for the SA1111 IRR level. | |
127 | */ | |
128 | irr = IRR ^ (IRR_ETHERNET | IRR_USAR); | |
129 | ||
130 | if ((irr & (IRR_ETHERNET | IRR_USAR | IRR_SA1111)) == 0) | |
131 | break; | |
132 | ||
133 | /* | |
134 | * Since there is no individual mask, we have to | |
135 | * mask the parent IRQ. This is safe, since we'll | |
136 | * recheck the register for any pending IRQs. | |
137 | */ | |
138 | if (irr & (IRR_ETHERNET | IRR_USAR)) { | |
c4e8964e | 139 | desc->irq_data.chip->irq_mask(&desc->irq_data); |
1da177e4 | 140 | |
d782f33d RK |
141 | /* |
142 | * Ack the interrupt now to prevent re-entering | |
143 | * this neponset handler. Again, this is safe | |
144 | * since we'll check the IRR register prior to | |
145 | * leaving. | |
146 | */ | |
c4e8964e | 147 | desc->irq_data.chip->irq_ack(&desc->irq_data); |
d782f33d | 148 | |
ced8d21c RK |
149 | if (irr & IRR_ETHERNET) |
150 | generic_handle_irq(d->irq_base + NEP_IRQ_SMC91X); | |
1da177e4 | 151 | |
ced8d21c RK |
152 | if (irr & IRR_USAR) |
153 | generic_handle_irq(d->irq_base + NEP_IRQ_USAR); | |
1da177e4 | 154 | |
c4e8964e | 155 | desc->irq_data.chip->irq_unmask(&desc->irq_data); |
1da177e4 LT |
156 | } |
157 | ||
ced8d21c RK |
158 | if (irr & IRR_SA1111) |
159 | generic_handle_irq(d->irq_base + NEP_IRQ_SA1111); | |
1da177e4 LT |
160 | } |
161 | } | |
162 | ||
ced8d21c | 163 | /* Yes, we really do not have any kind of masking or unmasking */ |
71045520 RK |
164 | static void nochip_noop(struct irq_data *irq) |
165 | { | |
166 | } | |
167 | ||
168 | static struct irq_chip nochip = { | |
169 | .name = "neponset", | |
170 | .irq_ack = nochip_noop, | |
171 | .irq_mask = nochip_noop, | |
172 | .irq_unmask = nochip_noop, | |
173 | }; | |
174 | ||
92e617d9 RK |
175 | static struct sa1111_platform_data sa1111_info = { |
176 | .irq_base = IRQ_BOARD_END, | |
177 | }; | |
178 | ||
cdea4606 | 179 | static int __devinit neponset_probe(struct platform_device *dev) |
1da177e4 | 180 | { |
ae14c2e2 | 181 | struct neponset_drvdata *d; |
ced8d21c RK |
182 | struct resource sa1111_resources[] = { |
183 | DEFINE_RES_MEM(0x40000000, SZ_8K), | |
184 | { .flags = IORESOURCE_IRQ }, | |
185 | }; | |
9590e898 RK |
186 | struct platform_device_info sa1111_devinfo = { |
187 | .parent = &dev->dev, | |
188 | .name = "sa1111", | |
189 | .id = 0, | |
190 | .res = sa1111_resources, | |
191 | .num_res = ARRAY_SIZE(sa1111_resources), | |
192 | .data = &sa1111_info, | |
193 | .size_data = sizeof(sa1111_info), | |
194 | .dma_mask = 0xffffffffUL, | |
195 | }; | |
ced8d21c RK |
196 | struct resource smc91x_resources[] = { |
197 | DEFINE_RES_MEM_NAMED(SA1100_CS3_PHYS, | |
198 | 0x02000000, "smc91x-regs"), | |
199 | DEFINE_RES_MEM_NAMED(SA1100_CS3_PHYS + 0x02000000, | |
200 | 0x02000000, "smc91x-attrib"), | |
201 | { .flags = IORESOURCE_IRQ }, | |
202 | }; | |
9590e898 RK |
203 | struct platform_device_info smc91x_devinfo = { |
204 | .parent = &dev->dev, | |
205 | .name = "smc91x", | |
206 | .id = 0, | |
207 | .res = smc91x_resources, | |
208 | .num_res = ARRAY_SIZE(smc91x_resources), | |
209 | }; | |
b6bdfcf5 RK |
210 | int ret, irq; |
211 | ||
212 | irq = ret = platform_get_irq(dev, 0); | |
213 | if (ret < 0) | |
214 | goto err_alloc; | |
ae14c2e2 RK |
215 | |
216 | d = kzalloc(sizeof(*d), GFP_KERNEL); | |
217 | if (!d) { | |
218 | ret = -ENOMEM; | |
219 | goto err_alloc; | |
220 | } | |
221 | ||
ced8d21c RK |
222 | ret = irq_alloc_descs(-1, IRQ_BOARD_START, NEP_IRQ_NR, -1); |
223 | if (ret <= 0) { | |
224 | dev_err(&dev->dev, "unable to allocate %u irqs: %d\n", | |
225 | NEP_IRQ_NR, ret); | |
226 | if (ret == 0) | |
227 | ret = -ENOMEM; | |
228 | goto err_irq_alloc; | |
229 | } | |
230 | ||
231 | d->irq_base = ret; | |
232 | ||
233 | irq_set_chip_and_handler(d->irq_base + NEP_IRQ_SMC91X, &nochip, | |
234 | handle_simple_irq); | |
235 | set_irq_flags(d->irq_base + NEP_IRQ_SMC91X, IRQF_VALID | IRQF_PROBE); | |
236 | irq_set_chip_and_handler(d->irq_base + NEP_IRQ_USAR, &nochip, | |
237 | handle_simple_irq); | |
238 | set_irq_flags(d->irq_base + NEP_IRQ_USAR, IRQF_VALID | IRQF_PROBE); | |
239 | irq_set_chip(d->irq_base + NEP_IRQ_SA1111, &nochip); | |
1da177e4 | 240 | |
b6bdfcf5 RK |
241 | irq_set_irq_type(irq, IRQ_TYPE_EDGE_RISING); |
242 | irq_set_handler_data(irq, d); | |
243 | irq_set_chained_handler(irq, neponset_irq_handler); | |
1da177e4 LT |
244 | |
245 | /* | |
ced8d21c RK |
246 | * We would set IRQ_GPIO25 to be a wake-up IRQ, but unfortunately |
247 | * something on the Neponset activates this IRQ on sleep (eth?) | |
1da177e4 LT |
248 | */ |
249 | #if 0 | |
b6bdfcf5 | 250 | enable_irq_wake(irq); |
1da177e4 LT |
251 | #endif |
252 | ||
ced8d21c RK |
253 | dev_info(&dev->dev, "Neponset daughter board, providing IRQ%u-%u\n", |
254 | d->irq_base, d->irq_base + NEP_IRQ_NR - 1); | |
1da177e4 | 255 | |
ced8d21c RK |
256 | sa1100_register_uart_fns(&neponset_port_fns); |
257 | ||
258 | /* Disable GPIO 0/1 drivers so the buttons work on the Assabet */ | |
1da177e4 LT |
259 | NCR_0 = NCR_GP01_OFF; |
260 | ||
ced8d21c RK |
261 | sa1111_resources[1].start = d->irq_base + NEP_IRQ_SA1111; |
262 | sa1111_resources[1].end = d->irq_base + NEP_IRQ_SA1111; | |
9590e898 | 263 | d->sa1111 = platform_device_register_full(&sa1111_devinfo); |
ced8d21c RK |
264 | |
265 | smc91x_resources[2].start = d->irq_base + NEP_IRQ_SMC91X; | |
266 | smc91x_resources[2].end = d->irq_base + NEP_IRQ_SMC91X; | |
9590e898 RK |
267 | d->smc91x = platform_device_register_full(&smc91x_devinfo); |
268 | ||
ae14c2e2 RK |
269 | platform_set_drvdata(dev, d); |
270 | ||
1da177e4 | 271 | return 0; |
ae14c2e2 | 272 | |
ced8d21c RK |
273 | err_irq_alloc: |
274 | kfree(d); | |
ae14c2e2 RK |
275 | err_alloc: |
276 | return ret; | |
1da177e4 LT |
277 | } |
278 | ||
ae14c2e2 RK |
279 | static int __devexit neponset_remove(struct platform_device *dev) |
280 | { | |
281 | struct neponset_drvdata *d = platform_get_drvdata(dev); | |
b6bdfcf5 | 282 | int irq = platform_get_irq(dev, 0); |
1da177e4 | 283 | |
9590e898 RK |
284 | if (!IS_ERR(d->sa1111)) |
285 | platform_device_unregister(d->sa1111); | |
286 | if (!IS_ERR(d->smc91x)) | |
287 | platform_device_unregister(d->smc91x); | |
b6bdfcf5 | 288 | irq_set_chained_handler(irq, NULL); |
ced8d21c | 289 | irq_free_descs(d->irq_base, NEP_IRQ_NR); |
ae14c2e2 RK |
290 | kfree(d); |
291 | ||
292 | return 0; | |
293 | } | |
93160c63 | 294 | |
ae14c2e2 | 295 | #ifdef CONFIG_PM |
3ae5eaec | 296 | static int neponset_suspend(struct platform_device *dev, pm_message_t state) |
1da177e4 | 297 | { |
ae14c2e2 RK |
298 | struct neponset_drvdata *d = platform_get_drvdata(dev); |
299 | ||
300 | d->ncr0 = NCR_0; | |
301 | d->mdm_ctl_0 = MDM_CTL_0; | |
1da177e4 LT |
302 | |
303 | return 0; | |
304 | } | |
305 | ||
3ae5eaec | 306 | static int neponset_resume(struct platform_device *dev) |
1da177e4 | 307 | { |
ae14c2e2 RK |
308 | struct neponset_drvdata *d = platform_get_drvdata(dev); |
309 | ||
310 | NCR_0 = d->ncr0; | |
311 | MDM_CTL_0 = d->mdm_ctl_0; | |
1da177e4 LT |
312 | |
313 | return 0; | |
314 | } | |
315 | ||
316 | #else | |
317 | #define neponset_suspend NULL | |
318 | #define neponset_resume NULL | |
319 | #endif | |
320 | ||
3ae5eaec | 321 | static struct platform_driver neponset_device_driver = { |
1da177e4 | 322 | .probe = neponset_probe, |
ae14c2e2 | 323 | .remove = __devexit_p(neponset_remove), |
1da177e4 LT |
324 | .suspend = neponset_suspend, |
325 | .resume = neponset_resume, | |
3ae5eaec RK |
326 | .driver = { |
327 | .name = "neponset", | |
398e58d0 | 328 | .owner = THIS_MODULE, |
3ae5eaec | 329 | }, |
1da177e4 LT |
330 | }; |
331 | ||
332 | static struct resource neponset_resources[] = { | |
b6bdfcf5 RK |
333 | DEFINE_RES_MEM(0x10000000, 0x08000000), |
334 | DEFINE_RES_IRQ(IRQ_GPIO25), | |
1da177e4 LT |
335 | }; |
336 | ||
337 | static struct platform_device neponset_device = { | |
338 | .name = "neponset", | |
339 | .id = 0, | |
340 | .num_resources = ARRAY_SIZE(neponset_resources), | |
341 | .resource = neponset_resources, | |
342 | }; | |
343 | ||
cdcb81f7 RK |
344 | extern void sa1110_mb_disable(void); |
345 | ||
1da177e4 LT |
346 | static int __init neponset_init(void) |
347 | { | |
3ae5eaec | 348 | platform_driver_register(&neponset_device_driver); |
1da177e4 LT |
349 | |
350 | /* | |
351 | * The Neponset is only present on the Assabet machine type. | |
352 | */ | |
353 | if (!machine_is_assabet()) | |
354 | return -ENODEV; | |
355 | ||
356 | /* | |
357 | * Ensure that the memory bus request/grant signals are setup, | |
358 | * and the grant is held in its inactive state, whether or not | |
359 | * we actually have a Neponset attached. | |
360 | */ | |
361 | sa1110_mb_disable(); | |
362 | ||
363 | if (!machine_has_neponset()) { | |
364 | printk(KERN_DEBUG "Neponset expansion board not present\n"); | |
365 | return -ENODEV; | |
366 | } | |
367 | ||
368 | if (WHOAMI != 0x11) { | |
369 | printk(KERN_WARNING "Neponset board detected, but " | |
370 | "wrong ID: %02x\n", WHOAMI); | |
371 | return -ENODEV; | |
372 | } | |
373 | ||
9590e898 | 374 | return platform_device_register(&neponset_device); |
1da177e4 LT |
375 | } |
376 | ||
377 | subsys_initcall(neponset_init); | |
378 | ||
379 | static struct map_desc neponset_io_desc[] __initdata = { | |
92519d82 DS |
380 | { /* System Registers */ |
381 | .virtual = 0xf3000000, | |
382 | .pfn = __phys_to_pfn(0x10000000), | |
383 | .length = SZ_1M, | |
384 | .type = MT_DEVICE | |
385 | }, { /* SA-1111 */ | |
386 | .virtual = 0xf4000000, | |
387 | .pfn = __phys_to_pfn(0x40000000), | |
388 | .length = SZ_1M, | |
389 | .type = MT_DEVICE | |
390 | } | |
1da177e4 LT |
391 | }; |
392 | ||
393 | void __init neponset_map_io(void) | |
394 | { | |
395 | iotable_init(neponset_io_desc, ARRAY_SIZE(neponset_io_desc)); | |
396 | } |