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2b7eda63 MD |
1 | /* |
2 | * AP4EVB board support | |
3 | * | |
4 | * Copyright (C) 2010 Magnus Damm | |
5 | * Copyright (C) 2008 Yoshihiro Shimoda | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License as published by | |
9 | * the Free Software Foundation; version 2 of the License. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program; if not, write to the Free Software | |
18 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | |
19 | */ | |
8eda2f21 | 20 | #include <linux/clk.h> |
2b7eda63 MD |
21 | #include <linux/kernel.h> |
22 | #include <linux/init.h> | |
23 | #include <linux/interrupt.h> | |
24 | #include <linux/irq.h> | |
25 | #include <linux/platform_device.h> | |
26 | #include <linux/delay.h> | |
410d878b | 27 | #include <linux/mfd/tmio.h> |
341291a6 | 28 | #include <linux/mmc/host.h> |
17e75d82 | 29 | #include <linux/mmc/sh_mobile_sdhi.h> |
2b7eda63 MD |
30 | #include <linux/mtd/mtd.h> |
31 | #include <linux/mtd/partitions.h> | |
32 | #include <linux/mtd/physmap.h> | |
c8ee3d4b | 33 | #include <linux/mmc/sh_mmcif.h> |
91cf5082 KM |
34 | #include <linux/i2c.h> |
35 | #include <linux/i2c/tsc2007.h> | |
2b7eda63 | 36 | #include <linux/io.h> |
1b7e0677 | 37 | #include <linux/smsc911x.h> |
cb9215e1 KM |
38 | #include <linux/sh_intc.h> |
39 | #include <linux/sh_clk.h> | |
1b7e0677 | 40 | #include <linux/gpio.h> |
17ccb834 | 41 | #include <linux/input.h> |
2863e935 | 42 | #include <linux/leds.h> |
17ccb834 | 43 | #include <linux/input/sh_keysc.h> |
fb54d268 | 44 | #include <linux/usb/r8a66597.h> |
b5e8d269 | 45 | #include <linux/pm_clock.h> |
9b742024 | 46 | #include <linux/dma-mapping.h> |
8eda2f21 | 47 | |
1a0b1eac GL |
48 | #include <media/sh_mobile_ceu.h> |
49 | #include <media/sh_mobile_csi2.h> | |
50 | #include <media/soc_camera.h> | |
51 | ||
cb9215e1 KM |
52 | #include <sound/sh_fsi.h> |
53 | ||
dfbcdf64 | 54 | #include <video/sh_mobile_hdmi.h> |
8eda2f21 GL |
55 | #include <video/sh_mobile_lcdc.h> |
56 | #include <video/sh_mipi_dsi.h> | |
57 | ||
2b7eda63 | 58 | #include <mach/common.h> |
8eda2f21 | 59 | #include <mach/irqs.h> |
1b7e0677 | 60 | #include <mach/sh7372.h> |
8eda2f21 | 61 | |
2b7eda63 MD |
62 | #include <asm/mach-types.h> |
63 | #include <asm/mach/arch.h> | |
64 | #include <asm/mach/map.h> | |
495b3cea | 65 | #include <asm/mach/time.h> |
3d09fbcd | 66 | #include <asm/setup.h> |
2b7eda63 | 67 | |
02624a17 KM |
68 | /* |
69 | * Address Interface BusWidth note | |
70 | * ------------------------------------------------------------------ | |
71 | * 0x0000_0000 NOR Flash ROM (MCP) 16bit SW7 : bit1 = ON | |
72 | * 0x0800_0000 user area - | |
73 | * 0x1000_0000 NOR Flash ROM (MCP) 16bit SW7 : bit1 = OFF | |
74 | * 0x1400_0000 Ether (LAN9220) 16bit | |
75 | * 0x1600_0000 user area - cannot use with NAND | |
76 | * 0x1800_0000 user area - | |
77 | * 0x1A00_0000 - | |
78 | * 0x4000_0000 LPDDR2-SDRAM (POP) 32bit | |
79 | */ | |
80 | ||
81 | /* | |
82 | * NOR Flash ROM | |
83 | * | |
84 | * SW1 | SW2 | SW7 | NOR Flash ROM | |
85 | * bit1 | bit1 bit2 | bit1 | Memory allocation | |
86 | * ------+------------+------+------------------ | |
87 | * OFF | ON OFF | ON | Area 0 | |
88 | * OFF | ON OFF | OFF | Area 4 | |
89 | */ | |
90 | ||
91 | /* | |
92 | * NAND Flash ROM | |
93 | * | |
94 | * SW1 | SW2 | SW7 | NAND Flash ROM | |
95 | * bit1 | bit1 bit2 | bit2 | Memory allocation | |
96 | * ------+------------+------+------------------ | |
97 | * OFF | ON OFF | ON | FCE 0 | |
98 | * OFF | ON OFF | OFF | FCE 1 | |
99 | */ | |
100 | ||
101 | /* | |
102 | * SMSC 9220 | |
103 | * | |
104 | * SW1 SMSC 9220 | |
105 | * ----------------------- | |
106 | * ON access disable | |
107 | * OFF access enable | |
108 | */ | |
109 | ||
17ccb834 | 110 | /* |
dda128dc | 111 | * LCD / IRQ / KEYSC / IrDA |
17ccb834 | 112 | * |
9fa1b7fe KM |
113 | * IRQ = IRQ26 (TS), IRQ27 (VIO), IRQ28 (QHD-TouchScreen) |
114 | * LCD = 2nd LCDC (WVGA) | |
dda128dc KM |
115 | * |
116 | * | SW43 | | |
117 | * SW3 | ON | OFF | | |
118 | * -------------+-----------------------+---------------+ | |
119 | * ON | KEY / IrDA | LCD | | |
120 | * OFF | KEY / IrDA / IRQ | IRQ | | |
9fa1b7fe KM |
121 | * |
122 | * | |
123 | * QHD / WVGA display | |
124 | * | |
125 | * You can choice display type on menuconfig. | |
126 | * Then, check above dip-switch. | |
17ccb834 KM |
127 | */ |
128 | ||
fb54d268 KM |
129 | /* |
130 | * USB | |
131 | * | |
132 | * J7 : 1-2 MAX3355E VBUS | |
133 | * 2-3 DC 5.0V | |
134 | * | |
135 | * S39: bit2: off | |
136 | */ | |
137 | ||
cb9215e1 KM |
138 | /* |
139 | * FSI/FSMI | |
140 | * | |
141 | * SW41 : ON : SH-Mobile AP4 Audio Mode | |
142 | * : OFF : Bluetooth Audio Mode | |
143 | */ | |
144 | ||
c8ee3d4b | 145 | /* |
d3d03e48 | 146 | * MMC0/SDHI1 (CN7) |
c8ee3d4b | 147 | * |
d3d03e48 KM |
148 | * J22 : select card voltage |
149 | * 1-2 pin : 1.8v | |
150 | * 2-3 pin : 3.3v | |
151 | * | |
152 | * SW1 | SW33 | |
153 | * | bit1 | bit2 | bit3 | bit4 | |
154 | * ------------+------+------+------+------- | |
155 | * MMC0 OFF | OFF | ON | ON | X | |
156 | * SDHI1 OFF | ON | X | OFF | ON | |
157 | * | |
158 | * voltage lebel | |
159 | * CN7 : 1.8v | |
160 | * CN12: 3.3v | |
c8ee3d4b KM |
161 | */ |
162 | ||
1b7e0677 | 163 | /* MTD */ |
2b7eda63 MD |
164 | static struct mtd_partition nor_flash_partitions[] = { |
165 | { | |
166 | .name = "loader", | |
167 | .offset = 0x00000000, | |
168 | .size = 512 * 1024, | |
2e351ec6 | 169 | .mask_flags = MTD_WRITEABLE, |
2b7eda63 MD |
170 | }, |
171 | { | |
172 | .name = "bootenv", | |
173 | .offset = MTDPART_OFS_APPEND, | |
174 | .size = 512 * 1024, | |
2e351ec6 | 175 | .mask_flags = MTD_WRITEABLE, |
2b7eda63 MD |
176 | }, |
177 | { | |
178 | .name = "kernel_ro", | |
179 | .offset = MTDPART_OFS_APPEND, | |
180 | .size = 8 * 1024 * 1024, | |
181 | .mask_flags = MTD_WRITEABLE, | |
182 | }, | |
183 | { | |
184 | .name = "kernel", | |
185 | .offset = MTDPART_OFS_APPEND, | |
186 | .size = 8 * 1024 * 1024, | |
187 | }, | |
188 | { | |
189 | .name = "data", | |
190 | .offset = MTDPART_OFS_APPEND, | |
191 | .size = MTDPART_SIZ_FULL, | |
192 | }, | |
193 | }; | |
194 | ||
195 | static struct physmap_flash_data nor_flash_data = { | |
196 | .width = 2, | |
197 | .parts = nor_flash_partitions, | |
198 | .nr_parts = ARRAY_SIZE(nor_flash_partitions), | |
199 | }; | |
200 | ||
201 | static struct resource nor_flash_resources[] = { | |
202 | [0] = { | |
832217da | 203 | .start = 0x20000000, /* CS0 shadow instead of regular CS0 */ |
8e6a4675 | 204 | .end = 0x28000000 - 1, /* needed by USB MASK ROM boot */ |
2b7eda63 MD |
205 | .flags = IORESOURCE_MEM, |
206 | } | |
207 | }; | |
208 | ||
209 | static struct platform_device nor_flash_device = { | |
210 | .name = "physmap-flash", | |
211 | .dev = { | |
212 | .platform_data = &nor_flash_data, | |
213 | }, | |
214 | .num_resources = ARRAY_SIZE(nor_flash_resources), | |
215 | .resource = nor_flash_resources, | |
216 | }; | |
217 | ||
1b7e0677 KM |
218 | /* SMSC 9220 */ |
219 | static struct resource smc911x_resources[] = { | |
220 | { | |
221 | .start = 0x14000000, | |
222 | .end = 0x16000000 - 1, | |
223 | .flags = IORESOURCE_MEM, | |
224 | }, { | |
33c9607a | 225 | .start = evt2irq(0x02c0) /* IRQ6A */, |
1b7e0677 KM |
226 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL, |
227 | }, | |
228 | }; | |
229 | ||
230 | static struct smsc911x_platform_config smsc911x_info = { | |
231 | .flags = SMSC911X_USE_16BIT | SMSC911X_SAVE_MAC_ADDRESS, | |
232 | .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, | |
233 | .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL, | |
234 | }; | |
235 | ||
236 | static struct platform_device smc911x_device = { | |
237 | .name = "smsc911x", | |
238 | .id = -1, | |
239 | .num_resources = ARRAY_SIZE(smc911x_resources), | |
240 | .resource = smc911x_resources, | |
241 | .dev = { | |
242 | .platform_data = &smsc911x_info, | |
243 | }, | |
244 | }; | |
2b7eda63 | 245 | |
68accd73 AH |
246 | /* |
247 | * The card detect pin of the top SD/MMC slot (CN7) is active low and is | |
248 | * connected to GPIO A22 of SH7372 (GPIO_PORT41). | |
249 | */ | |
250 | static int slot_cn7_get_cd(struct platform_device *pdev) | |
251 | { | |
ceb50f33 | 252 | return !gpio_get_value(GPIO_PORT41); |
68accd73 | 253 | } |
1c7fcbed DHG |
254 | /* MERAM */ |
255 | static struct sh_mobile_meram_info meram_info = { | |
256 | .addr_mode = SH_MOBILE_MERAM_MODE1, | |
257 | }; | |
258 | ||
259 | static struct resource meram_resources[] = { | |
260 | [0] = { | |
261 | .name = "MERAM", | |
262 | .start = 0xe8000000, | |
263 | .end = 0xe81fffff, | |
264 | .flags = IORESOURCE_MEM, | |
265 | }, | |
266 | }; | |
267 | ||
268 | static struct platform_device meram_device = { | |
269 | .name = "sh_mobile_meram", | |
270 | .id = 0, | |
271 | .num_resources = ARRAY_SIZE(meram_resources), | |
272 | .resource = meram_resources, | |
273 | .dev = { | |
274 | .platform_data = &meram_info, | |
275 | }, | |
276 | }; | |
68accd73 | 277 | |
c8ee3d4b KM |
278 | /* SH_MMCIF */ |
279 | static struct resource sh_mmcif_resources[] = { | |
280 | [0] = { | |
0fb0834b | 281 | .name = "MMCIF", |
c8ee3d4b KM |
282 | .start = 0xE6BD0000, |
283 | .end = 0xE6BD00FF, | |
284 | .flags = IORESOURCE_MEM, | |
285 | }, | |
286 | [1] = { | |
287 | /* MMC ERR */ | |
8d569341 | 288 | .start = evt2irq(0x1ac0), |
c8ee3d4b KM |
289 | .flags = IORESOURCE_IRQ, |
290 | }, | |
291 | [2] = { | |
292 | /* MMC NOR */ | |
8d569341 | 293 | .start = evt2irq(0x1ae0), |
c8ee3d4b KM |
294 | .flags = IORESOURCE_IRQ, |
295 | }, | |
296 | }; | |
297 | ||
df73af86 GL |
298 | static struct sh_mmcif_dma sh_mmcif_dma = { |
299 | .chan_priv_rx = { | |
300 | .slave_id = SHDMA_SLAVE_MMCIF_RX, | |
301 | }, | |
302 | .chan_priv_tx = { | |
303 | .slave_id = SHDMA_SLAVE_MMCIF_TX, | |
304 | }, | |
305 | }; | |
306 | ||
bb04e197 | 307 | static struct sh_mmcif_plat_data sh_mmcif_plat = { |
c8ee3d4b KM |
308 | .sup_pclk = 0, |
309 | .ocr = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34, | |
310 | .caps = MMC_CAP_4_BIT_DATA | | |
311 | MMC_CAP_8_BIT_DATA | | |
312 | MMC_CAP_NEEDS_POLL, | |
68accd73 | 313 | .get_cd = slot_cn7_get_cd, |
df73af86 | 314 | .dma = &sh_mmcif_dma, |
c8ee3d4b KM |
315 | }; |
316 | ||
317 | static struct platform_device sh_mmcif_device = { | |
318 | .name = "sh_mmcif", | |
319 | .id = 0, | |
320 | .dev = { | |
321 | .dma_mask = NULL, | |
322 | .coherent_dma_mask = 0xffffffff, | |
323 | .platform_data = &sh_mmcif_plat, | |
324 | }, | |
325 | .num_resources = ARRAY_SIZE(sh_mmcif_resources), | |
326 | .resource = sh_mmcif_resources, | |
327 | }; | |
328 | ||
3a14d039 | 329 | /* SDHI0 */ |
69bf6f45 | 330 | static struct sh_mobile_sdhi_info sdhi0_info = { |
341291a6 GL |
331 | .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX, |
332 | .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX, | |
330e4e71 | 333 | .tmio_caps = MMC_CAP_SDIO_IRQ, |
69bf6f45 GL |
334 | }; |
335 | ||
3a14d039 MD |
336 | static struct resource sdhi0_resources[] = { |
337 | [0] = { | |
338 | .name = "SDHI0", | |
339 | .start = 0xe6850000, | |
31d31fe7 | 340 | .end = 0xe68500ff, |
3a14d039 MD |
341 | .flags = IORESOURCE_MEM, |
342 | }, | |
343 | [1] = { | |
2007aea1 SH |
344 | .start = evt2irq(0x0e00) /* SDHI0_SDHI0I0 */, |
345 | .flags = IORESOURCE_IRQ, | |
346 | }, | |
347 | [2] = { | |
348 | .start = evt2irq(0x0e20) /* SDHI0_SDHI0I1 */, | |
349 | .flags = IORESOURCE_IRQ, | |
350 | }, | |
351 | [3] = { | |
352 | .start = evt2irq(0x0e40) /* SDHI0_SDHI0I2 */, | |
353 | .flags = IORESOURCE_IRQ, | |
3a14d039 MD |
354 | }, |
355 | }; | |
356 | ||
357 | static struct platform_device sdhi0_device = { | |
358 | .name = "sh_mobile_sdhi", | |
359 | .num_resources = ARRAY_SIZE(sdhi0_resources), | |
360 | .resource = sdhi0_resources, | |
361 | .id = 0, | |
69bf6f45 GL |
362 | .dev = { |
363 | .platform_data = &sdhi0_info, | |
364 | }, | |
3a14d039 MD |
365 | }; |
366 | ||
341291a6 GL |
367 | /* SDHI1 */ |
368 | static struct sh_mobile_sdhi_info sdhi1_info = { | |
369 | .dma_slave_tx = SHDMA_SLAVE_SDHI1_TX, | |
370 | .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX, | |
371 | .tmio_ocr_mask = MMC_VDD_165_195, | |
410d878b | 372 | .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE, |
330e4e71 | 373 | .tmio_caps = MMC_CAP_NEEDS_POLL | MMC_CAP_SDIO_IRQ, |
68accd73 | 374 | .get_cd = slot_cn7_get_cd, |
341291a6 GL |
375 | }; |
376 | ||
377 | static struct resource sdhi1_resources[] = { | |
378 | [0] = { | |
379 | .name = "SDHI1", | |
380 | .start = 0xe6860000, | |
31d31fe7 | 381 | .end = 0xe68600ff, |
341291a6 GL |
382 | .flags = IORESOURCE_MEM, |
383 | }, | |
384 | [1] = { | |
2007aea1 SH |
385 | .start = evt2irq(0x0e80), /* SDHI1_SDHI1I0 */ |
386 | .flags = IORESOURCE_IRQ, | |
387 | }, | |
388 | [2] = { | |
389 | .start = evt2irq(0x0ea0), /* SDHI1_SDHI1I1 */ | |
390 | .flags = IORESOURCE_IRQ, | |
391 | }, | |
392 | [3] = { | |
393 | .start = evt2irq(0x0ec0), /* SDHI1_SDHI1I2 */ | |
394 | .flags = IORESOURCE_IRQ, | |
341291a6 GL |
395 | }, |
396 | }; | |
397 | ||
398 | static struct platform_device sdhi1_device = { | |
399 | .name = "sh_mobile_sdhi", | |
400 | .num_resources = ARRAY_SIZE(sdhi1_resources), | |
401 | .resource = sdhi1_resources, | |
402 | .id = 1, | |
403 | .dev = { | |
404 | .platform_data = &sdhi1_info, | |
405 | }, | |
406 | }; | |
407 | ||
fb54d268 | 408 | /* USB1 */ |
bb04e197 | 409 | static void usb1_host_port_power(int port, int power) |
fb54d268 KM |
410 | { |
411 | if (!power) /* only power-on supported for now */ | |
412 | return; | |
413 | ||
414 | /* set VBOUT/PWEN and EXTLP1 in DVSTCTR */ | |
415 | __raw_writew(__raw_readw(0xE68B0008) | 0x600, 0xE68B0008); | |
416 | } | |
417 | ||
418 | static struct r8a66597_platdata usb1_host_data = { | |
419 | .on_chip = 1, | |
420 | .port_power = usb1_host_port_power, | |
421 | }; | |
422 | ||
423 | static struct resource usb1_host_resources[] = { | |
424 | [0] = { | |
425 | .name = "USBHS", | |
426 | .start = 0xE68B0000, | |
427 | .end = 0xE68B00E6 - 1, | |
428 | .flags = IORESOURCE_MEM, | |
429 | }, | |
430 | [1] = { | |
33c9607a | 431 | .start = evt2irq(0x1ce0) /* USB1_USB1I0 */, |
fb54d268 KM |
432 | .flags = IORESOURCE_IRQ, |
433 | }, | |
434 | }; | |
435 | ||
436 | static struct platform_device usb1_host_device = { | |
437 | .name = "r8a66597_hcd", | |
438 | .id = 1, | |
439 | .dev = { | |
440 | .dma_mask = NULL, /* not use dma */ | |
441 | .coherent_dma_mask = 0xffffffff, | |
442 | .platform_data = &usb1_host_data, | |
443 | }, | |
444 | .num_resources = ARRAY_SIZE(usb1_host_resources), | |
445 | .resource = usb1_host_resources, | |
446 | }; | |
447 | ||
82d508fa | 448 | static const struct fb_videomode ap4evb_lcdc_modes[] = { |
44432407 GL |
449 | { |
450 | #ifdef CONFIG_AP4EVB_QHD | |
451 | .name = "R63302(QHD)", | |
452 | .xres = 544, | |
453 | .yres = 961, | |
454 | .left_margin = 72, | |
455 | .right_margin = 600, | |
456 | .hsync_len = 16, | |
457 | .upper_margin = 8, | |
458 | .lower_margin = 8, | |
459 | .vsync_len = 2, | |
460 | .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT, | |
461 | #else | |
462 | .name = "WVGA Panel", | |
463 | .xres = 800, | |
464 | .yres = 480, | |
465 | .left_margin = 220, | |
466 | .right_margin = 110, | |
467 | .hsync_len = 70, | |
468 | .upper_margin = 20, | |
469 | .lower_margin = 5, | |
470 | .vsync_len = 5, | |
471 | .sync = 0, | |
472 | #endif | |
473 | }, | |
474 | }; | |
1c7fcbed DHG |
475 | static struct sh_mobile_meram_cfg lcd_meram_cfg = { |
476 | .icb[0] = { | |
477 | .marker_icb = 28, | |
478 | .cache_icb = 24, | |
479 | .meram_offset = 0x0, | |
480 | .meram_size = 0x40, | |
481 | }, | |
482 | .icb[1] = { | |
483 | .marker_icb = 29, | |
484 | .cache_icb = 25, | |
485 | .meram_offset = 0x40, | |
486 | .meram_size = 0x40, | |
487 | }, | |
488 | }; | |
44432407 | 489 | |
9fa1b7fe | 490 | static struct sh_mobile_lcdc_info lcdc_info = { |
1c7fcbed | 491 | .meram_dev = &meram_info, |
8eda2f21 GL |
492 | .ch[0] = { |
493 | .chan = LCDC_CHAN_MAINLCD, | |
edd153a3 | 494 | .fourcc = V4L2_PIX_FMT_RGB565, |
44432407 GL |
495 | .lcd_cfg = ap4evb_lcdc_modes, |
496 | .num_cfg = ARRAY_SIZE(ap4evb_lcdc_modes), | |
1c7fcbed | 497 | .meram_cfg = &lcd_meram_cfg, |
8eda2f21 GL |
498 | } |
499 | }; | |
500 | ||
501 | static struct resource lcdc_resources[] = { | |
502 | [0] = { | |
503 | .name = "LCDC", | |
504 | .start = 0xfe940000, /* P4-only space */ | |
505 | .end = 0xfe943fff, | |
506 | .flags = IORESOURCE_MEM, | |
507 | }, | |
508 | [1] = { | |
509 | .start = intcs_evt2irq(0x580), | |
510 | .flags = IORESOURCE_IRQ, | |
511 | }, | |
512 | }; | |
513 | ||
514 | static struct platform_device lcdc_device = { | |
515 | .name = "sh_mobile_lcdc_fb", | |
516 | .num_resources = ARRAY_SIZE(lcdc_resources), | |
517 | .resource = lcdc_resources, | |
518 | .dev = { | |
9fa1b7fe | 519 | .platform_data = &lcdc_info, |
8eda2f21 GL |
520 | .coherent_dma_mask = ~0, |
521 | }, | |
522 | }; | |
523 | ||
9fa1b7fe KM |
524 | /* |
525 | * QHD display | |
526 | */ | |
527 | #ifdef CONFIG_AP4EVB_QHD | |
528 | ||
529 | /* KEYSC (Needs SW43 set to ON) */ | |
530 | static struct sh_keysc_info keysc_info = { | |
531 | .mode = SH_KEYSC_MODE_1, | |
532 | .scan_timing = 3, | |
533 | .delay = 2500, | |
534 | .keycodes = { | |
535 | KEY_0, KEY_1, KEY_2, KEY_3, KEY_4, | |
536 | KEY_5, KEY_6, KEY_7, KEY_8, KEY_9, | |
537 | KEY_A, KEY_B, KEY_C, KEY_D, KEY_E, | |
538 | KEY_F, KEY_G, KEY_H, KEY_I, KEY_J, | |
539 | KEY_K, KEY_L, KEY_M, KEY_N, KEY_O, | |
540 | }, | |
541 | }; | |
542 | ||
543 | static struct resource keysc_resources[] = { | |
544 | [0] = { | |
545 | .name = "KEYSC", | |
546 | .start = 0xe61b0000, | |
547 | .end = 0xe61b0063, | |
548 | .flags = IORESOURCE_MEM, | |
549 | }, | |
550 | [1] = { | |
551 | .start = evt2irq(0x0be0), /* KEYSC_KEY */ | |
552 | .flags = IORESOURCE_IRQ, | |
553 | }, | |
554 | }; | |
555 | ||
556 | static struct platform_device keysc_device = { | |
557 | .name = "sh_keysc", | |
558 | .id = 0, /* "keysc0" clock */ | |
559 | .num_resources = ARRAY_SIZE(keysc_resources), | |
560 | .resource = keysc_resources, | |
561 | .dev = { | |
562 | .platform_data = &keysc_info, | |
563 | }, | |
564 | }; | |
565 | ||
566 | /* MIPI-DSI */ | |
5e47431a KM |
567 | #define PHYCTRL 0x0070 |
568 | static int sh_mipi_set_dot_clock(struct platform_device *pdev, | |
569 | void __iomem *base, | |
570 | int enable) | |
571 | { | |
572 | struct clk *pck = clk_get(&pdev->dev, "dsip_clk"); | |
573 | void __iomem *phy = base + PHYCTRL; | |
574 | ||
575 | if (IS_ERR(pck)) | |
576 | return PTR_ERR(pck); | |
577 | ||
578 | if (enable) { | |
579 | clk_set_rate(pck, clk_round_rate(pck, 24000000)); | |
580 | iowrite32(ioread32(phy) | (0xb << 8), phy); | |
581 | clk_enable(pck); | |
582 | } else { | |
583 | clk_disable(pck); | |
584 | } | |
585 | ||
586 | clk_put(pck); | |
587 | ||
588 | return 0; | |
589 | } | |
590 | ||
8eda2f21 GL |
591 | static struct resource mipidsi0_resources[] = { |
592 | [0] = { | |
593 | .start = 0xffc60000, | |
5958d58a MD |
594 | .end = 0xffc63073, |
595 | .flags = IORESOURCE_MEM, | |
596 | }, | |
597 | [1] = { | |
598 | .start = 0xffc68000, | |
599 | .end = 0xffc680ef, | |
8eda2f21 GL |
600 | .flags = IORESOURCE_MEM, |
601 | }, | |
602 | }; | |
603 | ||
604 | static struct sh_mipi_dsi_info mipidsi0_info = { | |
605 | .data_format = MIPI_RGB888, | |
9fa1b7fe | 606 | .lcd_chan = &lcdc_info.ch[0], |
26c3d7ac | 607 | .lane = 2, |
6fd46595 | 608 | .vsynw_offset = 17, |
a2e62971 KM |
609 | .flags = SH_MIPI_DSI_SYNC_PULSES_MODE | |
610 | SH_MIPI_DSI_HSbyteCLK, | |
5e47431a | 611 | .set_dot_clock = sh_mipi_set_dot_clock, |
8eda2f21 GL |
612 | }; |
613 | ||
614 | static struct platform_device mipidsi0_device = { | |
615 | .name = "sh-mipi-dsi", | |
616 | .num_resources = ARRAY_SIZE(mipidsi0_resources), | |
617 | .resource = mipidsi0_resources, | |
618 | .id = 0, | |
619 | .dev = { | |
620 | .platform_data = &mipidsi0_info, | |
621 | }, | |
622 | }; | |
623 | ||
9fa1b7fe KM |
624 | static struct platform_device *qhd_devices[] __initdata = { |
625 | &mipidsi0_device, | |
626 | &keysc_device, | |
627 | }; | |
628 | #endif /* CONFIG_AP4EVB_QHD */ | |
629 | ||
cb9215e1 KM |
630 | /* FSI */ |
631 | #define IRQ_FSI evt2irq(0x1840) | |
d4bc99b9 KM |
632 | static int __fsi_set_rate(struct clk *clk, long rate, int enable) |
633 | { | |
634 | int ret = 0; | |
635 | ||
636 | if (rate <= 0) | |
637 | return ret; | |
2669efec | 638 | |
d4bc99b9 | 639 | if (enable) { |
22de4e1f | 640 | ret = clk_set_rate(clk, rate); |
d4bc99b9 KM |
641 | if (0 == ret) |
642 | ret = clk_enable(clk); | |
643 | } else { | |
644 | clk_disable(clk); | |
645 | } | |
646 | ||
647 | return ret; | |
648 | } | |
649 | ||
22de4e1f KM |
650 | static int __fsi_set_round_rate(struct clk *clk, long rate, int enable) |
651 | { | |
652 | return __fsi_set_rate(clk, clk_round_rate(clk, rate), enable); | |
653 | } | |
654 | ||
655 | static int fsi_ak4642_set_rate(struct device *dev, int rate, int enable) | |
656 | { | |
657 | struct clk *fsia_ick; | |
658 | struct clk *fsiack; | |
659 | int ret = -EIO; | |
660 | ||
661 | fsia_ick = clk_get(dev, "icka"); | |
662 | if (IS_ERR(fsia_ick)) | |
663 | return PTR_ERR(fsia_ick); | |
664 | ||
665 | /* | |
666 | * FSIACK is connected to AK4642, | |
667 | * and use external clock pin from it. | |
668 | * it is parent of fsia_ick now. | |
669 | */ | |
670 | fsiack = clk_get_parent(fsia_ick); | |
671 | if (!fsiack) | |
672 | goto fsia_ick_out; | |
673 | ||
674 | /* | |
675 | * we get 1/1 divided clock by setting same rate to fsiack and fsia_ick | |
676 | * | |
677 | ** FIXME ** | |
678 | * Because the freq_table of external clk (fsiack) are all 0, | |
679 | * the return value of clk_round_rate became 0. | |
680 | * So, it use __fsi_set_rate here. | |
681 | */ | |
682 | ret = __fsi_set_rate(fsiack, rate, enable); | |
683 | if (ret < 0) | |
684 | goto fsiack_out; | |
685 | ||
686 | ret = __fsi_set_round_rate(fsia_ick, rate, enable); | |
687 | if ((ret < 0) && enable) | |
688 | __fsi_set_round_rate(fsiack, rate, 0); /* disable FSI ACK */ | |
689 | ||
690 | fsiack_out: | |
691 | clk_put(fsiack); | |
692 | ||
693 | fsia_ick_out: | |
694 | clk_put(fsia_ick); | |
695 | ||
696 | return 0; | |
697 | } | |
698 | ||
699 | static int fsi_hdmi_set_rate(struct device *dev, int rate, int enable) | |
2669efec KM |
700 | { |
701 | struct clk *fsib_clk; | |
702 | struct clk *fdiv_clk = &sh7372_fsidivb_clk; | |
d4bc99b9 KM |
703 | long fsib_rate = 0; |
704 | long fdiv_rate = 0; | |
705 | int ackmd_bpfmd; | |
2669efec KM |
706 | int ret; |
707 | ||
2669efec | 708 | switch (rate) { |
574490e3 | 709 | case 44100: |
d4bc99b9 KM |
710 | fsib_rate = rate * 256; |
711 | ackmd_bpfmd = SH_FSI_ACKMD_256 | SH_FSI_BPFMD_64; | |
574490e3 | 712 | break; |
2669efec | 713 | case 48000: |
d4bc99b9 KM |
714 | fsib_rate = 85428000; /* around 48kHz x 256 x 7 */ |
715 | fdiv_rate = rate * 256; | |
716 | ackmd_bpfmd = SH_FSI_ACKMD_256 | SH_FSI_BPFMD_64; | |
2669efec KM |
717 | break; |
718 | default: | |
719 | pr_err("unsupported rate in FSI2 port B\n"); | |
d4bc99b9 | 720 | return -EINVAL; |
2669efec KM |
721 | } |
722 | ||
d4bc99b9 KM |
723 | /* FSI B setting */ |
724 | fsib_clk = clk_get(dev, "ickb"); | |
725 | if (IS_ERR(fsib_clk)) | |
726 | return -EIO; | |
727 | ||
22de4e1f | 728 | ret = __fsi_set_round_rate(fsib_clk, fsib_rate, enable); |
d4bc99b9 | 729 | if (ret < 0) |
73674648 | 730 | goto fsi_set_rate_end; |
d4bc99b9 KM |
731 | |
732 | /* FSI DIV setting */ | |
22de4e1f | 733 | ret = __fsi_set_round_rate(fdiv_clk, fdiv_rate, enable); |
d4bc99b9 KM |
734 | if (ret < 0) { |
735 | /* disable FSI B */ | |
736 | if (enable) | |
22de4e1f | 737 | __fsi_set_round_rate(fsib_clk, fsib_rate, 0); |
73674648 | 738 | goto fsi_set_rate_end; |
d4bc99b9 | 739 | } |
2669efec | 740 | |
73674648 KM |
741 | ret = ackmd_bpfmd; |
742 | ||
743 | fsi_set_rate_end: | |
744 | clk_put(fsib_clk); | |
745 | return ret; | |
2669efec KM |
746 | } |
747 | ||
bb04e197 | 748 | static struct sh_fsi_platform_info fsi_info = { |
fec691e7 KM |
749 | .port_a = { |
750 | .flags = SH_FSI_BRS_INV, | |
751 | .set_rate = fsi_ak4642_set_rate, | |
752 | }, | |
753 | .port_b = { | |
754 | .flags = SH_FSI_BRS_INV | | |
755 | SH_FSI_BRM_INV | | |
756 | SH_FSI_LRS_INV | | |
757 | SH_FSI_FMT_SPDIF, | |
758 | .set_rate = fsi_hdmi_set_rate, | |
759 | }, | |
cb9215e1 KM |
760 | }; |
761 | ||
762 | static struct resource fsi_resources[] = { | |
763 | [0] = { | |
764 | .name = "FSI", | |
765 | .start = 0xFE3C0000, | |
766 | .end = 0xFE3C0400 - 1, | |
767 | .flags = IORESOURCE_MEM, | |
768 | }, | |
769 | [1] = { | |
770 | .start = IRQ_FSI, | |
771 | .flags = IORESOURCE_IRQ, | |
772 | }, | |
773 | }; | |
774 | ||
775 | static struct platform_device fsi_device = { | |
776 | .name = "sh_fsi2", | |
9f6f11b6 | 777 | .id = -1, |
cb9215e1 KM |
778 | .num_resources = ARRAY_SIZE(fsi_resources), |
779 | .resource = fsi_resources, | |
780 | .dev = { | |
781 | .platform_data = &fsi_info, | |
782 | }, | |
783 | }; | |
784 | ||
45f31216 KM |
785 | static struct fsi_ak4642_info fsi2_ak4643_info = { |
786 | .name = "AK4643", | |
787 | .card = "FSI2A-AK4643", | |
788 | .cpu_dai = "fsia-dai", | |
789 | .codec = "ak4642-codec.0-0013", | |
790 | .platform = "sh_fsi2", | |
791 | .id = FSI_PORT_A, | |
792 | }; | |
793 | ||
c8d6bf9a | 794 | static struct platform_device fsi_ak4643_device = { |
45f31216 KM |
795 | .name = "fsi-ak4642-audio", |
796 | .dev = { | |
797 | .platform_data = &fsi_info, | |
798 | }, | |
c8d6bf9a | 799 | }; |
45f31216 | 800 | |
1c7fcbed DHG |
801 | static struct sh_mobile_meram_cfg hdmi_meram_cfg = { |
802 | .icb[0] = { | |
803 | .marker_icb = 30, | |
804 | .cache_icb = 26, | |
805 | .meram_offset = 0x80, | |
806 | .meram_size = 0x100, | |
807 | }, | |
808 | .icb[1] = { | |
809 | .marker_icb = 31, | |
810 | .cache_icb = 27, | |
811 | .meram_offset = 0x180, | |
812 | .meram_size = 0x100, | |
813 | }, | |
814 | }; | |
c8d6bf9a | 815 | |
dfbcdf64 GL |
816 | static struct sh_mobile_lcdc_info sh_mobile_lcdc1_info = { |
817 | .clock_source = LCDC_CLK_EXTERNAL, | |
1c7fcbed | 818 | .meram_dev = &meram_info, |
dfbcdf64 GL |
819 | .ch[0] = { |
820 | .chan = LCDC_CHAN_MAINLCD, | |
edd153a3 | 821 | .fourcc = V4L2_PIX_FMT_RGB565, |
dfbcdf64 GL |
822 | .interface_type = RGB24, |
823 | .clock_divider = 1, | |
824 | .flags = LCDC_FLAGS_DWPOL, | |
1c7fcbed | 825 | .meram_cfg = &hdmi_meram_cfg, |
dfbcdf64 GL |
826 | } |
827 | }; | |
828 | ||
829 | static struct resource lcdc1_resources[] = { | |
830 | [0] = { | |
831 | .name = "LCDC1", | |
832 | .start = 0xfe944000, | |
833 | .end = 0xfe947fff, | |
834 | .flags = IORESOURCE_MEM, | |
835 | }, | |
836 | [1] = { | |
88c759a2 | 837 | .start = intcs_evt2irq(0x1780), |
dfbcdf64 GL |
838 | .flags = IORESOURCE_IRQ, |
839 | }, | |
840 | }; | |
841 | ||
842 | static struct platform_device lcdc1_device = { | |
843 | .name = "sh_mobile_lcdc_fb", | |
844 | .num_resources = ARRAY_SIZE(lcdc1_resources), | |
845 | .resource = lcdc1_resources, | |
846 | .id = 1, | |
847 | .dev = { | |
848 | .platform_data = &sh_mobile_lcdc1_info, | |
849 | .coherent_dma_mask = ~0, | |
850 | }, | |
851 | }; | |
852 | ||
640dcfa0 GL |
853 | static long ap4evb_clk_optimize(unsigned long target, unsigned long *best_freq, |
854 | unsigned long *parent_freq); | |
855 | ||
856 | ||
dfbcdf64 GL |
857 | static struct sh_mobile_hdmi_info hdmi_info = { |
858 | .lcd_chan = &sh_mobile_lcdc1_info.ch[0], | |
859 | .lcd_dev = &lcdc1_device.dev, | |
2669efec | 860 | .flags = HDMI_SND_SRC_SPDIF, |
640dcfa0 | 861 | .clk_optimize_parent = ap4evb_clk_optimize, |
dfbcdf64 GL |
862 | }; |
863 | ||
864 | static struct resource hdmi_resources[] = { | |
865 | [0] = { | |
866 | .name = "HDMI", | |
867 | .start = 0xe6be0000, | |
868 | .end = 0xe6be00ff, | |
869 | .flags = IORESOURCE_MEM, | |
870 | }, | |
871 | [1] = { | |
872 | /* There's also an HDMI interrupt on INTCS @ 0x18e0 */ | |
873 | .start = evt2irq(0x17e0), | |
874 | .flags = IORESOURCE_IRQ, | |
875 | }, | |
876 | }; | |
877 | ||
878 | static struct platform_device hdmi_device = { | |
879 | .name = "sh-mobile-hdmi", | |
880 | .num_resources = ARRAY_SIZE(hdmi_resources), | |
881 | .resource = hdmi_resources, | |
882 | .id = -1, | |
883 | .dev = { | |
884 | .platform_data = &hdmi_info, | |
885 | }, | |
886 | }; | |
887 | ||
3f25c9cc KM |
888 | static struct platform_device fsi_hdmi_device = { |
889 | .name = "sh_fsi2_b_hdmi", | |
890 | }; | |
891 | ||
640dcfa0 GL |
892 | static long ap4evb_clk_optimize(unsigned long target, unsigned long *best_freq, |
893 | unsigned long *parent_freq) | |
894 | { | |
895 | struct clk *hdmi_ick = clk_get(&hdmi_device.dev, "ick"); | |
896 | long error; | |
897 | ||
898 | if (IS_ERR(hdmi_ick)) { | |
899 | int ret = PTR_ERR(hdmi_ick); | |
900 | pr_err("Cannot get HDMI ICK: %d\n", ret); | |
901 | return ret; | |
902 | } | |
903 | ||
904 | error = clk_round_parent(hdmi_ick, target, best_freq, parent_freq, 1, 64); | |
905 | ||
906 | clk_put(hdmi_ick); | |
907 | ||
908 | return error; | |
909 | } | |
910 | ||
2863e935 AH |
911 | static struct gpio_led ap4evb_leds[] = { |
912 | { | |
913 | .name = "led4", | |
914 | .gpio = GPIO_PORT185, | |
915 | .default_state = LEDS_GPIO_DEFSTATE_ON, | |
916 | }, | |
917 | { | |
918 | .name = "led2", | |
919 | .gpio = GPIO_PORT186, | |
920 | .default_state = LEDS_GPIO_DEFSTATE_ON, | |
921 | }, | |
922 | { | |
923 | .name = "led3", | |
924 | .gpio = GPIO_PORT187, | |
925 | .default_state = LEDS_GPIO_DEFSTATE_ON, | |
926 | }, | |
927 | { | |
928 | .name = "led1", | |
929 | .gpio = GPIO_PORT188, | |
930 | .default_state = LEDS_GPIO_DEFSTATE_ON, | |
931 | } | |
932 | }; | |
933 | ||
934 | static struct gpio_led_platform_data ap4evb_leds_pdata = { | |
935 | .num_leds = ARRAY_SIZE(ap4evb_leds), | |
8050fbf2 | 936 | .leds = ap4evb_leds, |
2863e935 AH |
937 | }; |
938 | ||
939 | static struct platform_device leds_device = { | |
940 | .name = "leds-gpio", | |
941 | .id = 0, | |
942 | .dev = { | |
943 | .platform_data = &ap4evb_leds_pdata, | |
944 | }, | |
945 | }; | |
946 | ||
1a0b1eac GL |
947 | static struct i2c_board_info imx074_info = { |
948 | I2C_BOARD_INFO("imx074", 0x1a), | |
949 | }; | |
950 | ||
4d4d6fbb | 951 | static struct soc_camera_link imx074_link = { |
1a0b1eac GL |
952 | .bus_id = 0, |
953 | .board_info = &imx074_info, | |
954 | .i2c_adapter_id = 0, | |
955 | .module_name = "imx074", | |
956 | }; | |
957 | ||
958 | static struct platform_device ap4evb_camera = { | |
959 | .name = "soc-camera-pdrv", | |
960 | .id = 0, | |
961 | .dev = { | |
962 | .platform_data = &imx074_link, | |
963 | }, | |
964 | }; | |
965 | ||
966 | static struct sh_csi2_client_config csi2_clients[] = { | |
967 | { | |
968 | .phy = SH_CSI2_PHY_MAIN, | |
19a1780b | 969 | .lanes = 0, /* default: 2 lanes */ |
1a0b1eac GL |
970 | .channel = 0, |
971 | .pdev = &ap4evb_camera, | |
972 | }, | |
973 | }; | |
974 | ||
975 | static struct sh_csi2_pdata csi2_info = { | |
976 | .type = SH_CSI2C, | |
977 | .clients = csi2_clients, | |
978 | .num_clients = ARRAY_SIZE(csi2_clients), | |
979 | .flags = SH_CSI2_ECC | SH_CSI2_CRC, | |
980 | }; | |
981 | ||
982 | static struct resource csi2_resources[] = { | |
983 | [0] = { | |
984 | .name = "CSI2", | |
985 | .start = 0xffc90000, | |
986 | .end = 0xffc90fff, | |
987 | .flags = IORESOURCE_MEM, | |
988 | }, | |
989 | [1] = { | |
990 | .start = intcs_evt2irq(0x17a0), | |
991 | .flags = IORESOURCE_IRQ, | |
992 | }, | |
993 | }; | |
994 | ||
6b526fed GL |
995 | static struct sh_mobile_ceu_companion csi2 = { |
996 | .id = 0, | |
1a0b1eac GL |
997 | .num_resources = ARRAY_SIZE(csi2_resources), |
998 | .resource = csi2_resources, | |
6b526fed | 999 | .platform_data = &csi2_info, |
1a0b1eac GL |
1000 | }; |
1001 | ||
1002 | static struct sh_mobile_ceu_info sh_mobile_ceu_info = { | |
1003 | .flags = SH_CEU_FLAG_USE_8BIT_BUS, | |
6b526fed | 1004 | .csi2 = &csi2, |
1a0b1eac GL |
1005 | }; |
1006 | ||
1007 | static struct resource ceu_resources[] = { | |
1008 | [0] = { | |
1009 | .name = "CEU", | |
1010 | .start = 0xfe910000, | |
1011 | .end = 0xfe91009f, | |
1012 | .flags = IORESOURCE_MEM, | |
1013 | }, | |
1014 | [1] = { | |
1015 | .start = intcs_evt2irq(0x880), | |
1016 | .flags = IORESOURCE_IRQ, | |
1017 | }, | |
1018 | [2] = { | |
1019 | /* place holder for contiguous memory */ | |
1020 | }, | |
1021 | }; | |
1022 | ||
1023 | static struct platform_device ceu_device = { | |
1024 | .name = "sh_mobile_ceu", | |
1025 | .id = 0, /* "ceu0" clock */ | |
1026 | .num_resources = ARRAY_SIZE(ceu_resources), | |
1027 | .resource = ceu_resources, | |
1028 | .dev = { | |
05a5f01c GL |
1029 | .platform_data = &sh_mobile_ceu_info, |
1030 | .coherent_dma_mask = 0xffffffff, | |
1a0b1eac GL |
1031 | }, |
1032 | }; | |
1033 | ||
2b7eda63 | 1034 | static struct platform_device *ap4evb_devices[] __initdata = { |
2863e935 | 1035 | &leds_device, |
2b7eda63 | 1036 | &nor_flash_device, |
1b7e0677 | 1037 | &smc911x_device, |
3a14d039 | 1038 | &sdhi0_device, |
341291a6 | 1039 | &sdhi1_device, |
fb54d268 | 1040 | &usb1_host_device, |
cb9215e1 | 1041 | &fsi_device, |
c8d6bf9a | 1042 | &fsi_ak4643_device, |
3f25c9cc | 1043 | &fsi_hdmi_device, |
beccb12f | 1044 | &sh_mmcif_device, |
dfbcdf64 GL |
1045 | &lcdc1_device, |
1046 | &lcdc_device, | |
1047 | &hdmi_device, | |
1a0b1eac GL |
1048 | &ceu_device, |
1049 | &ap4evb_camera, | |
1c7fcbed | 1050 | &meram_device, |
2b7eda63 MD |
1051 | }; |
1052 | ||
2ce51f8b | 1053 | static void __init hdmi_init_pm_clock(void) |
dfbcdf64 GL |
1054 | { |
1055 | struct clk *hdmi_ick = clk_get(&hdmi_device.dev, "ick"); | |
1056 | int ret; | |
1057 | long rate; | |
1058 | ||
1059 | if (IS_ERR(hdmi_ick)) { | |
1060 | ret = PTR_ERR(hdmi_ick); | |
1061 | pr_err("Cannot get HDMI ICK: %d\n", ret); | |
1062 | goto out; | |
1063 | } | |
1064 | ||
685e4080 | 1065 | ret = clk_set_parent(&sh7372_pllc2_clk, &sh7372_dv_clki_div2_clk); |
dfbcdf64 | 1066 | if (ret < 0) { |
685e4080 | 1067 | pr_err("Cannot set PLLC2 parent: %d, %d users\n", ret, sh7372_pllc2_clk.usecount); |
dfbcdf64 GL |
1068 | goto out; |
1069 | } | |
1070 | ||
685e4080 | 1071 | pr_debug("PLLC2 initial frequency %lu\n", clk_get_rate(&sh7372_pllc2_clk)); |
dfbcdf64 | 1072 | |
685e4080 | 1073 | rate = clk_round_rate(&sh7372_pllc2_clk, 594000000); |
dfbcdf64 GL |
1074 | if (rate < 0) { |
1075 | pr_err("Cannot get suitable rate: %ld\n", rate); | |
1076 | ret = rate; | |
1077 | goto out; | |
1078 | } | |
1079 | ||
685e4080 | 1080 | ret = clk_set_rate(&sh7372_pllc2_clk, rate); |
dfbcdf64 GL |
1081 | if (ret < 0) { |
1082 | pr_err("Cannot set rate %ld: %d\n", rate, ret); | |
1083 | goto out; | |
1084 | } | |
1085 | ||
1086 | pr_debug("PLLC2 set frequency %lu\n", rate); | |
1087 | ||
685e4080 | 1088 | ret = clk_set_parent(hdmi_ick, &sh7372_pllc2_clk); |
2ce51f8b | 1089 | if (ret < 0) |
dfbcdf64 | 1090 | pr_err("Cannot set HDMI parent: %d\n", ret); |
dfbcdf64 GL |
1091 | |
1092 | out: | |
1093 | if (!IS_ERR(hdmi_ick)) | |
1094 | clk_put(hdmi_ick); | |
dfbcdf64 GL |
1095 | } |
1096 | ||
6084c81e | 1097 | static void __init fsi_init_pm_clock(void) |
69ce8aa4 KM |
1098 | { |
1099 | struct clk *fsia_ick; | |
1100 | int ret; | |
1101 | ||
69ce8aa4 KM |
1102 | fsia_ick = clk_get(&fsi_device.dev, "icka"); |
1103 | if (IS_ERR(fsia_ick)) { | |
1104 | ret = PTR_ERR(fsia_ick); | |
1105 | pr_err("Cannot get FSI ICK: %d\n", ret); | |
6084c81e | 1106 | return; |
69ce8aa4 KM |
1107 | } |
1108 | ||
1109 | ret = clk_set_parent(fsia_ick, &sh7372_fsiack_clk); | |
69ce8aa4 | 1110 | if (ret < 0) |
22de4e1f | 1111 | pr_err("Cannot set FSI-A parent: %d\n", ret); |
69ce8aa4 | 1112 | |
69ce8aa4 | 1113 | clk_put(fsia_ick); |
69ce8aa4 | 1114 | } |
69ce8aa4 | 1115 | |
71c3ba9a KM |
1116 | /* |
1117 | * FIXME !! | |
1118 | * | |
1119 | * gpio_no_direction | |
71c3ba9a KM |
1120 | * are quick_hack. |
1121 | * | |
1122 | * current gpio frame work doesn't have | |
1123 | * the method to control only pull up/down/free. | |
1124 | * this function should be replaced by correct gpio function | |
1125 | */ | |
1126 | static void __init gpio_no_direction(u32 addr) | |
1127 | { | |
1128 | __raw_writeb(0x00, addr); | |
1129 | } | |
1130 | ||
9fa1b7fe | 1131 | /* TouchScreen */ |
52d5ac00 KM |
1132 | #ifdef CONFIG_AP4EVB_QHD |
1133 | # define GPIO_TSC_IRQ GPIO_FN_IRQ28_123 | |
1134 | # define GPIO_TSC_PORT GPIO_PORT123 | |
1135 | #else /* WVGA */ | |
1136 | # define GPIO_TSC_IRQ GPIO_FN_IRQ7_40 | |
1137 | # define GPIO_TSC_PORT GPIO_PORT40 | |
1138 | #endif | |
1139 | ||
33c9607a | 1140 | #define IRQ28 evt2irq(0x3380) /* IRQ28A */ |
9fa1b7fe | 1141 | #define IRQ7 evt2irq(0x02e0) /* IRQ7A */ |
71c3ba9a KM |
1142 | static int ts_get_pendown_state(void) |
1143 | { | |
52d5ac00 | 1144 | int val; |
71c3ba9a | 1145 | |
52d5ac00 | 1146 | gpio_free(GPIO_TSC_IRQ); |
71c3ba9a | 1147 | |
52d5ac00 | 1148 | gpio_request(GPIO_TSC_PORT, NULL); |
71c3ba9a | 1149 | |
52d5ac00 | 1150 | gpio_direction_input(GPIO_TSC_PORT); |
71c3ba9a | 1151 | |
52d5ac00 | 1152 | val = gpio_get_value(GPIO_TSC_PORT); |
71c3ba9a | 1153 | |
52d5ac00 | 1154 | gpio_request(GPIO_TSC_IRQ, NULL); |
71c3ba9a | 1155 | |
52d5ac00 | 1156 | return !val; |
71c3ba9a KM |
1157 | } |
1158 | ||
71c3ba9a KM |
1159 | static int ts_init(void) |
1160 | { | |
52d5ac00 | 1161 | gpio_request(GPIO_TSC_IRQ, NULL); |
71c3ba9a KM |
1162 | |
1163 | return 0; | |
1164 | } | |
1165 | ||
bb04e197 | 1166 | static struct tsc2007_platform_data tsc2007_info = { |
91cf5082 KM |
1167 | .model = 2007, |
1168 | .x_plate_ohms = 180, | |
71c3ba9a KM |
1169 | .get_pendown_state = ts_get_pendown_state, |
1170 | .init_platform_hw = ts_init, | |
91cf5082 KM |
1171 | }; |
1172 | ||
9fa1b7fe KM |
1173 | static struct i2c_board_info tsc_device = { |
1174 | I2C_BOARD_INFO("tsc2007", 0x48), | |
1175 | .type = "tsc2007", | |
1176 | .platform_data = &tsc2007_info, | |
1177 | /*.irq is selected on ap4evb_init */ | |
1178 | }; | |
1179 | ||
91cf5082 | 1180 | /* I2C */ |
cb9215e1 KM |
1181 | static struct i2c_board_info i2c0_devices[] = { |
1182 | { | |
1183 | I2C_BOARD_INFO("ak4643", 0x13), | |
1184 | }, | |
1185 | }; | |
1186 | ||
91cf5082 | 1187 | static struct i2c_board_info i2c1_devices[] = { |
8fc883c2 KM |
1188 | { |
1189 | I2C_BOARD_INFO("r2025sd", 0x32), | |
1190 | }, | |
91cf5082 KM |
1191 | }; |
1192 | ||
2b7eda63 MD |
1193 | static struct map_desc ap4evb_io_desc[] __initdata = { |
1194 | /* create a 1:1 entity map for 0xe6xxxxxx | |
1195 | * used by CPGA, INTC and PFC. | |
1196 | */ | |
1197 | { | |
1198 | .virtual = 0xe6000000, | |
1199 | .pfn = __phys_to_pfn(0xe6000000), | |
1200 | .length = 256 << 20, | |
1201 | .type = MT_DEVICE_NONSHARED | |
1202 | }, | |
1203 | }; | |
1204 | ||
1205 | static void __init ap4evb_map_io(void) | |
1206 | { | |
1207 | iotable_init(ap4evb_io_desc, ARRAY_SIZE(ap4evb_io_desc)); | |
1208 | ||
495b3cea | 1209 | /* setup early devices and console here as well */ |
2b7eda63 | 1210 | sh7372_add_early_devices(); |
4ae04acb | 1211 | shmobile_setup_console(); |
2b7eda63 MD |
1212 | } |
1213 | ||
cb9215e1 KM |
1214 | #define GPIO_PORT9CR 0xE6051009 |
1215 | #define GPIO_PORT10CR 0xE605100A | |
2669efec | 1216 | #define USCCR1 0xE6058144 |
2b7eda63 MD |
1217 | static void __init ap4evb_init(void) |
1218 | { | |
dfbcdf64 | 1219 | u32 srcr4; |
cb9215e1 KM |
1220 | struct clk *clk; |
1221 | ||
1b7e0677 KM |
1222 | sh7372_pinmux_init(); |
1223 | ||
b228b48e KM |
1224 | /* enable SCIFA0 */ |
1225 | gpio_request(GPIO_FN_SCIFA0_TXD, NULL); | |
1226 | gpio_request(GPIO_FN_SCIFA0_RXD, NULL); | |
1227 | ||
1b7e0677 KM |
1228 | /* enable SMSC911X */ |
1229 | gpio_request(GPIO_FN_CS5A, NULL); | |
1230 | gpio_request(GPIO_FN_IRQ6_39, NULL); | |
1231 | ||
8cb3a2eb KM |
1232 | /* enable Debug switch (S6) */ |
1233 | gpio_request(GPIO_PORT32, NULL); | |
1234 | gpio_request(GPIO_PORT33, NULL); | |
1235 | gpio_request(GPIO_PORT34, NULL); | |
1236 | gpio_request(GPIO_PORT35, NULL); | |
1237 | gpio_direction_input(GPIO_PORT32); | |
1238 | gpio_direction_input(GPIO_PORT33); | |
1239 | gpio_direction_input(GPIO_PORT34); | |
1240 | gpio_direction_input(GPIO_PORT35); | |
1241 | gpio_export(GPIO_PORT32, 0); | |
1242 | gpio_export(GPIO_PORT33, 0); | |
1243 | gpio_export(GPIO_PORT34, 0); | |
1244 | gpio_export(GPIO_PORT35, 0); | |
1245 | ||
3a14d039 MD |
1246 | /* SDHI0 */ |
1247 | gpio_request(GPIO_FN_SDHICD0, NULL); | |
1248 | gpio_request(GPIO_FN_SDHIWP0, NULL); | |
1249 | gpio_request(GPIO_FN_SDHICMD0, NULL); | |
1250 | gpio_request(GPIO_FN_SDHICLK0, NULL); | |
1251 | gpio_request(GPIO_FN_SDHID0_3, NULL); | |
1252 | gpio_request(GPIO_FN_SDHID0_2, NULL); | |
1253 | gpio_request(GPIO_FN_SDHID0_1, NULL); | |
1254 | gpio_request(GPIO_FN_SDHID0_0, NULL); | |
1255 | ||
9fa1b7fe KM |
1256 | /* SDHI1 */ |
1257 | gpio_request(GPIO_FN_SDHICMD1, NULL); | |
1258 | gpio_request(GPIO_FN_SDHICLK1, NULL); | |
1259 | gpio_request(GPIO_FN_SDHID1_3, NULL); | |
1260 | gpio_request(GPIO_FN_SDHID1_2, NULL); | |
1261 | gpio_request(GPIO_FN_SDHID1_1, NULL); | |
1262 | gpio_request(GPIO_FN_SDHID1_0, NULL); | |
91cf5082 | 1263 | |
c8ee3d4b KM |
1264 | /* MMCIF */ |
1265 | gpio_request(GPIO_FN_MMCD0_0, NULL); | |
1266 | gpio_request(GPIO_FN_MMCD0_1, NULL); | |
1267 | gpio_request(GPIO_FN_MMCD0_2, NULL); | |
1268 | gpio_request(GPIO_FN_MMCD0_3, NULL); | |
1269 | gpio_request(GPIO_FN_MMCD0_4, NULL); | |
1270 | gpio_request(GPIO_FN_MMCD0_5, NULL); | |
1271 | gpio_request(GPIO_FN_MMCD0_6, NULL); | |
1272 | gpio_request(GPIO_FN_MMCD0_7, NULL); | |
1273 | gpio_request(GPIO_FN_MMCCMD0, NULL); | |
1274 | gpio_request(GPIO_FN_MMCCLK0, NULL); | |
1275 | ||
fb54d268 KM |
1276 | /* USB enable */ |
1277 | gpio_request(GPIO_FN_VBUS0_1, NULL); | |
1278 | gpio_request(GPIO_FN_IDIN_1_18, NULL); | |
1279 | gpio_request(GPIO_FN_PWEN_1_115, NULL); | |
1280 | gpio_request(GPIO_FN_OVCN_1_114, NULL); | |
1281 | gpio_request(GPIO_FN_EXTLP_1, NULL); | |
1282 | gpio_request(GPIO_FN_OVCN2_1, NULL); | |
1283 | ||
1284 | /* setup USB phy */ | |
d0fb0c4b | 1285 | __raw_writew(0x8a0a, 0xE6058130); /* USBCR4 */ |
fb54d268 | 1286 | |
2669efec | 1287 | /* enable FSI2 port A (ak4643) */ |
cb9215e1 KM |
1288 | gpio_request(GPIO_FN_FSIAIBT, NULL); |
1289 | gpio_request(GPIO_FN_FSIAILR, NULL); | |
1290 | gpio_request(GPIO_FN_FSIAISLD, NULL); | |
1291 | gpio_request(GPIO_FN_FSIAOSLD, NULL); | |
1292 | gpio_request(GPIO_PORT161, NULL); | |
1293 | gpio_direction_output(GPIO_PORT161, 0); /* slave */ | |
1294 | ||
1295 | gpio_request(GPIO_PORT9, NULL); | |
1296 | gpio_request(GPIO_PORT10, NULL); | |
1297 | gpio_no_direction(GPIO_PORT9CR); /* FSIAOBT needs no direction */ | |
1298 | gpio_no_direction(GPIO_PORT10CR); /* FSIAOLR needs no direction */ | |
1299 | ||
68accd73 AH |
1300 | /* card detect pin for MMC slot (CN7) */ |
1301 | gpio_request(GPIO_PORT41, NULL); | |
1302 | gpio_direction_input(GPIO_PORT41); | |
1303 | ||
2669efec KM |
1304 | /* setup FSI2 port B (HDMI) */ |
1305 | gpio_request(GPIO_FN_FSIBCK, NULL); | |
1306 | __raw_writew(__raw_readw(USCCR1) & ~(1 << 6), USCCR1); /* use SPDIF */ | |
1307 | ||
cb9215e1 KM |
1308 | /* set SPU2 clock to 119.6 MHz */ |
1309 | clk = clk_get(NULL, "spu_clk"); | |
2ae2b766 | 1310 | if (!IS_ERR(clk)) { |
cb9215e1 KM |
1311 | clk_set_rate(clk, clk_round_rate(clk, 119600000)); |
1312 | clk_put(clk); | |
1313 | } | |
1314 | ||
cb9215e1 KM |
1315 | /* |
1316 | * set irq priority, to avoid sound chopping | |
1317 | * when NFS rootfs is used | |
1318 | * FSI(3) > SMSC911X(2) | |
1319 | */ | |
1320 | intc_set_priority(IRQ_FSI, 3); | |
1321 | ||
1322 | i2c_register_board_info(0, i2c0_devices, | |
1323 | ARRAY_SIZE(i2c0_devices)); | |
1324 | ||
1325 | i2c_register_board_info(1, i2c1_devices, | |
1326 | ARRAY_SIZE(i2c1_devices)); | |
1327 | ||
9fa1b7fe | 1328 | #ifdef CONFIG_AP4EVB_QHD |
dd8a61a7 | 1329 | |
9fa1b7fe | 1330 | /* |
dd8a61a7 MD |
1331 | * For QHD Panel (MIPI-DSI, CONFIG_AP4EVB_QHD=y) and |
1332 | * IRQ28 for Touch Panel, set dip switches S3, S43 as OFF, ON. | |
9fa1b7fe KM |
1333 | */ |
1334 | ||
1335 | /* enable KEYSC */ | |
1336 | gpio_request(GPIO_FN_KEYOUT0, NULL); | |
1337 | gpio_request(GPIO_FN_KEYOUT1, NULL); | |
1338 | gpio_request(GPIO_FN_KEYOUT2, NULL); | |
1339 | gpio_request(GPIO_FN_KEYOUT3, NULL); | |
1340 | gpio_request(GPIO_FN_KEYOUT4, NULL); | |
1341 | gpio_request(GPIO_FN_KEYIN0_136, NULL); | |
1342 | gpio_request(GPIO_FN_KEYIN1_135, NULL); | |
1343 | gpio_request(GPIO_FN_KEYIN2_134, NULL); | |
1344 | gpio_request(GPIO_FN_KEYIN3_133, NULL); | |
1345 | gpio_request(GPIO_FN_KEYIN4, NULL); | |
1346 | ||
1347 | /* enable TouchScreen */ | |
6845664a | 1348 | irq_set_irq_type(IRQ28, IRQ_TYPE_LEVEL_LOW); |
9fa1b7fe KM |
1349 | |
1350 | tsc_device.irq = IRQ28; | |
1351 | i2c_register_board_info(1, &tsc_device, 1); | |
1352 | ||
1353 | /* LCDC0 */ | |
1354 | lcdc_info.clock_source = LCDC_CLK_PERIPHERAL; | |
1355 | lcdc_info.ch[0].interface_type = RGB24; | |
1356 | lcdc_info.ch[0].clock_divider = 1; | |
1357 | lcdc_info.ch[0].flags = LCDC_FLAGS_DWPOL; | |
9fa1b7fe KM |
1358 | lcdc_info.ch[0].lcd_size_cfg.width = 44; |
1359 | lcdc_info.ch[0].lcd_size_cfg.height = 79; | |
1360 | ||
1361 | platform_add_devices(qhd_devices, ARRAY_SIZE(qhd_devices)); | |
1362 | ||
1363 | #else | |
1364 | /* | |
dd8a61a7 MD |
1365 | * For WVGA Panel (18-bit RGB, CONFIG_AP4EVB_WVGA=y) and |
1366 | * IRQ7 for Touch Panel, set dip switches S3, S43 to ON, OFF. | |
9fa1b7fe | 1367 | */ |
dd8a61a7 | 1368 | |
9fa1b7fe KM |
1369 | gpio_request(GPIO_FN_LCDD17, NULL); |
1370 | gpio_request(GPIO_FN_LCDD16, NULL); | |
1371 | gpio_request(GPIO_FN_LCDD15, NULL); | |
1372 | gpio_request(GPIO_FN_LCDD14, NULL); | |
1373 | gpio_request(GPIO_FN_LCDD13, NULL); | |
1374 | gpio_request(GPIO_FN_LCDD12, NULL); | |
1375 | gpio_request(GPIO_FN_LCDD11, NULL); | |
1376 | gpio_request(GPIO_FN_LCDD10, NULL); | |
1377 | gpio_request(GPIO_FN_LCDD9, NULL); | |
1378 | gpio_request(GPIO_FN_LCDD8, NULL); | |
1379 | gpio_request(GPIO_FN_LCDD7, NULL); | |
1380 | gpio_request(GPIO_FN_LCDD6, NULL); | |
1381 | gpio_request(GPIO_FN_LCDD5, NULL); | |
1382 | gpio_request(GPIO_FN_LCDD4, NULL); | |
1383 | gpio_request(GPIO_FN_LCDD3, NULL); | |
1384 | gpio_request(GPIO_FN_LCDD2, NULL); | |
1385 | gpio_request(GPIO_FN_LCDD1, NULL); | |
1386 | gpio_request(GPIO_FN_LCDD0, NULL); | |
1387 | gpio_request(GPIO_FN_LCDDISP, NULL); | |
1388 | gpio_request(GPIO_FN_LCDDCK, NULL); | |
1389 | ||
1390 | gpio_request(GPIO_PORT189, NULL); /* backlight */ | |
1391 | gpio_direction_output(GPIO_PORT189, 1); | |
1392 | ||
1393 | gpio_request(GPIO_PORT151, NULL); /* LCDDON */ | |
1394 | gpio_direction_output(GPIO_PORT151, 1); | |
1395 | ||
1396 | lcdc_info.clock_source = LCDC_CLK_BUS; | |
1397 | lcdc_info.ch[0].interface_type = RGB18; | |
f60cb470 | 1398 | lcdc_info.ch[0].clock_divider = 3; |
9fa1b7fe | 1399 | lcdc_info.ch[0].flags = 0; |
9fa1b7fe KM |
1400 | lcdc_info.ch[0].lcd_size_cfg.width = 152; |
1401 | lcdc_info.ch[0].lcd_size_cfg.height = 91; | |
1402 | ||
1403 | /* enable TouchScreen */ | |
6845664a | 1404 | irq_set_irq_type(IRQ7, IRQ_TYPE_LEVEL_LOW); |
9fa1b7fe KM |
1405 | |
1406 | tsc_device.irq = IRQ7; | |
1407 | i2c_register_board_info(0, &tsc_device, 1); | |
1408 | #endif /* CONFIG_AP4EVB_QHD */ | |
341291a6 | 1409 | |
1a0b1eac GL |
1410 | /* CEU */ |
1411 | ||
1412 | /* | |
1413 | * TODO: reserve memory for V4L2 DMA buffers, when a suitable API | |
1414 | * becomes available | |
1415 | */ | |
1416 | ||
1417 | /* MIPI-CSI stuff */ | |
1418 | gpio_request(GPIO_FN_VIO_CKO, NULL); | |
1419 | ||
1420 | clk = clk_get(NULL, "vck1_clk"); | |
1421 | if (!IS_ERR(clk)) { | |
1422 | clk_set_rate(clk, clk_round_rate(clk, 13000000)); | |
1423 | clk_enable(clk); | |
1424 | clk_put(clk); | |
1425 | } | |
1426 | ||
2b7eda63 MD |
1427 | sh7372_add_standard_devices(); |
1428 | ||
dfbcdf64 GL |
1429 | /* HDMI */ |
1430 | gpio_request(GPIO_FN_HDMI_HPD, NULL); | |
1431 | gpio_request(GPIO_FN_HDMI_CEC, NULL); | |
1432 | ||
1433 | /* Reset HDMI, must be held at least one EXTALR (32768Hz) period */ | |
1434 | #define SRCR4 0xe61580bc | |
1435 | srcr4 = __raw_readl(SRCR4); | |
1436 | __raw_writel(srcr4 | (1 << 13), SRCR4); | |
1437 | udelay(50); | |
1438 | __raw_writel(srcr4 & ~(1 << 13), SRCR4); | |
1439 | ||
2b7eda63 | 1440 | platform_add_devices(ap4evb_devices, ARRAY_SIZE(ap4evb_devices)); |
2ce51f8b | 1441 | |
96f7934e MD |
1442 | sh7372_add_device_to_domain(&sh7372_a4lc, &lcdc1_device); |
1443 | sh7372_add_device_to_domain(&sh7372_a4lc, &lcdc_device); | |
c1ba5bb5 | 1444 | sh7372_add_device_to_domain(&sh7372_a4mp, &fsi_device); |
96f7934e | 1445 | |
d93f5cde MD |
1446 | sh7372_add_device_to_domain(&sh7372_a3sp, &sh_mmcif_device); |
1447 | sh7372_add_device_to_domain(&sh7372_a3sp, &sdhi0_device); | |
1448 | sh7372_add_device_to_domain(&sh7372_a3sp, &sdhi1_device); | |
382414b9 | 1449 | sh7372_add_device_to_domain(&sh7372_a4r, &ceu_device); |
d93f5cde | 1450 | |
2ce51f8b | 1451 | hdmi_init_pm_clock(); |
6084c81e | 1452 | fsi_init_pm_clock(); |
97991657 | 1453 | sh7372_pm_init(); |
a41b6466 | 1454 | pm_clk_add(&fsi_device.dev, "spu2"); |
d0168fdc | 1455 | pm_clk_add(&lcdc1_device.dev, "hdmi"); |
2b7eda63 MD |
1456 | } |
1457 | ||
495b3cea MD |
1458 | static void __init ap4evb_timer_init(void) |
1459 | { | |
1460 | sh7372_clock_init(); | |
1461 | shmobile_timer.init(); | |
dfbcdf64 GL |
1462 | |
1463 | /* External clock source */ | |
685e4080 | 1464 | clk_set_rate(&sh7372_dv_clki_clk, 27000000); |
495b3cea MD |
1465 | } |
1466 | ||
1467 | static struct sys_timer ap4evb_timer = { | |
1468 | .init = ap4evb_timer_init, | |
1469 | }; | |
1470 | ||
2b7eda63 | 1471 | MACHINE_START(AP4EVB, "ap4evb") |
2b7eda63 MD |
1472 | .map_io = ap4evb_map_io, |
1473 | .init_irq = sh7372_init_irq, | |
863b1719 | 1474 | .handle_irq = shmobile_handle_irq_intc, |
2b7eda63 | 1475 | .init_machine = ap4evb_init, |
495b3cea | 1476 | .timer = &ap4evb_timer, |
2b7eda63 | 1477 | MACHINE_END |