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53e42c29 KM |
1 | /* |
2 | * Bock-W board support | |
3 | * | |
4 | * Copyright (C) 2013 Renesas Solutions Corp. | |
5 | * Copyright (C) 2013 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License as published by | |
9 | * the Free Software Foundation; version 2 of the License. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program; if not, write to the Free Software | |
18 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | |
19 | */ | |
20 | ||
ca7bb309 KM |
21 | #include <linux/mfd/tmio.h> |
22 | #include <linux/mmc/host.h> | |
c06a164c | 23 | #include <linux/mtd/partitions.h> |
111ea179 | 24 | #include <linux/pinctrl/machine.h> |
53e42c29 | 25 | #include <linux/platform_device.h> |
741440e8 KM |
26 | #include <linux/regulator/fixed.h> |
27 | #include <linux/regulator/machine.h> | |
27d5f27e | 28 | #include <linux/smsc911x.h> |
c06a164c KM |
29 | #include <linux/spi/spi.h> |
30 | #include <linux/spi/flash.h> | |
53e42c29 | 31 | #include <mach/common.h> |
27d5f27e | 32 | #include <mach/irqs.h> |
53e42c29 KM |
33 | #include <mach/r8a7778.h> |
34 | #include <asm/mach/arch.h> | |
35 | ||
d998cef3 KM |
36 | /* |
37 | * CN9(Upper side) SCIF/RCAN selection | |
38 | * | |
39 | * 1,4 3,6 | |
40 | * SW40 SCIF RCAN | |
41 | * SW41 SCIF RCAN | |
42 | */ | |
43 | ||
1e0edb76 KM |
44 | /* |
45 | * MMC (CN26) pin | |
46 | * | |
47 | * SW6 (D2) 3 pin | |
48 | * SW7 (D5) ON | |
49 | * SW8 (D3) 3 pin | |
50 | * SW10 (D4) 1 pin | |
51 | * SW12 (CLK) 1 pin | |
52 | * SW13 (D6) 3 pin | |
53 | * SW14 (CMD) ON | |
54 | * SW15 (D6) 1 pin | |
55 | * SW16 (D0) ON | |
56 | * SW17 (D1) ON | |
57 | * SW18 (D7) 3 pin | |
58 | * SW19 (MMC) 1 pin | |
59 | */ | |
60 | ||
741440e8 KM |
61 | /* Dummy supplies, where voltage doesn't matter */ |
62 | static struct regulator_consumer_supply dummy_supplies[] = { | |
63 | REGULATOR_SUPPLY("vddvario", "smsc911x"), | |
64 | REGULATOR_SUPPLY("vdd33a", "smsc911x"), | |
65 | }; | |
66 | ||
27d5f27e KM |
67 | static struct smsc911x_platform_config smsc911x_data = { |
68 | .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, | |
69 | .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL, | |
70 | .flags = SMSC911X_USE_32BIT, | |
71 | .phy_interface = PHY_INTERFACE_MODE_MII, | |
72 | }; | |
73 | ||
74 | static struct resource smsc911x_resources[] = { | |
75 | DEFINE_RES_MEM(0x18300000, 0x1000), | |
76 | DEFINE_RES_IRQ(irq_pin(0)), /* IRQ 0 */ | |
77 | }; | |
78 | ||
40e71e70 | 79 | /* USB */ |
1a87b01d SS |
80 | static struct rcar_phy_platform_data usb_phy_platform_data __initdata; |
81 | ||
ca7bb309 KM |
82 | /* SDHI */ |
83 | static struct sh_mobile_sdhi_info sdhi0_info = { | |
84 | .tmio_caps = MMC_CAP_SD_HIGHSPEED, | |
85 | .tmio_ocr_mask = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34, | |
86 | .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT, | |
87 | }; | |
88 | ||
9aa3853a SS |
89 | static struct sh_eth_plat_data ether_platform_data __initdata = { |
90 | .phy = 0x01, | |
91 | .edmac_endian = EDMAC_LITTLE_ENDIAN, | |
92 | .register_type = SH_ETH_REG_FAST_RCAR, | |
93 | .phy_interface = PHY_INTERFACE_MODE_RMII, | |
94 | /* | |
95 | * Although the LINK signal is available on the board, it's connected to | |
96 | * the link/activity LED output of the PHY, thus the link disappears and | |
97 | * reappears after each packet. We'd be better off ignoring such signal | |
98 | * and getting the link state from the PHY indirectly. | |
99 | */ | |
100 | .no_ether_link = 1, | |
101 | }; | |
102 | ||
ed17be92 KM |
103 | /* I2C */ |
104 | static struct i2c_board_info i2c0_devices[] = { | |
105 | { | |
106 | I2C_BOARD_INFO("rx8581", 0x51), | |
107 | }, | |
108 | }; | |
109 | ||
c06a164c KM |
110 | /* HSPI*/ |
111 | static struct mtd_partition m25p80_spi_flash_partitions[] = { | |
112 | { | |
113 | .name = "data(spi)", | |
114 | .size = 0x0100000, | |
115 | .offset = 0, | |
116 | }, | |
117 | }; | |
118 | ||
119 | static struct flash_platform_data spi_flash_data = { | |
120 | .name = "m25p80", | |
121 | .type = "s25fl008k", | |
122 | .parts = m25p80_spi_flash_partitions, | |
123 | .nr_parts = ARRAY_SIZE(m25p80_spi_flash_partitions), | |
124 | }; | |
125 | ||
126 | static struct spi_board_info spi_board_info[] __initdata = { | |
127 | { | |
128 | .modalias = "m25p80", | |
129 | .max_speed_hz = 104000000, | |
130 | .chip_select = 0, | |
131 | .bus_num = 0, | |
132 | .mode = SPI_MODE_0, | |
133 | .platform_data = &spi_flash_data, | |
134 | }, | |
135 | }; | |
136 | ||
1e0edb76 KM |
137 | /* MMC */ |
138 | static struct sh_mmcif_plat_data sh_mmcif_plat = { | |
139 | .sup_pclk = 0, | |
140 | .ocr = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34, | |
141 | .caps = MMC_CAP_4_BIT_DATA | | |
142 | MMC_CAP_8_BIT_DATA | | |
143 | MMC_CAP_NEEDS_POLL, | |
144 | }; | |
145 | ||
111ea179 | 146 | static const struct pinctrl_map bockw_pinctrl_map[] = { |
9aa3853a | 147 | /* Ether */ |
2c83322c | 148 | PIN_MAP_MUX_GROUP_DEFAULT("r8a777x-ether", "pfc-r8a7778", |
9aa3853a | 149 | "ether_rmii", "ether"), |
c06a164c KM |
150 | /* HSPI0 */ |
151 | PIN_MAP_MUX_GROUP_DEFAULT("sh-hspi.0", "pfc-r8a7778", | |
152 | "hspi0_a", "hspi0"), | |
1e0edb76 KM |
153 | /* MMC */ |
154 | PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif", "pfc-r8a7778", | |
155 | "mmc_data8", "mmc"), | |
156 | PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif", "pfc-r8a7778", | |
157 | "mmc_ctrl", "mmc"), | |
111ea179 KM |
158 | /* SCIF0 */ |
159 | PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778", | |
160 | "scif0_data_a", "scif0"), | |
161 | PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778", | |
162 | "scif0_ctrl", "scif0"), | |
40e71e70 | 163 | /* USB */ |
1a87b01d SS |
164 | PIN_MAP_MUX_GROUP_DEFAULT("ehci-platform", "pfc-r8a7778", |
165 | "usb0", "usb0"), | |
166 | PIN_MAP_MUX_GROUP_DEFAULT("ehci-platform", "pfc-r8a7778", | |
167 | "usb1", "usb1"), | |
ca7bb309 KM |
168 | /* SDHI0 */ |
169 | PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7778", | |
fa3e0cee SS |
170 | "sdhi0_data4", "sdhi0"), |
171 | PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7778", | |
172 | "sdhi0_ctrl", "sdhi0"), | |
173 | PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7778", | |
174 | "sdhi0_cd", "sdhi0"), | |
175 | PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7778", | |
176 | "sdhi0_wp", "sdhi0"), | |
111ea179 KM |
177 | }; |
178 | ||
44bfe684 | 179 | #define FPGA 0x18200000 |
27d5f27e | 180 | #define IRQ0MR 0x30 |
ca7bb309 KM |
181 | #define PFC 0xfffc0000 |
182 | #define PUPR4 0x110 | |
53e42c29 KM |
183 | static void __init bockw_init(void) |
184 | { | |
44bfe684 | 185 | void __iomem *base; |
27d5f27e | 186 | |
53e42c29 | 187 | r8a7778_clock_init(); |
27d5f27e | 188 | r8a7778_init_irq_extpin(1); |
53e42c29 | 189 | r8a7778_add_standard_devices(); |
1a87b01d | 190 | r8a7778_add_usb_phy_device(&usb_phy_platform_data); |
9aa3853a | 191 | r8a7778_add_ether_device(ðer_platform_data); |
ed17be92 | 192 | r8a7778_add_i2c_device(0); |
c06a164c | 193 | r8a7778_add_hspi_device(0); |
1e0edb76 | 194 | r8a7778_add_mmc_device(&sh_mmcif_plat); |
27d5f27e | 195 | |
ed17be92 KM |
196 | i2c_register_board_info(0, i2c0_devices, |
197 | ARRAY_SIZE(i2c0_devices)); | |
c06a164c KM |
198 | spi_register_board_info(spi_board_info, |
199 | ARRAY_SIZE(spi_board_info)); | |
111ea179 KM |
200 | pinctrl_register_mappings(bockw_pinctrl_map, |
201 | ARRAY_SIZE(bockw_pinctrl_map)); | |
202 | r8a7778_pinmux_init(); | |
203 | ||
ca7bb309 | 204 | /* for SMSC */ |
44bfe684 KM |
205 | base = ioremap_nocache(FPGA, SZ_1M); |
206 | if (base) { | |
27d5f27e KM |
207 | /* |
208 | * CAUTION | |
209 | * | |
210 | * IRQ0/1 is cascaded interrupt from FPGA. | |
211 | * it should be cared in the future | |
212 | * Now, it is assuming IRQ0 was used only from SMSC. | |
213 | */ | |
44bfe684 | 214 | u16 val = ioread16(base + IRQ0MR); |
27d5f27e | 215 | val &= ~(1 << 4); /* enable SMSC911x */ |
44bfe684 KM |
216 | iowrite16(val, base + IRQ0MR); |
217 | iounmap(base); | |
27d5f27e | 218 | |
741440e8 KM |
219 | regulator_register_fixed(0, dummy_supplies, |
220 | ARRAY_SIZE(dummy_supplies)); | |
27d5f27e KM |
221 | |
222 | platform_device_register_resndata( | |
223 | &platform_bus, "smsc911x", -1, | |
224 | smsc911x_resources, ARRAY_SIZE(smsc911x_resources), | |
225 | &smsc911x_data, sizeof(smsc911x_data)); | |
226 | } | |
ca7bb309 KM |
227 | |
228 | /* for SDHI */ | |
229 | base = ioremap_nocache(PFC, 0x200); | |
230 | if (base) { | |
231 | /* | |
232 | * FIXME | |
233 | * | |
234 | * SDHI CD/WP pin needs pull-up | |
235 | */ | |
236 | iowrite32(ioread32(base + PUPR4) | (3 << 26), base + PUPR4); | |
237 | iounmap(base); | |
238 | ||
239 | r8a7778_sdhi_init(0, &sdhi0_info); | |
240 | } | |
53e42c29 KM |
241 | } |
242 | ||
243 | static const char *bockw_boards_compat_dt[] __initdata = { | |
244 | "renesas,bockw", | |
245 | NULL, | |
246 | }; | |
247 | ||
248 | DT_MACHINE_START(BOCKW_DT, "bockw") | |
249 | .init_early = r8a7778_init_delay, | |
250 | .init_irq = r8a7778_init_irq_dt, | |
251 | .init_machine = bockw_init, | |
252 | .init_time = shmobile_timer_init, | |
253 | .dt_compat = bockw_boards_compat_dt, | |
1a87b01d | 254 | .init_late = r8a7778_init_late, |
53e42c29 | 255 | MACHINE_END |