]> git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blame - arch/arm/mach-shmobile/board-mackerel.c
Merge git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6
[mirror_ubuntu-artful-kernel.git] / arch / arm / mach-shmobile / board-mackerel.c
CommitLineData
920adc75
KM
1/*
2 * mackerel board support
3 *
4 * Copyright (C) 2010 Renesas Solutions Corp.
5 * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
6 *
7 * based on ap4evb
8 * Copyright (C) 2010 Magnus Damm
9 * Copyright (C) 2008 Yoshihiro Shimoda
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; version 2 of the License.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
23 */
12c4309b 24#include <linux/delay.h>
920adc75
KM
25#include <linux/kernel.h>
26#include <linux/init.h>
27#include <linux/interrupt.h>
28#include <linux/irq.h>
29#include <linux/platform_device.h>
30#include <linux/gpio.h>
31#include <linux/input.h>
32#include <linux/io.h>
1a44d72a 33#include <linux/i2c.h>
d44deb35 34#include <linux/leds.h>
6dff7da2
YG
35#include <linux/mfd/tmio.h>
36#include <linux/mmc/host.h>
41491b9a 37#include <linux/mmc/sh_mmcif.h>
17e75d82 38#include <linux/mmc/sh_mobile_sdhi.h>
920adc75
KM
39#include <linux/mtd/mtd.h>
40#include <linux/mtd/partitions.h>
41#include <linux/mtd/physmap.h>
b5e8d269 42#include <linux/pm_clock.h>
2264c151 43#include <linux/smsc911x.h>
1a44d72a 44#include <linux/sh_intc.h>
cd8ab004 45#include <linux/tca6416_keypad.h>
25338f2e 46#include <linux/usb/r8a66597.h>
66ee3bef 47#include <linux/usb/renesas_usbhs.h>
9b742024 48#include <linux/dma-mapping.h>
920adc75 49
12c4309b 50#include <video/sh_mobile_hdmi.h>
11fee467 51#include <video/sh_mobile_lcdc.h>
ae37c8de
MD
52#include <media/sh_mobile_ceu.h>
53#include <media/soc_camera.h>
54#include <media/soc_camera_platform.h>
1a44d72a
KM
55#include <sound/sh_fsi.h>
56
920adc75
KM
57#include <mach/common.h>
58#include <mach/sh7372.h>
59
60#include <asm/mach/arch.h>
61#include <asm/mach/time.h>
62#include <asm/mach/map.h>
63#include <asm/mach-types.h>
64
65/*
66 * Address Interface BusWidth note
67 * ------------------------------------------------------------------
68 * 0x0000_0000 NOR Flash ROM (MCP) 16bit SW7 : bit1 = ON
69 * 0x0800_0000 user area -
70 * 0x1000_0000 NOR Flash ROM (MCP) 16bit SW7 : bit1 = OFF
71 * 0x1400_0000 Ether (LAN9220) 16bit
72 * 0x1600_0000 user area - cannot use with NAND
73 * 0x1800_0000 user area -
74 * 0x1A00_0000 -
75 * 0x4000_0000 LPDDR2-SDRAM (POP) 32bit
76 */
77
4b82b689
KM
78/*
79 * CPU mode
80 *
81 * SW4 | Boot Area| Master | Remarks
82 * 1 | 2 | 3 | 4 | 5 | 6 | 8 | | Processor|
83 * ----+-----+-----+-----+-----+-----+-----+----------+----------+--------------
84 * ON | ON | OFF | ON | ON | OFF | OFF | External | System | External ROM
85 * ON | ON | ON | ON | ON | OFF | OFF | External | System | ROM Debug
86 * ON | ON | X | ON | OFF | OFF | OFF | Built-in | System | ROM Debug
87 * X | OFF | X | X | X | X | OFF | Built-in | System | MaskROM
88 * OFF | X | X | X | X | X | OFF | Built-in | System | MaskROM
89 * X | X | X | OFF | X | X | OFF | Built-in | System | MaskROM
90 * OFF | ON | OFF | X | X | OFF | ON | External | System | Standalone
91 * ON | OFF | OFF | X | X | OFF | ON | External | Realtime | Standalone
92*/
93
94/*
95 * NOR Flash ROM
96 *
97 * SW1 | SW2 | SW7 | NOR Flash ROM
98 * bit1 | bit1 bit2 | bit1 | Memory allocation
99 * ------+------------+------+------------------
100 * OFF | ON OFF | ON | Area 0
101 * OFF | ON OFF | OFF | Area 4
102 */
103
104/*
105 * SMSC 9220
106 *
107 * SW1 SMSC 9220
108 * -----------------------
109 * ON access disable
110 * OFF access enable
111 */
112
113/*
114 * NAND Flash ROM
115 *
116 * SW1 | SW2 | SW7 | NAND Flash ROM
117 * bit1 | bit1 bit2 | bit2 | Memory allocation
118 * ------+------------+------+------------------
119 * OFF | ON OFF | ON | FCE 0
120 * OFF | ON OFF | OFF | FCE 1
121 */
122
123/*
124 * External interrupt pin settings
125 *
126 * IRQX | pin setting | device | level
127 * ------+--------------------+--------------------+-------
128 * IRQ0 | ICR1A.IRQ0SA=0010 | SDHI2 card detect | Low
129 * IRQ6 | ICR1A.IRQ6SA=0011 | Ether(LAN9220) | High
e2a53b7c 130 * IRQ7 | ICR1A.IRQ7SA=0010 | LCD Touch Panel | Low
4b82b689
KM
131 * IRQ8 | ICR2A.IRQ8SA=0010 | MMC/SD card detect | Low
132 * IRQ9 | ICR2A.IRQ9SA=0010 | KEY(TCA6408) | Low
133 * IRQ21 | ICR4A.IRQ21SA=0011 | Sensor(ADXL345) | High
134 * IRQ22 | ICR4A.IRQ22SA=0011 | Sensor(AK8975) | High
25338f2e 135 */
4b82b689 136
25338f2e
KM
137/*
138 * USB
139 *
140 * USB0 : CN22 : Function
141 * USB1 : CN31 : Function/Host *1
142 *
143 * J30 (for CN31) *1
144 * ----------+---------------+-------------
145 * 1-2 short | VBUS 5V | Host
146 * open | external VBUS | Function
147 *
148 * *1
66ee3bef
KM
149 * CN31 is used as
150 * CONFIG_USB_R8A66597_HCD Host
151 * CONFIG_USB_RENESAS_USBHS Function
152 *
153 * CAUTION
154 *
155 * renesas_usbhs driver can use external interrupt mode
156 * (which come from USB-PHY) or autonomy mode (it use own interrupt)
157 * for detecting connection/disconnection when Function.
158 * USB will be power OFF while it has been disconnecting
159 * if external interrupt mode, and it is always power ON if autonomy mode,
160 *
161 * mackerel can not use external interrupt (IRQ7-PORT167) mode on "USB0",
162 * because Touchscreen is using IRQ7-PORT40.
163 * It is impossible to use IRQ7 demux on this board.
164 *
165 * We can use external interrupt mode USB-Function on "USB1".
166 * USB1 can become Host by r8a66597, and become Function by renesas_usbhs.
167 * But don't select both drivers in same time.
168 * These uses same IRQ number for request_irq(), and aren't supporting
e2a53b7c 169 * IRQF_SHARED / IORESOURCE_IRQ_SHAREABLE.
66ee3bef
KM
170 *
171 * Actually these are old/new version of USB driver.
e2a53b7c 172 * This mean its register will be broken if it supports shared IRQ,
25338f2e 173 */
4b82b689 174
6dff7da2
YG
175/*
176 * SDHI0 (CN12)
177 *
178 * SW56 : OFF
179 *
180 */
181
182/* MMC /SDHI1 (CN7)
183 *
184 * I/O voltage : 1.8v
185 *
186 * Power voltage : 1.8v or 3.3v
41491b9a 187 * J22 : select power voltage *1
6dff7da2
YG
188 * 1-2 pin : 1.8v
189 * 2-3 pin : 3.3v
190 *
41491b9a
YG
191 * *1
192 * Please change J22 depends the card to be used.
193 * MMC's OCR field set to support either voltage for the card inserted.
194 *
6dff7da2
YG
195 * SW1 | SW33
196 * | bit1 | bit2 | bit3 | bit4
197 * -------------+------+------+------+-------
2150dace
SH
198 * MMC0 OFF | OFF | X | ON | X (Use MMCIF)
199 * SDHI1 OFF | ON | X | OFF | X (Use MFD_SH_MOBILE_SDHI)
6dff7da2
YG
200 *
201 */
202
203/*
204 * SDHI2 (CN23)
205 *
206 * microSD card sloct
207 *
208 */
209
1a44d72a
KM
210/*
211 * FIXME !!
212 *
213 * gpio_no_direction
66ee3bef 214 * gpio_pull_down
1a44d72a
KM
215 * are quick_hack.
216 *
217 * current gpio frame work doesn't have
218 * the method to control only pull up/down/free.
219 * this function should be replaced by correct gpio function
220 */
221static void __init gpio_no_direction(u32 addr)
222{
223 __raw_writeb(0x00, addr);
224}
225
66ee3bef
KM
226static void __init gpio_pull_down(u32 addr)
227{
228 u8 data = __raw_readb(addr);
229
230 data &= 0x0F;
231 data |= 0xA0;
232
233 __raw_writeb(data, addr);
234}
235
920adc75
KM
236/* MTD */
237static struct mtd_partition nor_flash_partitions[] = {
238 {
239 .name = "loader",
240 .offset = 0x00000000,
241 .size = 512 * 1024,
242 .mask_flags = MTD_WRITEABLE,
243 },
244 {
245 .name = "bootenv",
246 .offset = MTDPART_OFS_APPEND,
247 .size = 512 * 1024,
248 .mask_flags = MTD_WRITEABLE,
249 },
250 {
251 .name = "kernel_ro",
252 .offset = MTDPART_OFS_APPEND,
253 .size = 8 * 1024 * 1024,
254 .mask_flags = MTD_WRITEABLE,
255 },
256 {
257 .name = "kernel",
258 .offset = MTDPART_OFS_APPEND,
259 .size = 8 * 1024 * 1024,
260 },
261 {
262 .name = "data",
263 .offset = MTDPART_OFS_APPEND,
264 .size = MTDPART_SIZ_FULL,
265 },
266};
267
268static struct physmap_flash_data nor_flash_data = {
269 .width = 2,
270 .parts = nor_flash_partitions,
271 .nr_parts = ARRAY_SIZE(nor_flash_partitions),
272};
273
274static struct resource nor_flash_resources[] = {
275 [0] = {
487881c0
MD
276 .start = 0x20000000, /* CS0 shadow instead of regular CS0 */
277 .end = 0x28000000 - 1, /* needed by USB MASK ROM boot */
920adc75
KM
278 .flags = IORESOURCE_MEM,
279 }
280};
281
282static struct platform_device nor_flash_device = {
283 .name = "physmap-flash",
284 .dev = {
285 .platform_data = &nor_flash_data,
286 },
287 .num_resources = ARRAY_SIZE(nor_flash_resources),
288 .resource = nor_flash_resources,
289};
290
2264c151
KM
291/* SMSC */
292static struct resource smc911x_resources[] = {
293 {
294 .start = 0x14000000,
295 .end = 0x16000000 - 1,
296 .flags = IORESOURCE_MEM,
297 }, {
298 .start = evt2irq(0x02c0) /* IRQ6A */,
299 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
300 },
301};
302
303static struct smsc911x_platform_config smsc911x_info = {
304 .flags = SMSC911X_USE_16BIT | SMSC911X_SAVE_MAC_ADDRESS,
305 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
306 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
307};
308
309static struct platform_device smc911x_device = {
310 .name = "smsc911x",
311 .id = -1,
312 .num_resources = ARRAY_SIZE(smc911x_resources),
313 .resource = smc911x_resources,
314 .dev = {
315 .platform_data = &smsc911x_info,
316 },
317};
318
1c7fcbed
DHG
319/* MERAM */
320static struct sh_mobile_meram_info mackerel_meram_info = {
321 .addr_mode = SH_MOBILE_MERAM_MODE1,
322};
323
324static struct resource meram_resources[] = {
325 [0] = {
326 .name = "MERAM",
327 .start = 0xe8000000,
328 .end = 0xe81fffff,
329 .flags = IORESOURCE_MEM,
330 },
331};
332
333static struct platform_device meram_device = {
334 .name = "sh_mobile_meram",
335 .id = 0,
336 .num_resources = ARRAY_SIZE(meram_resources),
337 .resource = meram_resources,
338 .dev = {
339 .platform_data = &mackerel_meram_info,
340 },
341};
342
11fee467
KM
343/* LCDC */
344static struct fb_videomode mackerel_lcdc_modes[] = {
345 {
346 .name = "WVGA Panel",
347 .xres = 800,
348 .yres = 480,
349 .left_margin = 220,
350 .right_margin = 110,
351 .hsync_len = 70,
352 .upper_margin = 20,
353 .lower_margin = 5,
354 .vsync_len = 5,
355 .sync = 0,
356 },
357};
358
1fbdfcde
MD
359static int mackerel_set_brightness(void *board_data, int brightness)
360{
361 gpio_set_value(GPIO_PORT31, brightness);
362
363 return 0;
364}
365
366static int mackerel_get_brightness(void *board_data)
367{
368 return gpio_get_value(GPIO_PORT31);
369}
370
1c7fcbed
DHG
371static struct sh_mobile_meram_cfg lcd_meram_cfg = {
372 .icb[0] = {
373 .marker_icb = 28,
374 .cache_icb = 24,
375 .meram_offset = 0x0,
376 .meram_size = 0x40,
377 },
378 .icb[1] = {
379 .marker_icb = 29,
380 .cache_icb = 25,
381 .meram_offset = 0x40,
382 .meram_size = 0x40,
383 },
384};
385
11fee467 386static struct sh_mobile_lcdc_info lcdc_info = {
1c7fcbed 387 .meram_dev = &mackerel_meram_info,
11fee467
KM
388 .clock_source = LCDC_CLK_BUS,
389 .ch[0] = {
390 .chan = LCDC_CHAN_MAINLCD,
edd153a3 391 .fourcc = V4L2_PIX_FMT_RGB565,
11fee467
KM
392 .lcd_cfg = mackerel_lcdc_modes,
393 .num_cfg = ARRAY_SIZE(mackerel_lcdc_modes),
394 .interface_type = RGB24,
2c34e939 395 .clock_divider = 3,
11fee467
KM
396 .flags = 0,
397 .lcd_size_cfg.width = 152,
398 .lcd_size_cfg.height = 91,
1fbdfcde
MD
399 .board_cfg = {
400 .set_brightness = mackerel_set_brightness,
401 .get_brightness = mackerel_get_brightness,
402 },
403 .bl_info = {
404 .name = "sh_mobile_lcdc_bl",
405 .max_brightness = 1,
406 },
1c7fcbed 407 .meram_cfg = &lcd_meram_cfg,
11fee467
KM
408 }
409};
410
411static struct resource lcdc_resources[] = {
412 [0] = {
413 .name = "LCDC",
414 .start = 0xfe940000,
415 .end = 0xfe943fff,
416 .flags = IORESOURCE_MEM,
417 },
418 [1] = {
419 .start = intcs_evt2irq(0x580),
420 .flags = IORESOURCE_IRQ,
421 },
422};
423
424static struct platform_device lcdc_device = {
425 .name = "sh_mobile_lcdc_fb",
426 .num_resources = ARRAY_SIZE(lcdc_resources),
427 .resource = lcdc_resources,
428 .dev = {
429 .platform_data = &lcdc_info,
430 .coherent_dma_mask = ~0,
431 },
432};
433
1c7fcbed
DHG
434static struct sh_mobile_meram_cfg hdmi_meram_cfg = {
435 .icb[0] = {
436 .marker_icb = 30,
437 .cache_icb = 26,
438 .meram_offset = 0x80,
439 .meram_size = 0x100,
440 },
441 .icb[1] = {
442 .marker_icb = 31,
443 .cache_icb = 27,
444 .meram_offset = 0x180,
445 .meram_size = 0x100,
446 },
447};
12c4309b
KM
448/* HDMI */
449static struct sh_mobile_lcdc_info hdmi_lcdc_info = {
1c7fcbed 450 .meram_dev = &mackerel_meram_info,
12c4309b
KM
451 .clock_source = LCDC_CLK_EXTERNAL,
452 .ch[0] = {
453 .chan = LCDC_CHAN_MAINLCD,
edd153a3 454 .fourcc = V4L2_PIX_FMT_RGB565,
12c4309b
KM
455 .interface_type = RGB24,
456 .clock_divider = 1,
457 .flags = LCDC_FLAGS_DWPOL,
1c7fcbed 458 .meram_cfg = &hdmi_meram_cfg,
12c4309b
KM
459 }
460};
461
462static struct resource hdmi_lcdc_resources[] = {
463 [0] = {
464 .name = "LCDC1",
465 .start = 0xfe944000,
466 .end = 0xfe947fff,
467 .flags = IORESOURCE_MEM,
468 },
469 [1] = {
470 .start = intcs_evt2irq(0x1780),
471 .flags = IORESOURCE_IRQ,
472 },
473};
474
475static struct platform_device hdmi_lcdc_device = {
476 .name = "sh_mobile_lcdc_fb",
477 .num_resources = ARRAY_SIZE(hdmi_lcdc_resources),
478 .resource = hdmi_lcdc_resources,
479 .id = 1,
480 .dev = {
481 .platform_data = &hdmi_lcdc_info,
482 .coherent_dma_mask = ~0,
483 },
484};
485
486static struct sh_mobile_hdmi_info hdmi_info = {
487 .lcd_chan = &hdmi_lcdc_info.ch[0],
488 .lcd_dev = &hdmi_lcdc_device.dev,
98d27b8a 489 .flags = HDMI_SND_SRC_SPDIF,
12c4309b
KM
490};
491
492static struct resource hdmi_resources[] = {
493 [0] = {
494 .name = "HDMI",
495 .start = 0xe6be0000,
496 .end = 0xe6be00ff,
497 .flags = IORESOURCE_MEM,
498 },
499 [1] = {
500 /* There's also an HDMI interrupt on INTCS @ 0x18e0 */
501 .start = evt2irq(0x17e0),
502 .flags = IORESOURCE_IRQ,
503 },
504};
505
506static struct platform_device hdmi_device = {
507 .name = "sh-mobile-hdmi",
508 .num_resources = ARRAY_SIZE(hdmi_resources),
509 .resource = hdmi_resources,
510 .id = -1,
511 .dev = {
512 .platform_data = &hdmi_info,
513 },
514};
515
3f25c9cc
KM
516static struct platform_device fsi_hdmi_device = {
517 .name = "sh_fsi2_b_hdmi",
518};
519
2ce51f8b 520static void __init hdmi_init_pm_clock(void)
12c4309b
KM
521{
522 struct clk *hdmi_ick = clk_get(&hdmi_device.dev, "ick");
523 int ret;
524 long rate;
525
526 if (IS_ERR(hdmi_ick)) {
527 ret = PTR_ERR(hdmi_ick);
528 pr_err("Cannot get HDMI ICK: %d\n", ret);
529 goto out;
530 }
531
532 ret = clk_set_parent(&sh7372_pllc2_clk, &sh7372_dv_clki_div2_clk);
533 if (ret < 0) {
534 pr_err("Cannot set PLLC2 parent: %d, %d users\n",
535 ret, sh7372_pllc2_clk.usecount);
536 goto out;
537 }
538
539 pr_debug("PLLC2 initial frequency %lu\n",
540 clk_get_rate(&sh7372_pllc2_clk));
541
542 rate = clk_round_rate(&sh7372_pllc2_clk, 594000000);
543 if (rate < 0) {
544 pr_err("Cannot get suitable rate: %ld\n", rate);
545 ret = rate;
546 goto out;
547 }
548
549 ret = clk_set_rate(&sh7372_pllc2_clk, rate);
550 if (ret < 0) {
551 pr_err("Cannot set rate %ld: %d\n", rate, ret);
552 goto out;
553 }
554
12c4309b
KM
555 pr_debug("PLLC2 set frequency %lu\n", rate);
556
557 ret = clk_set_parent(hdmi_ick, &sh7372_pllc2_clk);
2ce51f8b 558 if (ret < 0)
12c4309b 559 pr_err("Cannot set HDMI parent: %d\n", ret);
12c4309b
KM
560
561out:
562 if (!IS_ERR(hdmi_ick))
563 clk_put(hdmi_ick);
12c4309b 564}
12c4309b 565
e2a53b7c
MD
566/* USBHS0 is connected to CN22 which takes a USB Mini-B plug
567 *
568 * The sh7372 SoC has IRQ7 set aside for USBHS0 hotplug,
569 * but on this particular board IRQ7 is already used by
570 * the touch screen. This leaves us with software polling.
571 */
572#define USBHS0_POLL_INTERVAL (HZ * 5)
573
574struct usbhs_private {
575 unsigned int usbphyaddr;
576 unsigned int usbcrcaddr;
577 struct renesas_usbhs_platform_info info;
578 struct delayed_work work;
579 struct platform_device *pdev;
580};
581
582#define usbhs_get_priv(pdev) \
583 container_of(renesas_usbhs_get_info(pdev), \
584 struct usbhs_private, info)
585
586#define usbhs_is_connected(priv) \
587 (!((1 << 7) & __raw_readw(priv->usbcrcaddr)))
588
589static int usbhs_get_vbus(struct platform_device *pdev)
590{
591 return usbhs_is_connected(usbhs_get_priv(pdev));
592}
593
594static void usbhs_phy_reset(struct platform_device *pdev)
595{
596 struct usbhs_private *priv = usbhs_get_priv(pdev);
597
598 /* init phy */
599 __raw_writew(0x8a0a, priv->usbcrcaddr);
600}
601
602static int usbhs0_get_id(struct platform_device *pdev)
603{
604 return USBHS_GADGET;
605}
606
607static void usbhs0_work_function(struct work_struct *work)
608{
609 struct usbhs_private *priv = container_of(work, struct usbhs_private,
610 work.work);
611
612 renesas_usbhs_call_notify_hotplug(priv->pdev);
613 schedule_delayed_work(&priv->work, USBHS0_POLL_INTERVAL);
614}
615
616static int usbhs0_hardware_init(struct platform_device *pdev)
617{
618 struct usbhs_private *priv = usbhs_get_priv(pdev);
619
620 priv->pdev = pdev;
621 INIT_DELAYED_WORK(&priv->work, usbhs0_work_function);
622 schedule_delayed_work(&priv->work, USBHS0_POLL_INTERVAL);
623 return 0;
624}
625
626static void usbhs0_hardware_exit(struct platform_device *pdev)
627{
628 struct usbhs_private *priv = usbhs_get_priv(pdev);
629
630 cancel_delayed_work_sync(&priv->work);
631}
632
e2a53b7c
MD
633static struct usbhs_private usbhs0_private = {
634 .usbcrcaddr = 0xe605810c, /* USBCR2 */
635 .info = {
636 .platform_callback = {
637 .hardware_init = usbhs0_hardware_init,
638 .hardware_exit = usbhs0_hardware_exit,
639 .phy_reset = usbhs_phy_reset,
640 .get_id = usbhs0_get_id,
641 .get_vbus = usbhs_get_vbus,
642 },
643 .driver_param = {
644 .buswait_bwait = 4,
fe437561
KM
645 .d0_tx_id = SHDMA_SLAVE_USB0_TX,
646 .d1_rx_id = SHDMA_SLAVE_USB0_RX,
e2a53b7c
MD
647 },
648 },
649};
650
651static struct resource usbhs0_resources[] = {
652 [0] = {
653 .name = "USBHS0",
654 .start = 0xe6890000,
655 .end = 0xe68900e6 - 1,
656 .flags = IORESOURCE_MEM,
657 },
658 [1] = {
659 .start = evt2irq(0x1ca0) /* USB0_USB0I0 */,
660 .flags = IORESOURCE_IRQ,
661 },
662};
663
664static struct platform_device usbhs0_device = {
665 .name = "renesas_usbhs",
666 .id = 0,
667 .dev = {
668 .platform_data = &usbhs0_private.info,
669 },
670 .num_resources = ARRAY_SIZE(usbhs0_resources),
671 .resource = usbhs0_resources,
672};
673
674/* USBHS1 is connected to CN31 which takes a USB Mini-AB plug
675 *
676 * Use J30 to select between Host and Function. This setting
677 * can however not be detected by software. Hotplug of USBHS1
678 * is provided via IRQ8.
679 */
680#define IRQ8 evt2irq(0x0300)
681
682/* USBHS1 USB Host support via r8a66597_hcd */
25338f2e
KM
683static void usb1_host_port_power(int port, int power)
684{
685 if (!power) /* only power-on is supported for now */
686 return;
687
688 /* set VBOUT/PWEN and EXTLP1 in DVSTCTR */
689 __raw_writew(__raw_readw(0xE68B0008) | 0x600, 0xE68B0008);
690}
691
692static struct r8a66597_platdata usb1_host_data = {
693 .on_chip = 1,
694 .port_power = usb1_host_port_power,
695};
696
697static struct resource usb1_host_resources[] = {
698 [0] = {
e2a53b7c
MD
699 .name = "USBHS1",
700 .start = 0xe68b0000,
701 .end = 0xe68b00e6 - 1,
25338f2e
KM
702 .flags = IORESOURCE_MEM,
703 },
704 [1] = {
705 .start = evt2irq(0x1ce0) /* USB1_USB1I0 */,
706 .flags = IORESOURCE_IRQ,
707 },
708};
709
710static struct platform_device usb1_host_device = {
711 .name = "r8a66597_hcd",
712 .id = 1,
713 .dev = {
714 .dma_mask = NULL, /* not use dma */
715 .coherent_dma_mask = 0xffffffff,
716 .platform_data = &usb1_host_data,
717 },
718 .num_resources = ARRAY_SIZE(usb1_host_resources),
719 .resource = usb1_host_resources,
720};
721
e2a53b7c
MD
722/* USBHS1 USB Function support via renesas_usbhs */
723
66ee3bef
KM
724#define USB_PHY_MODE (1 << 4)
725#define USB_PHY_INT_EN ((1 << 3) | (1 << 2))
726#define USB_PHY_ON (1 << 1)
727#define USB_PHY_OFF (1 << 0)
728#define USB_PHY_INT_CLR (USB_PHY_ON | USB_PHY_OFF)
729
66ee3bef
KM
730static irqreturn_t usbhs1_interrupt(int irq, void *data)
731{
732 struct platform_device *pdev = data;
733 struct usbhs_private *priv = usbhs_get_priv(pdev);
734
735 dev_dbg(&pdev->dev, "%s\n", __func__);
736
737 renesas_usbhs_call_notify_hotplug(pdev);
738
739 /* clear status */
740 __raw_writew(__raw_readw(priv->usbphyaddr) | USB_PHY_INT_CLR,
741 priv->usbphyaddr);
742
743 return IRQ_HANDLED;
744}
745
746static int usbhs1_hardware_init(struct platform_device *pdev)
747{
748 struct usbhs_private *priv = usbhs_get_priv(pdev);
749 int ret;
750
66ee3bef
KM
751 /* clear interrupt status */
752 __raw_writew(USB_PHY_MODE | USB_PHY_INT_CLR, priv->usbphyaddr);
753
e2a53b7c 754 ret = request_irq(IRQ8, usbhs1_interrupt, IRQF_TRIGGER_HIGH,
66ee3bef
KM
755 dev_name(&pdev->dev), pdev);
756 if (ret) {
757 dev_err(&pdev->dev, "request_irq err\n");
758 return ret;
759 }
760
761 /* enable USB phy interrupt */
762 __raw_writew(USB_PHY_MODE | USB_PHY_INT_EN, priv->usbphyaddr);
763
764 return 0;
765}
766
767static void usbhs1_hardware_exit(struct platform_device *pdev)
768{
769 struct usbhs_private *priv = usbhs_get_priv(pdev);
770
771 /* clear interrupt status */
772 __raw_writew(USB_PHY_MODE | USB_PHY_INT_CLR, priv->usbphyaddr);
773
e2a53b7c 774 free_irq(IRQ8, pdev);
66ee3bef
KM
775}
776
05a7929f
KM
777static int usbhs1_get_id(struct platform_device *pdev)
778{
779 return USBHS_GADGET;
780}
781
66ee3bef
KM
782static u32 usbhs1_pipe_cfg[] = {
783 USB_ENDPOINT_XFER_CONTROL,
784 USB_ENDPOINT_XFER_ISOC,
785 USB_ENDPOINT_XFER_ISOC,
786 USB_ENDPOINT_XFER_BULK,
787 USB_ENDPOINT_XFER_BULK,
788 USB_ENDPOINT_XFER_BULK,
789 USB_ENDPOINT_XFER_INT,
790 USB_ENDPOINT_XFER_INT,
791 USB_ENDPOINT_XFER_INT,
792 USB_ENDPOINT_XFER_BULK,
793 USB_ENDPOINT_XFER_BULK,
794 USB_ENDPOINT_XFER_BULK,
795 USB_ENDPOINT_XFER_BULK,
796 USB_ENDPOINT_XFER_BULK,
797 USB_ENDPOINT_XFER_BULK,
798 USB_ENDPOINT_XFER_BULK,
799};
800
801static struct usbhs_private usbhs1_private = {
e2a53b7c
MD
802 .usbphyaddr = 0xe60581e2, /* USBPHY1INTAP */
803 .usbcrcaddr = 0xe6058130, /* USBCR4 */
66ee3bef
KM
804 .info = {
805 .platform_callback = {
806 .hardware_init = usbhs1_hardware_init,
807 .hardware_exit = usbhs1_hardware_exit,
05a7929f 808 .get_id = usbhs1_get_id,
e2a53b7c
MD
809 .phy_reset = usbhs_phy_reset,
810 .get_vbus = usbhs_get_vbus,
66ee3bef
KM
811 },
812 .driver_param = {
813 .buswait_bwait = 4,
f427eb64 814 .has_otg = 1,
66ee3bef
KM
815 .pipe_type = usbhs1_pipe_cfg,
816 .pipe_size = ARRAY_SIZE(usbhs1_pipe_cfg),
fe437561
KM
817 .d0_tx_id = SHDMA_SLAVE_USB1_TX,
818 .d1_rx_id = SHDMA_SLAVE_USB1_RX,
66ee3bef
KM
819 },
820 },
821};
822
823static struct resource usbhs1_resources[] = {
824 [0] = {
e2a53b7c
MD
825 .name = "USBHS1",
826 .start = 0xe68b0000,
827 .end = 0xe68b00e6 - 1,
66ee3bef
KM
828 .flags = IORESOURCE_MEM,
829 },
830 [1] = {
831 .start = evt2irq(0x1ce0) /* USB1_USB1I0 */,
832 .flags = IORESOURCE_IRQ,
833 },
834};
835
836static struct platform_device usbhs1_device = {
837 .name = "renesas_usbhs",
838 .id = 1,
839 .dev = {
840 .platform_data = &usbhs1_private.info,
841 },
842 .num_resources = ARRAY_SIZE(usbhs1_resources),
843 .resource = usbhs1_resources,
844};
845
d44deb35
KM
846/* LED */
847static struct gpio_led mackerel_leds[] = {
848 {
849 .name = "led0",
850 .gpio = GPIO_PORT0,
851 .default_state = LEDS_GPIO_DEFSTATE_ON,
852 },
853 {
854 .name = "led1",
855 .gpio = GPIO_PORT1,
856 .default_state = LEDS_GPIO_DEFSTATE_ON,
857 },
858 {
859 .name = "led2",
860 .gpio = GPIO_PORT2,
861 .default_state = LEDS_GPIO_DEFSTATE_ON,
862 },
863 {
864 .name = "led3",
865 .gpio = GPIO_PORT159,
866 .default_state = LEDS_GPIO_DEFSTATE_ON,
867 }
868};
869
870static struct gpio_led_platform_data mackerel_leds_pdata = {
871 .leds = mackerel_leds,
872 .num_leds = ARRAY_SIZE(mackerel_leds),
873};
874
875static struct platform_device leds_device = {
876 .name = "leds-gpio",
877 .id = 0,
878 .dev = {
879 .platform_data = &mackerel_leds_pdata,
880 },
881};
882
1a44d72a
KM
883/* FSI */
884#define IRQ_FSI evt2irq(0x1840)
98d27b8a
KM
885static int __fsi_set_round_rate(struct clk *clk, long rate, int enable)
886{
887 int ret;
888
889 if (rate <= 0)
890 return 0;
891
892 if (!enable) {
893 clk_disable(clk);
894 return 0;
895 }
896
897 ret = clk_set_rate(clk, clk_round_rate(clk, rate));
898 if (ret < 0)
899 return ret;
900
901 return clk_enable(clk);
902}
903
904static int fsi_set_rate(struct device *dev, int is_porta, int rate, int enable)
905{
906 struct clk *fsib_clk;
907 struct clk *fdiv_clk = &sh7372_fsidivb_clk;
908 long fsib_rate = 0;
909 long fdiv_rate = 0;
910 int ackmd_bpfmd;
911 int ret;
912
913 /* FSIA is slave mode. nothing to do here */
914 if (is_porta)
915 return 0;
916
917 /* clock start */
918 switch (rate) {
919 case 44100:
920 fsib_rate = rate * 256;
921 ackmd_bpfmd = SH_FSI_ACKMD_256 | SH_FSI_BPFMD_64;
922 break;
923 case 48000:
924 fsib_rate = 85428000; /* around 48kHz x 256 x 7 */
925 fdiv_rate = rate * 256;
926 ackmd_bpfmd = SH_FSI_ACKMD_256 | SH_FSI_BPFMD_64;
927 break;
928 default:
929 pr_err("unsupported rate in FSI2 port B\n");
930 return -EINVAL;
931 }
932
933 /* FSI B setting */
934 fsib_clk = clk_get(dev, "ickb");
935 if (IS_ERR(fsib_clk))
936 return -EIO;
937
938 /* fsib */
939 ret = __fsi_set_round_rate(fsib_clk, fsib_rate, enable);
940 if (ret < 0)
941 goto fsi_set_rate_end;
942
943 /* FSI DIV */
944 ret = __fsi_set_round_rate(fdiv_clk, fdiv_rate, enable);
945 if (ret < 0) {
946 /* disable FSI B */
947 if (enable)
948 __fsi_set_round_rate(fsib_clk, fsib_rate, 0);
949 goto fsi_set_rate_end;
950 }
951
952 ret = ackmd_bpfmd;
953
954fsi_set_rate_end:
955 clk_put(fsib_clk);
956 return ret;
957}
958
1a44d72a 959static struct sh_fsi_platform_info fsi_info = {
f17c13ca 960 .porta_flags = SH_FSI_BRS_INV,
98d27b8a
KM
961
962 .portb_flags = SH_FSI_BRS_INV |
963 SH_FSI_BRM_INV |
964 SH_FSI_LRS_INV |
f17c13ca 965 SH_FSI_FMT_SPDIF,
98d27b8a
KM
966
967 .set_rate = fsi_set_rate,
1a44d72a
KM
968};
969
970static struct resource fsi_resources[] = {
971 [0] = {
972 .name = "FSI",
973 .start = 0xFE3C0000,
974 .end = 0xFE3C0400 - 1,
975 .flags = IORESOURCE_MEM,
976 },
977 [1] = {
978 .start = IRQ_FSI,
979 .flags = IORESOURCE_IRQ,
980 },
981};
982
983static struct platform_device fsi_device = {
984 .name = "sh_fsi2",
985 .id = -1,
986 .num_resources = ARRAY_SIZE(fsi_resources),
987 .resource = fsi_resources,
988 .dev = {
989 .platform_data = &fsi_info,
990 },
991};
992
45f31216
KM
993static struct fsi_ak4642_info fsi2_ak4643_info = {
994 .name = "AK4643",
995 .card = "FSI2A-AK4643",
996 .cpu_dai = "fsia-dai",
997 .codec = "ak4642-codec.0-0013",
998 .platform = "sh_fsi2",
999 .id = FSI_PORT_A,
1000};
1001
1a44d72a 1002static struct platform_device fsi_ak4643_device = {
45f31216
KM
1003 .name = "fsi-ak4642-audio",
1004 .dev = {
1005 .platform_data = &fsi2_ak4643_info,
1006 },
1a44d72a 1007};
d44deb35 1008
6dff7da2
YG
1009/*
1010 * The card detect pin of the top SD/MMC slot (CN7) is active low and is
1011 * connected to GPIO A22 of SH7372 (GPIO_PORT41).
1012 */
1013static int slot_cn7_get_cd(struct platform_device *pdev)
1014{
ceb50f33 1015 return !gpio_get_value(GPIO_PORT41);
6dff7da2
YG
1016}
1017
1018/* SDHI0 */
4bff4a7e
GL
1019static irqreturn_t mackerel_sdhi0_gpio_cd(int irq, void *arg)
1020{
1021 struct device *dev = arg;
1022 struct sh_mobile_sdhi_info *info = dev->platform_data;
1023 struct tmio_mmc_data *pdata = info->pdata;
1024
1025 tmio_mmc_cd_wakeup(pdata);
1026
1027 return IRQ_HANDLED;
1028}
1029
6dff7da2
YG
1030static struct sh_mobile_sdhi_info sdhi0_info = {
1031 .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
1032 .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
da97da73 1033 .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ,
6dff7da2
YG
1034};
1035
1036static struct resource sdhi0_resources[] = {
1037 [0] = {
1038 .name = "SDHI0",
1039 .start = 0xe6850000,
31d31fe7 1040 .end = 0xe68500ff,
6dff7da2
YG
1041 .flags = IORESOURCE_MEM,
1042 },
1043 [1] = {
2007aea1
SH
1044 .start = evt2irq(0x0e00) /* SDHI0_SDHI0I0 */,
1045 .flags = IORESOURCE_IRQ,
1046 },
1047 [2] = {
1048 .start = evt2irq(0x0e20) /* SDHI0_SDHI0I1 */,
1049 .flags = IORESOURCE_IRQ,
1050 },
1051 [3] = {
1052 .start = evt2irq(0x0e40) /* SDHI0_SDHI0I2 */,
6dff7da2
YG
1053 .flags = IORESOURCE_IRQ,
1054 },
1055};
1056
1057static struct platform_device sdhi0_device = {
1058 .name = "sh_mobile_sdhi",
1059 .num_resources = ARRAY_SIZE(sdhi0_resources),
1060 .resource = sdhi0_resources,
1061 .id = 0,
1062 .dev = {
1063 .platform_data = &sdhi0_info,
1064 },
1065};
1066
5bcd7517 1067#if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
6dff7da2
YG
1068/* SDHI1 */
1069static struct sh_mobile_sdhi_info sdhi1_info = {
1070 .dma_slave_tx = SHDMA_SLAVE_SDHI1_TX,
1071 .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX,
1072 .tmio_ocr_mask = MMC_VDD_165_195,
1073 .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE,
da97da73 1074 .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
6dff7da2
YG
1075 MMC_CAP_NEEDS_POLL,
1076 .get_cd = slot_cn7_get_cd,
1077};
1078
1079static struct resource sdhi1_resources[] = {
1080 [0] = {
1081 .name = "SDHI1",
1082 .start = 0xe6860000,
31d31fe7 1083 .end = 0xe68600ff,
6dff7da2
YG
1084 .flags = IORESOURCE_MEM,
1085 },
1086 [1] = {
cb2ccc32 1087 .name = SH_MOBILE_SDHI_IRQ_CARD_DETECT,
2007aea1
SH
1088 .start = evt2irq(0x0e80), /* SDHI1_SDHI1I0 */
1089 .flags = IORESOURCE_IRQ,
1090 },
1091 [2] = {
cb2ccc32 1092 .name = SH_MOBILE_SDHI_IRQ_SDCARD,
2007aea1
SH
1093 .start = evt2irq(0x0ea0), /* SDHI1_SDHI1I1 */
1094 .flags = IORESOURCE_IRQ,
1095 },
1096 [3] = {
cb2ccc32 1097 .name = SH_MOBILE_SDHI_IRQ_SDIO,
2007aea1 1098 .start = evt2irq(0x0ec0), /* SDHI1_SDHI1I2 */
6dff7da2
YG
1099 .flags = IORESOURCE_IRQ,
1100 },
1101};
1102
1103static struct platform_device sdhi1_device = {
1104 .name = "sh_mobile_sdhi",
1105 .num_resources = ARRAY_SIZE(sdhi1_resources),
1106 .resource = sdhi1_resources,
1107 .id = 1,
1108 .dev = {
1109 .platform_data = &sdhi1_info,
1110 },
1111};
41491b9a 1112#endif
6dff7da2 1113
da5d1f4c
YG
1114/*
1115 * The card detect pin of the top SD/MMC slot (CN23) is active low and is
1116 * connected to GPIO SCIFB_SCK of SH7372 (GPIO_PORT162).
1117 */
1118static int slot_cn23_get_cd(struct platform_device *pdev)
1119{
1120 return !gpio_get_value(GPIO_PORT162);
1121}
1122
6dff7da2
YG
1123/* SDHI2 */
1124static struct sh_mobile_sdhi_info sdhi2_info = {
1125 .dma_slave_tx = SHDMA_SLAVE_SDHI2_TX,
1126 .dma_slave_rx = SHDMA_SLAVE_SDHI2_RX,
1127 .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE,
da97da73 1128 .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
6dff7da2 1129 MMC_CAP_NEEDS_POLL,
da5d1f4c 1130 .get_cd = slot_cn23_get_cd,
6dff7da2
YG
1131};
1132
1133static struct resource sdhi2_resources[] = {
1134 [0] = {
1135 .name = "SDHI2",
1136 .start = 0xe6870000,
31d31fe7 1137 .end = 0xe68700ff,
6dff7da2
YG
1138 .flags = IORESOURCE_MEM,
1139 },
1140 [1] = {
cb2ccc32 1141 .name = SH_MOBILE_SDHI_IRQ_CARD_DETECT,
2007aea1
SH
1142 .start = evt2irq(0x1200), /* SDHI2_SDHI2I0 */
1143 .flags = IORESOURCE_IRQ,
1144 },
1145 [2] = {
cb2ccc32 1146 .name = SH_MOBILE_SDHI_IRQ_SDCARD,
2007aea1
SH
1147 .start = evt2irq(0x1220), /* SDHI2_SDHI2I1 */
1148 .flags = IORESOURCE_IRQ,
1149 },
1150 [3] = {
cb2ccc32 1151 .name = SH_MOBILE_SDHI_IRQ_SDIO,
2007aea1 1152 .start = evt2irq(0x1240), /* SDHI2_SDHI2I2 */
6dff7da2
YG
1153 .flags = IORESOURCE_IRQ,
1154 },
1155};
1156
1157static struct platform_device sdhi2_device = {
1158 .name = "sh_mobile_sdhi",
1159 .num_resources = ARRAY_SIZE(sdhi2_resources),
1160 .resource = sdhi2_resources,
1161 .id = 2,
1162 .dev = {
1163 .platform_data = &sdhi2_info,
1164 },
1165};
1166
41491b9a
YG
1167/* SH_MMCIF */
1168static struct resource sh_mmcif_resources[] = {
1169 [0] = {
1170 .name = "MMCIF",
1171 .start = 0xE6BD0000,
1172 .end = 0xE6BD00FF,
1173 .flags = IORESOURCE_MEM,
1174 },
1175 [1] = {
1176 /* MMC ERR */
1177 .start = evt2irq(0x1ac0),
1178 .flags = IORESOURCE_IRQ,
1179 },
1180 [2] = {
1181 /* MMC NOR */
1182 .start = evt2irq(0x1ae0),
1183 .flags = IORESOURCE_IRQ,
1184 },
1185};
1186
fe78e68a
GL
1187static struct sh_mmcif_dma sh_mmcif_dma = {
1188 .chan_priv_rx = {
1189 .slave_id = SHDMA_SLAVE_MMCIF_RX,
1190 },
1191 .chan_priv_tx = {
1192 .slave_id = SHDMA_SLAVE_MMCIF_TX,
1193 },
1194};
1195
41491b9a
YG
1196static struct sh_mmcif_plat_data sh_mmcif_plat = {
1197 .sup_pclk = 0,
1198 .ocr = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
1199 .caps = MMC_CAP_4_BIT_DATA |
1200 MMC_CAP_8_BIT_DATA |
1201 MMC_CAP_NEEDS_POLL,
1202 .get_cd = slot_cn7_get_cd,
fe78e68a 1203 .dma = &sh_mmcif_dma,
41491b9a
YG
1204};
1205
1206static struct platform_device sh_mmcif_device = {
1207 .name = "sh_mmcif",
1208 .id = 0,
1209 .dev = {
1210 .dma_mask = NULL,
1211 .coherent_dma_mask = 0xffffffff,
1212 .platform_data = &sh_mmcif_plat,
1213 },
1214 .num_resources = ARRAY_SIZE(sh_mmcif_resources),
1215 .resource = sh_mmcif_resources,
1216};
1217
ae37c8de 1218
7dfff953
GL
1219static int mackerel_camera_add(struct soc_camera_device *icd);
1220static void mackerel_camera_del(struct soc_camera_device *icd);
ae37c8de
MD
1221
1222static int camera_set_capture(struct soc_camera_platform_info *info,
1223 int enable)
1224{
1225 return 0; /* camera sensor always enabled */
1226}
1227
1228static struct soc_camera_platform_info camera_info = {
1229 .format_name = "UYVY",
1230 .format_depth = 16,
1231 .format = {
1232 .code = V4L2_MBUS_FMT_UYVY8_2X8,
1233 .colorspace = V4L2_COLORSPACE_SMPTE170M,
1234 .field = V4L2_FIELD_NONE,
1235 .width = 640,
1236 .height = 480,
1237 },
d1e87ed7
GL
1238 .mbus_param = V4L2_MBUS_PCLK_SAMPLE_RISING | V4L2_MBUS_MASTER |
1239 V4L2_MBUS_VSYNC_ACTIVE_HIGH | V4L2_MBUS_HSYNC_ACTIVE_HIGH |
1240 V4L2_MBUS_DATA_ACTIVE_HIGH,
1241 .mbus_type = V4L2_MBUS_PARALLEL,
ae37c8de
MD
1242 .set_capture = camera_set_capture,
1243};
1244
1245static struct soc_camera_link camera_link = {
1246 .bus_id = 0,
1247 .add_device = mackerel_camera_add,
1248 .del_device = mackerel_camera_del,
1249 .module_name = "soc_camera_platform",
1250 .priv = &camera_info,
1251};
1252
86a73144
GL
1253static struct platform_device *camera_device;
1254
1255static void mackerel_camera_release(struct device *dev)
ae37c8de 1256{
86a73144 1257 soc_camera_platform_release(&camera_device);
ae37c8de
MD
1258}
1259
7dfff953 1260static int mackerel_camera_add(struct soc_camera_device *icd)
ae37c8de 1261{
7dfff953 1262 return soc_camera_platform_add(icd, &camera_device, &camera_link,
86a73144 1263 mackerel_camera_release, 0);
ae37c8de
MD
1264}
1265
7dfff953 1266static void mackerel_camera_del(struct soc_camera_device *icd)
ae37c8de 1267{
7dfff953 1268 soc_camera_platform_del(icd, camera_device, &camera_link);
ae37c8de
MD
1269}
1270
1271static struct sh_mobile_ceu_info sh_mobile_ceu_info = {
1272 .flags = SH_CEU_FLAG_USE_8BIT_BUS,
1273};
1274
1275static struct resource ceu_resources[] = {
1276 [0] = {
1277 .name = "CEU",
1278 .start = 0xfe910000,
1279 .end = 0xfe91009f,
1280 .flags = IORESOURCE_MEM,
1281 },
1282 [1] = {
1283 .start = intcs_evt2irq(0x880),
1284 .flags = IORESOURCE_IRQ,
1285 },
1286 [2] = {
1287 /* place holder for contiguous memory */
1288 },
1289};
1290
1291static struct platform_device ceu_device = {
1292 .name = "sh_mobile_ceu",
1293 .id = 0, /* "ceu0" clock */
1294 .num_resources = ARRAY_SIZE(ceu_resources),
1295 .resource = ceu_resources,
1296 .dev = {
05a5f01c
GL
1297 .platform_data = &sh_mobile_ceu_info,
1298 .coherent_dma_mask = 0xffffffff,
ae37c8de
MD
1299 },
1300};
1301
1302static struct platform_device mackerel_camera = {
1303 .name = "soc-camera-pdrv",
1304 .id = 0,
1305 .dev = {
1306 .platform_data = &camera_link,
1307 },
1308};
1309
920adc75
KM
1310static struct platform_device *mackerel_devices[] __initdata = {
1311 &nor_flash_device,
2264c151 1312 &smc911x_device,
11fee467 1313 &lcdc_device,
25338f2e 1314 &usb1_host_device,
66ee3bef 1315 &usbhs1_device,
5a568552 1316 &usbhs0_device,
d44deb35 1317 &leds_device,
1a44d72a
KM
1318 &fsi_device,
1319 &fsi_ak4643_device,
3f25c9cc 1320 &fsi_hdmi_device,
6dff7da2 1321 &sdhi0_device,
5bcd7517 1322#if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
6dff7da2 1323 &sdhi1_device,
41491b9a 1324#endif
6dff7da2 1325 &sdhi2_device,
41491b9a 1326 &sh_mmcif_device,
ae37c8de
MD
1327 &ceu_device,
1328 &mackerel_camera,
12c4309b
KM
1329 &hdmi_lcdc_device,
1330 &hdmi_device,
1c7fcbed 1331 &meram_device,
1a44d72a
KM
1332};
1333
cd8ab004
TS
1334/* Keypad Initialization */
1335#define KEYPAD_BUTTON(ev_type, ev_code, act_low) \
1336{ \
1337 .type = ev_type, \
1338 .code = ev_code, \
1339 .active_low = act_low, \
1340}
1341
1342#define KEYPAD_BUTTON_LOW(event_code) KEYPAD_BUTTON(EV_KEY, event_code, 1)
1343
1344static struct tca6416_button mackerel_gpio_keys[] = {
1345 KEYPAD_BUTTON_LOW(KEY_HOME),
1346 KEYPAD_BUTTON_LOW(KEY_MENU),
1347 KEYPAD_BUTTON_LOW(KEY_BACK),
1348 KEYPAD_BUTTON_LOW(KEY_POWER),
1349};
1350
1351static struct tca6416_keys_platform_data mackerel_tca6416_keys_info = {
1352 .buttons = mackerel_gpio_keys,
1353 .nbuttons = ARRAY_SIZE(mackerel_gpio_keys),
1354 .rep = 1,
1355 .use_polling = 0,
1356 .pinmask = 0x000F,
1357};
1358
1a44d72a 1359/* I2C */
6ae1e19d 1360#define IRQ7 evt2irq(0x02e0)
cd8ab004
TS
1361#define IRQ9 evt2irq(0x0320)
1362
1a44d72a
KM
1363static struct i2c_board_info i2c0_devices[] = {
1364 {
1365 I2C_BOARD_INFO("ak4643", 0x13),
1366 },
cd8ab004
TS
1367 /* Keypad */
1368 {
1369 I2C_BOARD_INFO("tca6408-keys", 0x20),
1370 .platform_data = &mackerel_tca6416_keys_info,
1371 .irq = IRQ9,
1372 },
6ae1e19d
TS
1373 /* Touchscreen */
1374 {
1375 I2C_BOARD_INFO("st1232-ts", 0x55),
1376 .irq = IRQ7,
1377 },
920adc75
KM
1378};
1379
80f1dc7c
TS
1380#define IRQ21 evt2irq(0x32a0)
1381
1382static struct i2c_board_info i2c1_devices[] = {
1383 /* Accelerometer */
1384 {
1385 I2C_BOARD_INFO("adxl34x", 0x53),
1386 .irq = IRQ21,
1387 },
1388};
1389
920adc75
KM
1390static struct map_desc mackerel_io_desc[] __initdata = {
1391 /* create a 1:1 entity map for 0xe6xxxxxx
1392 * used by CPGA, INTC and PFC.
1393 */
1394 {
1395 .virtual = 0xe6000000,
1396 .pfn = __phys_to_pfn(0xe6000000),
1397 .length = 256 << 20,
1398 .type = MT_DEVICE_NONSHARED
1399 },
1400};
1401
1402static void __init mackerel_map_io(void)
1403{
1404 iotable_init(mackerel_io_desc, ARRAY_SIZE(mackerel_io_desc));
1405
1406 /* setup early devices and console here as well */
1407 sh7372_add_early_devices();
1408 shmobile_setup_console();
1409}
1410
1a44d72a
KM
1411#define GPIO_PORT9CR 0xE6051009
1412#define GPIO_PORT10CR 0xE605100A
e2a53b7c 1413#define GPIO_PORT167CR 0xE60520A7
66ee3bef 1414#define GPIO_PORT168CR 0xE60520A8
12c4309b 1415#define SRCR4 0xe61580bc
98d27b8a 1416#define USCCR1 0xE6058144
920adc75
KM
1417static void __init mackerel_init(void)
1418{
12c4309b 1419 u32 srcr4;
98d27b8a 1420 struct clk *clk;
4bff4a7e 1421 int ret;
12c4309b 1422
920adc75
KM
1423 sh7372_pinmux_init();
1424
1425 /* enable SCIFA0 */
1426 gpio_request(GPIO_FN_SCIFA0_TXD, NULL);
1427 gpio_request(GPIO_FN_SCIFA0_RXD, NULL);
1428
2264c151
KM
1429 /* enable SMSC911X */
1430 gpio_request(GPIO_FN_CS5A, NULL);
1431 gpio_request(GPIO_FN_IRQ6_39, NULL);
1432
11fee467 1433 /* LCDC */
eb87e677
KM
1434 gpio_request(GPIO_FN_LCDD23, NULL);
1435 gpio_request(GPIO_FN_LCDD22, NULL);
1436 gpio_request(GPIO_FN_LCDD21, NULL);
1437 gpio_request(GPIO_FN_LCDD20, NULL);
1438 gpio_request(GPIO_FN_LCDD19, NULL);
1439 gpio_request(GPIO_FN_LCDD18, NULL);
11fee467
KM
1440 gpio_request(GPIO_FN_LCDD17, NULL);
1441 gpio_request(GPIO_FN_LCDD16, NULL);
1442 gpio_request(GPIO_FN_LCDD15, NULL);
1443 gpio_request(GPIO_FN_LCDD14, NULL);
1444 gpio_request(GPIO_FN_LCDD13, NULL);
1445 gpio_request(GPIO_FN_LCDD12, NULL);
1446 gpio_request(GPIO_FN_LCDD11, NULL);
1447 gpio_request(GPIO_FN_LCDD10, NULL);
1448 gpio_request(GPIO_FN_LCDD9, NULL);
1449 gpio_request(GPIO_FN_LCDD8, NULL);
1450 gpio_request(GPIO_FN_LCDD7, NULL);
1451 gpio_request(GPIO_FN_LCDD6, NULL);
1452 gpio_request(GPIO_FN_LCDD5, NULL);
1453 gpio_request(GPIO_FN_LCDD4, NULL);
1454 gpio_request(GPIO_FN_LCDD3, NULL);
1455 gpio_request(GPIO_FN_LCDD2, NULL);
1456 gpio_request(GPIO_FN_LCDD1, NULL);
1457 gpio_request(GPIO_FN_LCDD0, NULL);
1458 gpio_request(GPIO_FN_LCDDISP, NULL);
1459 gpio_request(GPIO_FN_LCDDCK, NULL);
1460
1461 gpio_request(GPIO_PORT31, NULL); /* backlight */
1fbdfcde 1462 gpio_direction_output(GPIO_PORT31, 0); /* off by default */
11fee467
KM
1463
1464 gpio_request(GPIO_PORT151, NULL); /* LCDDON */
1465 gpio_direction_output(GPIO_PORT151, 1);
1466
e2a53b7c
MD
1467 /* USBHS0 */
1468 gpio_request(GPIO_FN_VBUS0_0, NULL);
1469 gpio_pull_down(GPIO_PORT168CR); /* VBUS0_0 pull down */
1470
1471 /* USBHS1 */
1472 gpio_request(GPIO_FN_VBUS0_1, NULL);
1473 gpio_pull_down(GPIO_PORT167CR); /* VBUS0_1 pull down */
1474 gpio_request(GPIO_FN_IDIN_1_113, NULL);
1475
1476 /* USB phy tweak to make the r8a66597_hcd host driver work */
1477 __raw_writew(0x8a0a, 0xe6058130); /* USBCR4 */
25338f2e 1478
1a44d72a
KM
1479 /* enable FSI2 port A (ak4643) */
1480 gpio_request(GPIO_FN_FSIAIBT, NULL);
1481 gpio_request(GPIO_FN_FSIAILR, NULL);
1482 gpio_request(GPIO_FN_FSIAISLD, NULL);
1483 gpio_request(GPIO_FN_FSIAOSLD, NULL);
1484 gpio_request(GPIO_PORT161, NULL);
1485 gpio_direction_output(GPIO_PORT161, 0); /* slave */
1486
1487 gpio_request(GPIO_PORT9, NULL);
1488 gpio_request(GPIO_PORT10, NULL);
1489 gpio_no_direction(GPIO_PORT9CR); /* FSIAOBT needs no direction */
1490 gpio_no_direction(GPIO_PORT10CR); /* FSIAOLR needs no direction */
1491
1492 intc_set_priority(IRQ_FSI, 3); /* irq priority FSI(3) > SMSC911X(2) */
1493
98d27b8a
KM
1494 /* setup FSI2 port B (HDMI) */
1495 gpio_request(GPIO_FN_FSIBCK, NULL);
1496 __raw_writew(__raw_readw(USCCR1) & ~(1 << 6), USCCR1); /* use SPDIF */
1497
1498 /* set SPU2 clock to 119.6 MHz */
1499 clk = clk_get(NULL, "spu_clk");
1500 if (!IS_ERR(clk)) {
1501 clk_set_rate(clk, clk_round_rate(clk, 119600000));
1502 clk_put(clk);
1503 }
1504
cd8ab004
TS
1505 /* enable Keypad */
1506 gpio_request(GPIO_FN_IRQ9_42, NULL);
6845664a 1507 irq_set_irq_type(IRQ9, IRQ_TYPE_LEVEL_HIGH);
cd8ab004 1508
6ae1e19d
TS
1509 /* enable Touchscreen */
1510 gpio_request(GPIO_FN_IRQ7_40, NULL);
6845664a 1511 irq_set_irq_type(IRQ7, IRQ_TYPE_LEVEL_LOW);
6ae1e19d 1512
80f1dc7c
TS
1513 /* enable Accelerometer */
1514 gpio_request(GPIO_FN_IRQ21, NULL);
6845664a 1515 irq_set_irq_type(IRQ21, IRQ_TYPE_LEVEL_HIGH);
1a44d72a 1516
6dff7da2
YG
1517 /* enable SDHI0 */
1518 gpio_request(GPIO_FN_SDHICD0, NULL);
1519 gpio_request(GPIO_FN_SDHIWP0, NULL);
1520 gpio_request(GPIO_FN_SDHICMD0, NULL);
1521 gpio_request(GPIO_FN_SDHICLK0, NULL);
1522 gpio_request(GPIO_FN_SDHID0_3, NULL);
1523 gpio_request(GPIO_FN_SDHID0_2, NULL);
1524 gpio_request(GPIO_FN_SDHID0_1, NULL);
1525 gpio_request(GPIO_FN_SDHID0_0, NULL);
1526
4bff4a7e
GL
1527 ret = request_irq(evt2irq(0x3340), mackerel_sdhi0_gpio_cd,
1528 IRQF_TRIGGER_FALLING, "sdhi0 cd", &sdhi0_device.dev);
1529 if (!ret)
1530 sdhi0_info.tmio_flags |= TMIO_MMC_HAS_COLD_CD;
1531 else
1532 pr_err("Cannot get IRQ #%d: %d\n", evt2irq(0x3340), ret);
1533
5bcd7517 1534#if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
6dff7da2
YG
1535 /* enable SDHI1 */
1536 gpio_request(GPIO_FN_SDHICMD1, NULL);
1537 gpio_request(GPIO_FN_SDHICLK1, NULL);
1538 gpio_request(GPIO_FN_SDHID1_3, NULL);
1539 gpio_request(GPIO_FN_SDHID1_2, NULL);
1540 gpio_request(GPIO_FN_SDHID1_1, NULL);
1541 gpio_request(GPIO_FN_SDHID1_0, NULL);
41491b9a 1542#endif
6dff7da2
YG
1543 /* card detect pin for MMC slot (CN7) */
1544 gpio_request(GPIO_PORT41, NULL);
1545 gpio_direction_input(GPIO_PORT41);
1546
1547 /* enable SDHI2 */
1548 gpio_request(GPIO_FN_SDHICMD2, NULL);
1549 gpio_request(GPIO_FN_SDHICLK2, NULL);
1550 gpio_request(GPIO_FN_SDHID2_3, NULL);
1551 gpio_request(GPIO_FN_SDHID2_2, NULL);
1552 gpio_request(GPIO_FN_SDHID2_1, NULL);
1553 gpio_request(GPIO_FN_SDHID2_0, NULL);
1554
da5d1f4c
YG
1555 /* card detect pin for microSD slot (CN23) */
1556 gpio_request(GPIO_PORT162, NULL);
1557 gpio_direction_input(GPIO_PORT162);
1558
41491b9a
YG
1559 /* MMCIF */
1560 gpio_request(GPIO_FN_MMCD0_0, NULL);
1561 gpio_request(GPIO_FN_MMCD0_1, NULL);
1562 gpio_request(GPIO_FN_MMCD0_2, NULL);
1563 gpio_request(GPIO_FN_MMCD0_3, NULL);
1564 gpio_request(GPIO_FN_MMCD0_4, NULL);
1565 gpio_request(GPIO_FN_MMCD0_5, NULL);
1566 gpio_request(GPIO_FN_MMCD0_6, NULL);
1567 gpio_request(GPIO_FN_MMCD0_7, NULL);
1568 gpio_request(GPIO_FN_MMCCMD0, NULL);
1569 gpio_request(GPIO_FN_MMCCLK0, NULL);
1570
56e78daf
YG
1571 /* enable GPS module (GT-720F) */
1572 gpio_request(GPIO_FN_SCIFA2_TXD1, NULL);
1573 gpio_request(GPIO_FN_SCIFA2_RXD1, NULL);
1574
ae37c8de
MD
1575 /* CEU */
1576 gpio_request(GPIO_FN_VIO_CLK, NULL);
1577 gpio_request(GPIO_FN_VIO_VD, NULL);
1578 gpio_request(GPIO_FN_VIO_HD, NULL);
1579 gpio_request(GPIO_FN_VIO_FIELD, NULL);
1580 gpio_request(GPIO_FN_VIO_CKO, NULL);
1581 gpio_request(GPIO_FN_VIO_D7, NULL);
1582 gpio_request(GPIO_FN_VIO_D6, NULL);
1583 gpio_request(GPIO_FN_VIO_D5, NULL);
1584 gpio_request(GPIO_FN_VIO_D4, NULL);
1585 gpio_request(GPIO_FN_VIO_D3, NULL);
1586 gpio_request(GPIO_FN_VIO_D2, NULL);
1587 gpio_request(GPIO_FN_VIO_D1, NULL);
1588 gpio_request(GPIO_FN_VIO_D0, NULL);
1589
12c4309b
KM
1590 /* HDMI */
1591 gpio_request(GPIO_FN_HDMI_HPD, NULL);
1592 gpio_request(GPIO_FN_HDMI_CEC, NULL);
1593
1594 /* Reset HDMI, must be held at least one EXTALR (32768Hz) period */
1595 srcr4 = __raw_readl(SRCR4);
1596 __raw_writel(srcr4 | (1 << 13), SRCR4);
1597 udelay(50);
1598 __raw_writel(srcr4 & ~(1 << 13), SRCR4);
1599
1a44d72a
KM
1600 i2c_register_board_info(0, i2c0_devices,
1601 ARRAY_SIZE(i2c0_devices));
80f1dc7c
TS
1602 i2c_register_board_info(1, i2c1_devices,
1603 ARRAY_SIZE(i2c1_devices));
11fee467 1604
920adc75
KM
1605 sh7372_add_standard_devices();
1606
1607 platform_add_devices(mackerel_devices, ARRAY_SIZE(mackerel_devices));
2ce51f8b 1608
e3e01091
RW
1609 sh7372_add_device_to_domain(&sh7372_a4lc, &lcdc_device);
1610 sh7372_add_device_to_domain(&sh7372_a4lc, &hdmi_lcdc_device);
91142bfe 1611 sh7372_add_device_to_domain(&sh7372_a4lc, &meram_device);
c1ba5bb5 1612 sh7372_add_device_to_domain(&sh7372_a4mp, &fsi_device);
d93f5cde
MD
1613 sh7372_add_device_to_domain(&sh7372_a3sp, &usbhs0_device);
1614 sh7372_add_device_to_domain(&sh7372_a3sp, &usbhs1_device);
1615 sh7372_add_device_to_domain(&sh7372_a3sp, &sh_mmcif_device);
1616 sh7372_add_device_to_domain(&sh7372_a3sp, &sdhi0_device);
1617#if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
1618 sh7372_add_device_to_domain(&sh7372_a3sp, &sdhi1_device);
1619#endif
1620 sh7372_add_device_to_domain(&sh7372_a3sp, &sdhi2_device);
382414b9 1621 sh7372_add_device_to_domain(&sh7372_a4r, &ceu_device);
e3e01091 1622
2ce51f8b 1623 hdmi_init_pm_clock();
97991657 1624 sh7372_pm_init();
a41b6466 1625 pm_clk_add(&fsi_device.dev, "spu2");
5c3f96b2 1626 pm_clk_add(&hdmi_lcdc_device.dev, "hdmi");
920adc75
KM
1627}
1628
1629static void __init mackerel_timer_init(void)
1630{
1631 sh7372_clock_init();
1632 shmobile_timer.init();
12c4309b
KM
1633
1634 /* External clock source */
1635 clk_set_rate(&sh7372_dv_clki_clk, 27000000);
920adc75
KM
1636}
1637
1638static struct sys_timer mackerel_timer = {
1639 .init = mackerel_timer_init,
1640};
1641
1642MACHINE_START(MACKEREL, "mackerel")
1643 .map_io = mackerel_map_io,
1644 .init_irq = sh7372_init_irq,
863b1719 1645 .handle_irq = shmobile_handle_irq_intc,
920adc75
KM
1646 .init_machine = mackerel_init,
1647 .timer = &mackerel_timer,
1648MACHINE_END