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920adc75
KM
1/*
2 * mackerel board support
3 *
4 * Copyright (C) 2010 Renesas Solutions Corp.
5 * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
6 *
7 * based on ap4evb
8 * Copyright (C) 2010 Magnus Damm
9 * Copyright (C) 2008 Yoshihiro Shimoda
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; version 2 of the License.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
23 */
12c4309b 24#include <linux/delay.h>
920adc75
KM
25#include <linux/kernel.h>
26#include <linux/init.h>
27#include <linux/interrupt.h>
28#include <linux/irq.h>
29#include <linux/platform_device.h>
30#include <linux/gpio.h>
31#include <linux/input.h>
32#include <linux/io.h>
1a44d72a 33#include <linux/i2c.h>
d44deb35 34#include <linux/leds.h>
6dff7da2
YG
35#include <linux/mfd/tmio.h>
36#include <linux/mmc/host.h>
41491b9a 37#include <linux/mmc/sh_mmcif.h>
17e75d82 38#include <linux/mmc/sh_mobile_sdhi.h>
920adc75
KM
39#include <linux/mtd/mtd.h>
40#include <linux/mtd/partitions.h>
41#include <linux/mtd/physmap.h>
2aab52e8 42#include <linux/mtd/sh_flctl.h>
b5e8d269 43#include <linux/pm_clock.h>
70ccb28d
GL
44#include <linux/regulator/fixed.h>
45#include <linux/regulator/machine.h>
2264c151 46#include <linux/smsc911x.h>
1a44d72a 47#include <linux/sh_intc.h>
cd8ab004 48#include <linux/tca6416_keypad.h>
66ee3bef 49#include <linux/usb/renesas_usbhs.h>
9b742024 50#include <linux/dma-mapping.h>
920adc75 51
12c4309b 52#include <video/sh_mobile_hdmi.h>
11fee467 53#include <video/sh_mobile_lcdc.h>
ae37c8de
MD
54#include <media/sh_mobile_ceu.h>
55#include <media/soc_camera.h>
56#include <media/soc_camera_platform.h>
1a44d72a 57#include <sound/sh_fsi.h>
af8a2fe1 58#include <sound/simple_card.h>
1a44d72a 59
920adc75 60#include <mach/common.h>
250a2723 61#include <mach/irqs.h>
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KM
62#include <mach/sh7372.h>
63
64#include <asm/mach/arch.h>
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KM
65#include <asm/mach-types.h>
66
67/*
68 * Address Interface BusWidth note
69 * ------------------------------------------------------------------
70 * 0x0000_0000 NOR Flash ROM (MCP) 16bit SW7 : bit1 = ON
71 * 0x0800_0000 user area -
72 * 0x1000_0000 NOR Flash ROM (MCP) 16bit SW7 : bit1 = OFF
73 * 0x1400_0000 Ether (LAN9220) 16bit
74 * 0x1600_0000 user area - cannot use with NAND
75 * 0x1800_0000 user area -
76 * 0x1A00_0000 -
77 * 0x4000_0000 LPDDR2-SDRAM (POP) 32bit
78 */
79
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KM
80/*
81 * CPU mode
82 *
83 * SW4 | Boot Area| Master | Remarks
84 * 1 | 2 | 3 | 4 | 5 | 6 | 8 | | Processor|
85 * ----+-----+-----+-----+-----+-----+-----+----------+----------+--------------
86 * ON | ON | OFF | ON | ON | OFF | OFF | External | System | External ROM
87 * ON | ON | ON | ON | ON | OFF | OFF | External | System | ROM Debug
88 * ON | ON | X | ON | OFF | OFF | OFF | Built-in | System | ROM Debug
89 * X | OFF | X | X | X | X | OFF | Built-in | System | MaskROM
90 * OFF | X | X | X | X | X | OFF | Built-in | System | MaskROM
91 * X | X | X | OFF | X | X | OFF | Built-in | System | MaskROM
92 * OFF | ON | OFF | X | X | OFF | ON | External | System | Standalone
93 * ON | OFF | OFF | X | X | OFF | ON | External | Realtime | Standalone
94*/
95
96/*
97 * NOR Flash ROM
98 *
99 * SW1 | SW2 | SW7 | NOR Flash ROM
100 * bit1 | bit1 bit2 | bit1 | Memory allocation
101 * ------+------------+------+------------------
102 * OFF | ON OFF | ON | Area 0
103 * OFF | ON OFF | OFF | Area 4
104 */
105
106/*
107 * SMSC 9220
108 *
109 * SW1 SMSC 9220
110 * -----------------------
111 * ON access disable
112 * OFF access enable
113 */
114
115/*
116 * NAND Flash ROM
117 *
118 * SW1 | SW2 | SW7 | NAND Flash ROM
119 * bit1 | bit1 bit2 | bit2 | Memory allocation
120 * ------+------------+------+------------------
121 * OFF | ON OFF | ON | FCE 0
122 * OFF | ON OFF | OFF | FCE 1
123 */
124
125/*
126 * External interrupt pin settings
127 *
128 * IRQX | pin setting | device | level
129 * ------+--------------------+--------------------+-------
130 * IRQ0 | ICR1A.IRQ0SA=0010 | SDHI2 card detect | Low
131 * IRQ6 | ICR1A.IRQ6SA=0011 | Ether(LAN9220) | High
e2a53b7c 132 * IRQ7 | ICR1A.IRQ7SA=0010 | LCD Touch Panel | Low
4b82b689
KM
133 * IRQ8 | ICR2A.IRQ8SA=0010 | MMC/SD card detect | Low
134 * IRQ9 | ICR2A.IRQ9SA=0010 | KEY(TCA6408) | Low
135 * IRQ21 | ICR4A.IRQ21SA=0011 | Sensor(ADXL345) | High
136 * IRQ22 | ICR4A.IRQ22SA=0011 | Sensor(AK8975) | High
25338f2e 137 */
4b82b689 138
25338f2e
KM
139/*
140 * USB
141 *
142 * USB0 : CN22 : Function
143 * USB1 : CN31 : Function/Host *1
144 *
145 * J30 (for CN31) *1
146 * ----------+---------------+-------------
147 * 1-2 short | VBUS 5V | Host
148 * open | external VBUS | Function
149 *
66ee3bef
KM
150 * CAUTION
151 *
152 * renesas_usbhs driver can use external interrupt mode
153 * (which come from USB-PHY) or autonomy mode (it use own interrupt)
154 * for detecting connection/disconnection when Function.
155 * USB will be power OFF while it has been disconnecting
156 * if external interrupt mode, and it is always power ON if autonomy mode,
157 *
158 * mackerel can not use external interrupt (IRQ7-PORT167) mode on "USB0",
159 * because Touchscreen is using IRQ7-PORT40.
160 * It is impossible to use IRQ7 demux on this board.
25338f2e 161 */
4b82b689 162
6dff7da2
YG
163/*
164 * SDHI0 (CN12)
165 *
166 * SW56 : OFF
167 *
168 */
169
170/* MMC /SDHI1 (CN7)
171 *
172 * I/O voltage : 1.8v
173 *
174 * Power voltage : 1.8v or 3.3v
41491b9a 175 * J22 : select power voltage *1
6dff7da2
YG
176 * 1-2 pin : 1.8v
177 * 2-3 pin : 3.3v
178 *
41491b9a
YG
179 * *1
180 * Please change J22 depends the card to be used.
181 * MMC's OCR field set to support either voltage for the card inserted.
182 *
6dff7da2
YG
183 * SW1 | SW33
184 * | bit1 | bit2 | bit3 | bit4
185 * -------------+------+------+------+-------
2150dace
SH
186 * MMC0 OFF | OFF | X | ON | X (Use MMCIF)
187 * SDHI1 OFF | ON | X | OFF | X (Use MFD_SH_MOBILE_SDHI)
6dff7da2
YG
188 *
189 */
190
191/*
192 * SDHI2 (CN23)
193 *
194 * microSD card sloct
195 *
196 */
197
6d9b7dd0
KM
198/*
199 * FSI - AK4642
200 *
201 * it needs amixer settings for playing
202 *
203 * amixer set "Headphone" on
204 * amixer set "HPOUTL Mixer DACH" on
205 * amixer set "HPOUTR Mixer DACH" on
206 */
207
70ccb28d
GL
208/* Fixed 3.3V and 1.8V regulators to be used by multiple devices */
209static struct regulator_consumer_supply fixed1v8_power_consumers[] =
1a44d72a 210{
70ccb28d
GL
211 /*
212 * J22 on mackerel switches mmcif.0 and sdhi.1 between 1.8V and 3.3V
213 * Since we cannot support both voltages, we support the default 1.8V
214 */
215 REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.1"),
216 REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.1"),
217 REGULATOR_SUPPLY("vmmc", "sh_mmcif.0"),
218 REGULATOR_SUPPLY("vqmmc", "sh_mmcif.0"),
219};
1a44d72a 220
70ccb28d 221static struct regulator_consumer_supply fixed3v3_power_consumers[] =
66ee3bef 222{
70ccb28d
GL
223 REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"),
224 REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.0"),
225 REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.2"),
226 REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.2"),
227};
66ee3bef 228
70ccb28d
GL
229/* Dummy supplies, where voltage doesn't matter */
230static struct regulator_consumer_supply dummy_supplies[] = {
231 REGULATOR_SUPPLY("vddvario", "smsc911x"),
232 REGULATOR_SUPPLY("vdd33a", "smsc911x"),
233};
66ee3bef 234
920adc75
KM
235/* MTD */
236static struct mtd_partition nor_flash_partitions[] = {
237 {
238 .name = "loader",
239 .offset = 0x00000000,
240 .size = 512 * 1024,
241 .mask_flags = MTD_WRITEABLE,
242 },
243 {
244 .name = "bootenv",
245 .offset = MTDPART_OFS_APPEND,
246 .size = 512 * 1024,
247 .mask_flags = MTD_WRITEABLE,
248 },
249 {
250 .name = "kernel_ro",
251 .offset = MTDPART_OFS_APPEND,
252 .size = 8 * 1024 * 1024,
253 .mask_flags = MTD_WRITEABLE,
254 },
255 {
256 .name = "kernel",
257 .offset = MTDPART_OFS_APPEND,
258 .size = 8 * 1024 * 1024,
259 },
260 {
261 .name = "data",
262 .offset = MTDPART_OFS_APPEND,
263 .size = MTDPART_SIZ_FULL,
264 },
265};
266
267static struct physmap_flash_data nor_flash_data = {
268 .width = 2,
269 .parts = nor_flash_partitions,
270 .nr_parts = ARRAY_SIZE(nor_flash_partitions),
271};
272
273static struct resource nor_flash_resources[] = {
274 [0] = {
487881c0
MD
275 .start = 0x20000000, /* CS0 shadow instead of regular CS0 */
276 .end = 0x28000000 - 1, /* needed by USB MASK ROM boot */
920adc75
KM
277 .flags = IORESOURCE_MEM,
278 }
279};
280
281static struct platform_device nor_flash_device = {
282 .name = "physmap-flash",
283 .dev = {
284 .platform_data = &nor_flash_data,
285 },
286 .num_resources = ARRAY_SIZE(nor_flash_resources),
287 .resource = nor_flash_resources,
288};
289
2264c151
KM
290/* SMSC */
291static struct resource smc911x_resources[] = {
292 {
293 .start = 0x14000000,
294 .end = 0x16000000 - 1,
295 .flags = IORESOURCE_MEM,
296 }, {
297 .start = evt2irq(0x02c0) /* IRQ6A */,
298 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
299 },
300};
301
302static struct smsc911x_platform_config smsc911x_info = {
303 .flags = SMSC911X_USE_16BIT | SMSC911X_SAVE_MAC_ADDRESS,
304 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
305 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
306};
307
308static struct platform_device smc911x_device = {
309 .name = "smsc911x",
310 .id = -1,
311 .num_resources = ARRAY_SIZE(smc911x_resources),
312 .resource = smc911x_resources,
313 .dev = {
314 .platform_data = &smsc911x_info,
315 },
316};
317
1c7fcbed
DHG
318/* MERAM */
319static struct sh_mobile_meram_info mackerel_meram_info = {
320 .addr_mode = SH_MOBILE_MERAM_MODE1,
321};
322
323static struct resource meram_resources[] = {
324 [0] = {
e71504d5 325 .name = "regs",
1c7fcbed 326 .start = 0xe8000000,
e71504d5
LP
327 .end = 0xe807ffff,
328 .flags = IORESOURCE_MEM,
329 },
330 [1] = {
331 .name = "meram",
332 .start = 0xe8080000,
1c7fcbed
DHG
333 .end = 0xe81fffff,
334 .flags = IORESOURCE_MEM,
335 },
336};
337
338static struct platform_device meram_device = {
339 .name = "sh_mobile_meram",
340 .id = 0,
341 .num_resources = ARRAY_SIZE(meram_resources),
342 .resource = meram_resources,
343 .dev = {
344 .platform_data = &mackerel_meram_info,
345 },
346};
347
11fee467
KM
348/* LCDC */
349static struct fb_videomode mackerel_lcdc_modes[] = {
350 {
351 .name = "WVGA Panel",
352 .xres = 800,
353 .yres = 480,
354 .left_margin = 220,
355 .right_margin = 110,
356 .hsync_len = 70,
357 .upper_margin = 20,
358 .lower_margin = 5,
359 .vsync_len = 5,
360 .sync = 0,
361 },
362};
363
018882aa 364static int mackerel_set_brightness(int brightness)
1fbdfcde
MD
365{
366 gpio_set_value(GPIO_PORT31, brightness);
367
368 return 0;
369}
370
018882aa 371static int mackerel_get_brightness(void)
1fbdfcde
MD
372{
373 return gpio_get_value(GPIO_PORT31);
374}
375
c241a0e0 376static const struct sh_mobile_meram_cfg lcd_meram_cfg = {
1c7fcbed 377 .icb[0] = {
1c7fcbed
DHG
378 .meram_size = 0x40,
379 },
380 .icb[1] = {
1c7fcbed
DHG
381 .meram_size = 0x40,
382 },
383};
384
11fee467 385static struct sh_mobile_lcdc_info lcdc_info = {
1c7fcbed 386 .meram_dev = &mackerel_meram_info,
11fee467
KM
387 .clock_source = LCDC_CLK_BUS,
388 .ch[0] = {
389 .chan = LCDC_CHAN_MAINLCD,
edd153a3 390 .fourcc = V4L2_PIX_FMT_RGB565,
93ff2598
LP
391 .lcd_modes = mackerel_lcdc_modes,
392 .num_modes = ARRAY_SIZE(mackerel_lcdc_modes),
11fee467 393 .interface_type = RGB24,
2c34e939 394 .clock_divider = 3,
11fee467 395 .flags = 0,
afaad83b
LP
396 .panel_cfg = {
397 .width = 152,
398 .height = 91,
1fbdfcde
MD
399 },
400 .bl_info = {
401 .name = "sh_mobile_lcdc_bl",
402 .max_brightness = 1,
43059b0f
LP
403 .set_brightness = mackerel_set_brightness,
404 .get_brightness = mackerel_get_brightness,
1fbdfcde 405 },
1c7fcbed 406 .meram_cfg = &lcd_meram_cfg,
11fee467
KM
407 }
408};
409
410static struct resource lcdc_resources[] = {
411 [0] = {
412 .name = "LCDC",
413 .start = 0xfe940000,
414 .end = 0xfe943fff,
415 .flags = IORESOURCE_MEM,
416 },
417 [1] = {
418 .start = intcs_evt2irq(0x580),
419 .flags = IORESOURCE_IRQ,
420 },
421};
422
423static struct platform_device lcdc_device = {
424 .name = "sh_mobile_lcdc_fb",
425 .num_resources = ARRAY_SIZE(lcdc_resources),
426 .resource = lcdc_resources,
427 .dev = {
428 .platform_data = &lcdc_info,
429 .coherent_dma_mask = ~0,
430 },
431};
432
a1022adb 433/* HDMI */
a1022adb 434static struct sh_mobile_hdmi_info hdmi_info = {
a1022adb
LP
435 .flags = HDMI_SND_SRC_SPDIF,
436};
437
438static struct resource hdmi_resources[] = {
439 [0] = {
440 .name = "HDMI",
441 .start = 0xe6be0000,
442 .end = 0xe6be00ff,
443 .flags = IORESOURCE_MEM,
444 },
445 [1] = {
446 /* There's also an HDMI interrupt on INTCS @ 0x18e0 */
447 .start = evt2irq(0x17e0),
448 .flags = IORESOURCE_IRQ,
449 },
450};
451
452static struct platform_device hdmi_device = {
453 .name = "sh-mobile-hdmi",
454 .num_resources = ARRAY_SIZE(hdmi_resources),
455 .resource = hdmi_resources,
456 .id = -1,
457 .dev = {
458 .platform_data = &hdmi_info,
459 },
460};
461
c241a0e0 462static const struct sh_mobile_meram_cfg hdmi_meram_cfg = {
1c7fcbed 463 .icb[0] = {
1c7fcbed
DHG
464 .meram_size = 0x100,
465 },
466 .icb[1] = {
1c7fcbed
DHG
467 .meram_size = 0x100,
468 },
469};
a1022adb 470
12c4309b 471static struct sh_mobile_lcdc_info hdmi_lcdc_info = {
1c7fcbed 472 .meram_dev = &mackerel_meram_info,
12c4309b
KM
473 .clock_source = LCDC_CLK_EXTERNAL,
474 .ch[0] = {
475 .chan = LCDC_CHAN_MAINLCD,
edd153a3 476 .fourcc = V4L2_PIX_FMT_RGB565,
12c4309b
KM
477 .interface_type = RGB24,
478 .clock_divider = 1,
479 .flags = LCDC_FLAGS_DWPOL,
1c7fcbed 480 .meram_cfg = &hdmi_meram_cfg,
a1022adb 481 .tx_dev = &hdmi_device,
12c4309b
KM
482 }
483};
484
485static struct resource hdmi_lcdc_resources[] = {
486 [0] = {
487 .name = "LCDC1",
488 .start = 0xfe944000,
489 .end = 0xfe947fff,
490 .flags = IORESOURCE_MEM,
491 },
492 [1] = {
493 .start = intcs_evt2irq(0x1780),
494 .flags = IORESOURCE_IRQ,
495 },
496};
497
498static struct platform_device hdmi_lcdc_device = {
499 .name = "sh_mobile_lcdc_fb",
500 .num_resources = ARRAY_SIZE(hdmi_lcdc_resources),
501 .resource = hdmi_lcdc_resources,
502 .id = 1,
503 .dev = {
504 .platform_data = &hdmi_lcdc_info,
505 .coherent_dma_mask = ~0,
506 },
507};
508
fa063b48
KM
509static struct asoc_simple_dai_init_info fsi2_hdmi_init_info = {
510 .cpu_daifmt = SND_SOC_DAIFMT_CBM_CFM,
511};
512
513static struct asoc_simple_card_info fsi2_hdmi_info = {
514 .name = "HDMI",
515 .card = "FSI2B-HDMI",
516 .cpu_dai = "fsib-dai",
517 .codec = "sh-mobile-hdmi",
518 .platform = "sh_fsi2",
519 .codec_dai = "sh_mobile_hdmi-hifi",
520 .init = &fsi2_hdmi_init_info,
521};
522
3f25c9cc 523static struct platform_device fsi_hdmi_device = {
fa063b48
KM
524 .name = "asoc-simple-card",
525 .id = 1,
526 .dev = {
527 .platform_data = &fsi2_hdmi_info,
528 },
3f25c9cc
KM
529};
530
2ce51f8b 531static void __init hdmi_init_pm_clock(void)
12c4309b
KM
532{
533 struct clk *hdmi_ick = clk_get(&hdmi_device.dev, "ick");
534 int ret;
535 long rate;
536
537 if (IS_ERR(hdmi_ick)) {
538 ret = PTR_ERR(hdmi_ick);
539 pr_err("Cannot get HDMI ICK: %d\n", ret);
540 goto out;
541 }
542
543 ret = clk_set_parent(&sh7372_pllc2_clk, &sh7372_dv_clki_div2_clk);
544 if (ret < 0) {
545 pr_err("Cannot set PLLC2 parent: %d, %d users\n",
546 ret, sh7372_pllc2_clk.usecount);
547 goto out;
548 }
549
550 pr_debug("PLLC2 initial frequency %lu\n",
551 clk_get_rate(&sh7372_pllc2_clk));
552
553 rate = clk_round_rate(&sh7372_pllc2_clk, 594000000);
554 if (rate < 0) {
555 pr_err("Cannot get suitable rate: %ld\n", rate);
556 ret = rate;
557 goto out;
558 }
559
560 ret = clk_set_rate(&sh7372_pllc2_clk, rate);
561 if (ret < 0) {
562 pr_err("Cannot set rate %ld: %d\n", rate, ret);
563 goto out;
564 }
565
12c4309b
KM
566 pr_debug("PLLC2 set frequency %lu\n", rate);
567
568 ret = clk_set_parent(hdmi_ick, &sh7372_pllc2_clk);
2ce51f8b 569 if (ret < 0)
12c4309b 570 pr_err("Cannot set HDMI parent: %d\n", ret);
12c4309b
KM
571
572out:
573 if (!IS_ERR(hdmi_ick))
574 clk_put(hdmi_ick);
12c4309b 575}
12c4309b 576
e2a53b7c
MD
577/* USBHS0 is connected to CN22 which takes a USB Mini-B plug
578 *
579 * The sh7372 SoC has IRQ7 set aside for USBHS0 hotplug,
580 * but on this particular board IRQ7 is already used by
581 * the touch screen. This leaves us with software polling.
582 */
583#define USBHS0_POLL_INTERVAL (HZ * 5)
584
585struct usbhs_private {
0a4b04dc
AB
586 void __iomem *usbphyaddr;
587 void __iomem *usbcrcaddr;
e2a53b7c
MD
588 struct renesas_usbhs_platform_info info;
589 struct delayed_work work;
590 struct platform_device *pdev;
591};
592
593#define usbhs_get_priv(pdev) \
594 container_of(renesas_usbhs_get_info(pdev), \
595 struct usbhs_private, info)
596
597#define usbhs_is_connected(priv) \
598 (!((1 << 7) & __raw_readw(priv->usbcrcaddr)))
599
600static int usbhs_get_vbus(struct platform_device *pdev)
601{
602 return usbhs_is_connected(usbhs_get_priv(pdev));
603}
604
605static void usbhs_phy_reset(struct platform_device *pdev)
606{
607 struct usbhs_private *priv = usbhs_get_priv(pdev);
608
609 /* init phy */
610 __raw_writew(0x8a0a, priv->usbcrcaddr);
611}
612
613static int usbhs0_get_id(struct platform_device *pdev)
614{
615 return USBHS_GADGET;
616}
617
618static void usbhs0_work_function(struct work_struct *work)
619{
620 struct usbhs_private *priv = container_of(work, struct usbhs_private,
621 work.work);
622
623 renesas_usbhs_call_notify_hotplug(priv->pdev);
624 schedule_delayed_work(&priv->work, USBHS0_POLL_INTERVAL);
625}
626
627static int usbhs0_hardware_init(struct platform_device *pdev)
628{
629 struct usbhs_private *priv = usbhs_get_priv(pdev);
630
631 priv->pdev = pdev;
632 INIT_DELAYED_WORK(&priv->work, usbhs0_work_function);
633 schedule_delayed_work(&priv->work, USBHS0_POLL_INTERVAL);
634 return 0;
635}
636
637static void usbhs0_hardware_exit(struct platform_device *pdev)
638{
639 struct usbhs_private *priv = usbhs_get_priv(pdev);
640
641 cancel_delayed_work_sync(&priv->work);
642}
643
e2a53b7c 644static struct usbhs_private usbhs0_private = {
0a4b04dc 645 .usbcrcaddr = IOMEM(0xe605810c), /* USBCR2 */
e2a53b7c
MD
646 .info = {
647 .platform_callback = {
648 .hardware_init = usbhs0_hardware_init,
649 .hardware_exit = usbhs0_hardware_exit,
650 .phy_reset = usbhs_phy_reset,
651 .get_id = usbhs0_get_id,
652 .get_vbus = usbhs_get_vbus,
653 },
654 .driver_param = {
655 .buswait_bwait = 4,
fe437561
KM
656 .d0_tx_id = SHDMA_SLAVE_USB0_TX,
657 .d1_rx_id = SHDMA_SLAVE_USB0_RX,
e2a53b7c
MD
658 },
659 },
660};
661
662static struct resource usbhs0_resources[] = {
663 [0] = {
664 .name = "USBHS0",
665 .start = 0xe6890000,
666 .end = 0xe68900e6 - 1,
667 .flags = IORESOURCE_MEM,
668 },
669 [1] = {
670 .start = evt2irq(0x1ca0) /* USB0_USB0I0 */,
671 .flags = IORESOURCE_IRQ,
672 },
673};
674
675static struct platform_device usbhs0_device = {
676 .name = "renesas_usbhs",
677 .id = 0,
678 .dev = {
679 .platform_data = &usbhs0_private.info,
680 },
681 .num_resources = ARRAY_SIZE(usbhs0_resources),
682 .resource = usbhs0_resources,
683};
684
685/* USBHS1 is connected to CN31 which takes a USB Mini-AB plug
686 *
687 * Use J30 to select between Host and Function. This setting
688 * can however not be detected by software. Hotplug of USBHS1
689 * is provided via IRQ8.
0ada2da5
KM
690 *
691 * Current USB1 works as "USB Host".
692 * - set J30 "short"
693 *
694 * If you want to use it as "USB gadget",
695 * - J30 "open"
696 * - modify usbhs1_get_id() USBHS_HOST -> USBHS_GADGET
697 * - add .get_vbus = usbhs_get_vbus in usbhs1_private
e2a53b7c
MD
698 */
699#define IRQ8 evt2irq(0x0300)
66ee3bef
KM
700#define USB_PHY_MODE (1 << 4)
701#define USB_PHY_INT_EN ((1 << 3) | (1 << 2))
702#define USB_PHY_ON (1 << 1)
703#define USB_PHY_OFF (1 << 0)
704#define USB_PHY_INT_CLR (USB_PHY_ON | USB_PHY_OFF)
705
66ee3bef
KM
706static irqreturn_t usbhs1_interrupt(int irq, void *data)
707{
708 struct platform_device *pdev = data;
709 struct usbhs_private *priv = usbhs_get_priv(pdev);
710
711 dev_dbg(&pdev->dev, "%s\n", __func__);
712
713 renesas_usbhs_call_notify_hotplug(pdev);
714
715 /* clear status */
716 __raw_writew(__raw_readw(priv->usbphyaddr) | USB_PHY_INT_CLR,
717 priv->usbphyaddr);
718
719 return IRQ_HANDLED;
720}
721
722static int usbhs1_hardware_init(struct platform_device *pdev)
723{
724 struct usbhs_private *priv = usbhs_get_priv(pdev);
725 int ret;
726
66ee3bef
KM
727 /* clear interrupt status */
728 __raw_writew(USB_PHY_MODE | USB_PHY_INT_CLR, priv->usbphyaddr);
729
e2a53b7c 730 ret = request_irq(IRQ8, usbhs1_interrupt, IRQF_TRIGGER_HIGH,
66ee3bef
KM
731 dev_name(&pdev->dev), pdev);
732 if (ret) {
733 dev_err(&pdev->dev, "request_irq err\n");
734 return ret;
735 }
736
737 /* enable USB phy interrupt */
738 __raw_writew(USB_PHY_MODE | USB_PHY_INT_EN, priv->usbphyaddr);
739
740 return 0;
741}
742
743static void usbhs1_hardware_exit(struct platform_device *pdev)
744{
745 struct usbhs_private *priv = usbhs_get_priv(pdev);
746
747 /* clear interrupt status */
748 __raw_writew(USB_PHY_MODE | USB_PHY_INT_CLR, priv->usbphyaddr);
749
e2a53b7c 750 free_irq(IRQ8, pdev);
66ee3bef
KM
751}
752
05a7929f
KM
753static int usbhs1_get_id(struct platform_device *pdev)
754{
0ada2da5 755 return USBHS_HOST;
05a7929f
KM
756}
757
66ee3bef
KM
758static u32 usbhs1_pipe_cfg[] = {
759 USB_ENDPOINT_XFER_CONTROL,
760 USB_ENDPOINT_XFER_ISOC,
761 USB_ENDPOINT_XFER_ISOC,
762 USB_ENDPOINT_XFER_BULK,
763 USB_ENDPOINT_XFER_BULK,
764 USB_ENDPOINT_XFER_BULK,
765 USB_ENDPOINT_XFER_INT,
766 USB_ENDPOINT_XFER_INT,
767 USB_ENDPOINT_XFER_INT,
768 USB_ENDPOINT_XFER_BULK,
769 USB_ENDPOINT_XFER_BULK,
770 USB_ENDPOINT_XFER_BULK,
771 USB_ENDPOINT_XFER_BULK,
772 USB_ENDPOINT_XFER_BULK,
773 USB_ENDPOINT_XFER_BULK,
774 USB_ENDPOINT_XFER_BULK,
775};
776
777static struct usbhs_private usbhs1_private = {
0a4b04dc
AB
778 .usbphyaddr = IOMEM(0xe60581e2), /* USBPHY1INTAP */
779 .usbcrcaddr = IOMEM(0xe6058130), /* USBCR4 */
66ee3bef
KM
780 .info = {
781 .platform_callback = {
782 .hardware_init = usbhs1_hardware_init,
783 .hardware_exit = usbhs1_hardware_exit,
05a7929f 784 .get_id = usbhs1_get_id,
e2a53b7c 785 .phy_reset = usbhs_phy_reset,
66ee3bef
KM
786 },
787 .driver_param = {
788 .buswait_bwait = 4,
f427eb64 789 .has_otg = 1,
66ee3bef
KM
790 .pipe_type = usbhs1_pipe_cfg,
791 .pipe_size = ARRAY_SIZE(usbhs1_pipe_cfg),
fe437561
KM
792 .d0_tx_id = SHDMA_SLAVE_USB1_TX,
793 .d1_rx_id = SHDMA_SLAVE_USB1_RX,
66ee3bef
KM
794 },
795 },
796};
797
798static struct resource usbhs1_resources[] = {
799 [0] = {
e2a53b7c
MD
800 .name = "USBHS1",
801 .start = 0xe68b0000,
802 .end = 0xe68b00e6 - 1,
66ee3bef
KM
803 .flags = IORESOURCE_MEM,
804 },
805 [1] = {
806 .start = evt2irq(0x1ce0) /* USB1_USB1I0 */,
807 .flags = IORESOURCE_IRQ,
808 },
809};
810
811static struct platform_device usbhs1_device = {
812 .name = "renesas_usbhs",
813 .id = 1,
814 .dev = {
815 .platform_data = &usbhs1_private.info,
816 },
817 .num_resources = ARRAY_SIZE(usbhs1_resources),
818 .resource = usbhs1_resources,
819};
820
d44deb35
KM
821/* LED */
822static struct gpio_led mackerel_leds[] = {
823 {
824 .name = "led0",
825 .gpio = GPIO_PORT0,
826 .default_state = LEDS_GPIO_DEFSTATE_ON,
827 },
828 {
829 .name = "led1",
830 .gpio = GPIO_PORT1,
831 .default_state = LEDS_GPIO_DEFSTATE_ON,
832 },
833 {
834 .name = "led2",
835 .gpio = GPIO_PORT2,
836 .default_state = LEDS_GPIO_DEFSTATE_ON,
837 },
838 {
839 .name = "led3",
840 .gpio = GPIO_PORT159,
841 .default_state = LEDS_GPIO_DEFSTATE_ON,
842 }
843};
844
845static struct gpio_led_platform_data mackerel_leds_pdata = {
846 .leds = mackerel_leds,
847 .num_leds = ARRAY_SIZE(mackerel_leds),
848};
849
850static struct platform_device leds_device = {
851 .name = "leds-gpio",
852 .id = 0,
853 .dev = {
854 .platform_data = &mackerel_leds_pdata,
855 },
856};
857
1a44d72a
KM
858/* FSI */
859#define IRQ_FSI evt2irq(0x1840)
98d27b8a
KM
860static int __fsi_set_round_rate(struct clk *clk, long rate, int enable)
861{
862 int ret;
863
864 if (rate <= 0)
865 return 0;
866
867 if (!enable) {
868 clk_disable(clk);
869 return 0;
870 }
871
872 ret = clk_set_rate(clk, clk_round_rate(clk, rate));
873 if (ret < 0)
874 return ret;
875
876 return clk_enable(clk);
877}
878
fec691e7 879static int fsi_b_set_rate(struct device *dev, int rate, int enable)
98d27b8a
KM
880{
881 struct clk *fsib_clk;
882 struct clk *fdiv_clk = &sh7372_fsidivb_clk;
883 long fsib_rate = 0;
884 long fdiv_rate = 0;
885 int ackmd_bpfmd;
886 int ret;
887
98d27b8a
KM
888 /* clock start */
889 switch (rate) {
890 case 44100:
891 fsib_rate = rate * 256;
892 ackmd_bpfmd = SH_FSI_ACKMD_256 | SH_FSI_BPFMD_64;
893 break;
894 case 48000:
895 fsib_rate = 85428000; /* around 48kHz x 256 x 7 */
896 fdiv_rate = rate * 256;
897 ackmd_bpfmd = SH_FSI_ACKMD_256 | SH_FSI_BPFMD_64;
898 break;
899 default:
900 pr_err("unsupported rate in FSI2 port B\n");
901 return -EINVAL;
902 }
903
904 /* FSI B setting */
905 fsib_clk = clk_get(dev, "ickb");
906 if (IS_ERR(fsib_clk))
907 return -EIO;
908
909 /* fsib */
910 ret = __fsi_set_round_rate(fsib_clk, fsib_rate, enable);
911 if (ret < 0)
912 goto fsi_set_rate_end;
913
914 /* FSI DIV */
915 ret = __fsi_set_round_rate(fdiv_clk, fdiv_rate, enable);
916 if (ret < 0) {
917 /* disable FSI B */
918 if (enable)
919 __fsi_set_round_rate(fsib_clk, fsib_rate, 0);
920 goto fsi_set_rate_end;
921 }
922
923 ret = ackmd_bpfmd;
924
925fsi_set_rate_end:
926 clk_put(fsib_clk);
927 return ret;
928}
929
1a44d72a 930static struct sh_fsi_platform_info fsi_info = {
fec691e7
KM
931 .port_a = {
932 .flags = SH_FSI_BRS_INV,
c650a1f4
KM
933 .tx_id = SHDMA_SLAVE_FSIA_TX,
934 .rx_id = SHDMA_SLAVE_FSIA_RX,
fec691e7
KM
935 },
936 .port_b = {
937 .flags = SH_FSI_BRS_INV |
98d27b8a
KM
938 SH_FSI_BRM_INV |
939 SH_FSI_LRS_INV |
f17c13ca 940 SH_FSI_FMT_SPDIF,
fec691e7
KM
941 .set_rate = fsi_b_set_rate,
942 }
1a44d72a
KM
943};
944
945static struct resource fsi_resources[] = {
946 [0] = {
c650a1f4
KM
947 /* we need 0xFE1F0000 to access DMA
948 * instead of 0xFE3C0000 */
1a44d72a 949 .name = "FSI",
c650a1f4
KM
950 .start = 0xFE1F0000,
951 .end = 0xFE1F0400 - 1,
1a44d72a
KM
952 .flags = IORESOURCE_MEM,
953 },
954 [1] = {
955 .start = IRQ_FSI,
956 .flags = IORESOURCE_IRQ,
957 },
958};
959
960static struct platform_device fsi_device = {
961 .name = "sh_fsi2",
962 .id = -1,
963 .num_resources = ARRAY_SIZE(fsi_resources),
964 .resource = fsi_resources,
965 .dev = {
966 .platform_data = &fsi_info,
967 },
968};
969
af8a2fe1
KM
970static struct asoc_simple_dai_init_info fsi2_ak4643_init_info = {
971 .fmt = SND_SOC_DAIFMT_LEFT_J,
972 .codec_daifmt = SND_SOC_DAIFMT_CBM_CFM,
973 .cpu_daifmt = SND_SOC_DAIFMT_CBS_CFS,
974 .sysclk = 11289600,
975};
976
977static struct asoc_simple_card_info fsi2_ak4643_info = {
45f31216
KM
978 .name = "AK4643",
979 .card = "FSI2A-AK4643",
980 .cpu_dai = "fsia-dai",
981 .codec = "ak4642-codec.0-0013",
982 .platform = "sh_fsi2",
af8a2fe1
KM
983 .codec_dai = "ak4642-hifi",
984 .init = &fsi2_ak4643_init_info,
45f31216
KM
985};
986
1a44d72a 987static struct platform_device fsi_ak4643_device = {
af8a2fe1 988 .name = "asoc-simple-card",
45f31216
KM
989 .dev = {
990 .platform_data = &fsi2_ak4643_info,
991 },
1a44d72a 992};
d44deb35 993
2aab52e8
BH
994/* FLCTL */
995static struct mtd_partition nand_partition_info[] = {
996 {
997 .name = "system",
998 .offset = 0,
999 .size = 128 * 1024 * 1024,
1000 },
1001 {
1002 .name = "userdata",
1003 .offset = MTDPART_OFS_APPEND,
1004 .size = 256 * 1024 * 1024,
1005 },
1006 {
1007 .name = "cache",
1008 .offset = MTDPART_OFS_APPEND,
1009 .size = 128 * 1024 * 1024,
1010 },
1011};
1012
1013static struct resource nand_flash_resources[] = {
1014 [0] = {
1015 .start = 0xe6a30000,
1016 .end = 0xe6a3009b,
1017 .flags = IORESOURCE_MEM,
1018 }
1019};
1020
1021static struct sh_flctl_platform_data nand_flash_data = {
1022 .parts = nand_partition_info,
1023 .nr_parts = ARRAY_SIZE(nand_partition_info),
1024 .flcmncr_val = CLK_16B_12L_4H | TYPESEL_SET
1025 | SHBUSSEL | SEL_16BIT | SNAND_E,
1026 .use_holden = 1,
1027};
1028
1029static struct platform_device nand_flash_device = {
1030 .name = "sh_flctl",
1031 .resource = nand_flash_resources,
1032 .num_resources = ARRAY_SIZE(nand_flash_resources),
1033 .dev = {
1034 .platform_data = &nand_flash_data,
1035 },
1036};
1037
6dff7da2
YG
1038/*
1039 * The card detect pin of the top SD/MMC slot (CN7) is active low and is
1040 * connected to GPIO A22 of SH7372 (GPIO_PORT41).
1041 */
1042static int slot_cn7_get_cd(struct platform_device *pdev)
1043{
ceb50f33 1044 return !gpio_get_value(GPIO_PORT41);
6dff7da2
YG
1045}
1046
1047/* SDHI0 */
1048static struct sh_mobile_sdhi_info sdhi0_info = {
1049 .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
1050 .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
2b3e38c4 1051 .tmio_flags = TMIO_MMC_USE_GPIO_CD,
da97da73 1052 .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ,
2b3e38c4 1053 .cd_gpio = GPIO_PORT172,
6dff7da2
YG
1054};
1055
1056static struct resource sdhi0_resources[] = {
1057 [0] = {
1058 .name = "SDHI0",
1059 .start = 0xe6850000,
31d31fe7 1060 .end = 0xe68500ff,
6dff7da2
YG
1061 .flags = IORESOURCE_MEM,
1062 },
1063 [1] = {
2007aea1
SH
1064 .start = evt2irq(0x0e00) /* SDHI0_SDHI0I0 */,
1065 .flags = IORESOURCE_IRQ,
1066 },
1067 [2] = {
1068 .start = evt2irq(0x0e20) /* SDHI0_SDHI0I1 */,
1069 .flags = IORESOURCE_IRQ,
1070 },
1071 [3] = {
1072 .start = evt2irq(0x0e40) /* SDHI0_SDHI0I2 */,
6dff7da2
YG
1073 .flags = IORESOURCE_IRQ,
1074 },
1075};
1076
1077static struct platform_device sdhi0_device = {
1078 .name = "sh_mobile_sdhi",
1079 .num_resources = ARRAY_SIZE(sdhi0_resources),
1080 .resource = sdhi0_resources,
1081 .id = 0,
1082 .dev = {
1083 .platform_data = &sdhi0_info,
1084 },
1085};
1086
5bcd7517 1087#if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
6dff7da2
YG
1088/* SDHI1 */
1089static struct sh_mobile_sdhi_info sdhi1_info = {
1090 .dma_slave_tx = SHDMA_SLAVE_SDHI1_TX,
1091 .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX,
1092 .tmio_ocr_mask = MMC_VDD_165_195,
1093 .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE,
da97da73 1094 .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
6dff7da2
YG
1095 MMC_CAP_NEEDS_POLL,
1096 .get_cd = slot_cn7_get_cd,
1097};
1098
1099static struct resource sdhi1_resources[] = {
1100 [0] = {
1101 .name = "SDHI1",
1102 .start = 0xe6860000,
31d31fe7 1103 .end = 0xe68600ff,
6dff7da2
YG
1104 .flags = IORESOURCE_MEM,
1105 },
1106 [1] = {
cb2ccc32 1107 .name = SH_MOBILE_SDHI_IRQ_CARD_DETECT,
2007aea1
SH
1108 .start = evt2irq(0x0e80), /* SDHI1_SDHI1I0 */
1109 .flags = IORESOURCE_IRQ,
1110 },
1111 [2] = {
cb2ccc32 1112 .name = SH_MOBILE_SDHI_IRQ_SDCARD,
2007aea1
SH
1113 .start = evt2irq(0x0ea0), /* SDHI1_SDHI1I1 */
1114 .flags = IORESOURCE_IRQ,
1115 },
1116 [3] = {
cb2ccc32 1117 .name = SH_MOBILE_SDHI_IRQ_SDIO,
2007aea1 1118 .start = evt2irq(0x0ec0), /* SDHI1_SDHI1I2 */
6dff7da2
YG
1119 .flags = IORESOURCE_IRQ,
1120 },
1121};
1122
1123static struct platform_device sdhi1_device = {
1124 .name = "sh_mobile_sdhi",
1125 .num_resources = ARRAY_SIZE(sdhi1_resources),
1126 .resource = sdhi1_resources,
1127 .id = 1,
1128 .dev = {
1129 .platform_data = &sdhi1_info,
1130 },
1131};
41491b9a 1132#endif
6dff7da2 1133
da5d1f4c
YG
1134/*
1135 * The card detect pin of the top SD/MMC slot (CN23) is active low and is
1136 * connected to GPIO SCIFB_SCK of SH7372 (GPIO_PORT162).
1137 */
1138static int slot_cn23_get_cd(struct platform_device *pdev)
1139{
1140 return !gpio_get_value(GPIO_PORT162);
1141}
1142
6dff7da2
YG
1143/* SDHI2 */
1144static struct sh_mobile_sdhi_info sdhi2_info = {
1145 .dma_slave_tx = SHDMA_SLAVE_SDHI2_TX,
1146 .dma_slave_rx = SHDMA_SLAVE_SDHI2_RX,
1147 .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE,
da97da73 1148 .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
6dff7da2 1149 MMC_CAP_NEEDS_POLL,
da5d1f4c 1150 .get_cd = slot_cn23_get_cd,
6dff7da2
YG
1151};
1152
1153static struct resource sdhi2_resources[] = {
1154 [0] = {
1155 .name = "SDHI2",
1156 .start = 0xe6870000,
31d31fe7 1157 .end = 0xe68700ff,
6dff7da2
YG
1158 .flags = IORESOURCE_MEM,
1159 },
1160 [1] = {
cb2ccc32 1161 .name = SH_MOBILE_SDHI_IRQ_CARD_DETECT,
2007aea1
SH
1162 .start = evt2irq(0x1200), /* SDHI2_SDHI2I0 */
1163 .flags = IORESOURCE_IRQ,
1164 },
1165 [2] = {
cb2ccc32 1166 .name = SH_MOBILE_SDHI_IRQ_SDCARD,
2007aea1
SH
1167 .start = evt2irq(0x1220), /* SDHI2_SDHI2I1 */
1168 .flags = IORESOURCE_IRQ,
1169 },
1170 [3] = {
cb2ccc32 1171 .name = SH_MOBILE_SDHI_IRQ_SDIO,
2007aea1 1172 .start = evt2irq(0x1240), /* SDHI2_SDHI2I2 */
6dff7da2
YG
1173 .flags = IORESOURCE_IRQ,
1174 },
1175};
1176
1177static struct platform_device sdhi2_device = {
1178 .name = "sh_mobile_sdhi",
1179 .num_resources = ARRAY_SIZE(sdhi2_resources),
1180 .resource = sdhi2_resources,
1181 .id = 2,
1182 .dev = {
1183 .platform_data = &sdhi2_info,
1184 },
1185};
1186
41491b9a
YG
1187/* SH_MMCIF */
1188static struct resource sh_mmcif_resources[] = {
1189 [0] = {
1190 .name = "MMCIF",
1191 .start = 0xE6BD0000,
1192 .end = 0xE6BD00FF,
1193 .flags = IORESOURCE_MEM,
1194 },
1195 [1] = {
1196 /* MMC ERR */
1197 .start = evt2irq(0x1ac0),
1198 .flags = IORESOURCE_IRQ,
1199 },
1200 [2] = {
1201 /* MMC NOR */
1202 .start = evt2irq(0x1ae0),
1203 .flags = IORESOURCE_IRQ,
1204 },
1205};
1206
1207static struct sh_mmcif_plat_data sh_mmcif_plat = {
1208 .sup_pclk = 0,
1209 .ocr = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
1210 .caps = MMC_CAP_4_BIT_DATA |
1211 MMC_CAP_8_BIT_DATA |
1212 MMC_CAP_NEEDS_POLL,
1213 .get_cd = slot_cn7_get_cd,
d5bb386d
GL
1214 .slave_id_tx = SHDMA_SLAVE_MMCIF_TX,
1215 .slave_id_rx = SHDMA_SLAVE_MMCIF_RX,
41491b9a
YG
1216};
1217
1218static struct platform_device sh_mmcif_device = {
1219 .name = "sh_mmcif",
1220 .id = 0,
1221 .dev = {
1222 .dma_mask = NULL,
1223 .coherent_dma_mask = 0xffffffff,
1224 .platform_data = &sh_mmcif_plat,
1225 },
1226 .num_resources = ARRAY_SIZE(sh_mmcif_resources),
1227 .resource = sh_mmcif_resources,
1228};
1229
ae37c8de 1230
7dfff953
GL
1231static int mackerel_camera_add(struct soc_camera_device *icd);
1232static void mackerel_camera_del(struct soc_camera_device *icd);
ae37c8de
MD
1233
1234static int camera_set_capture(struct soc_camera_platform_info *info,
1235 int enable)
1236{
1237 return 0; /* camera sensor always enabled */
1238}
1239
1240static struct soc_camera_platform_info camera_info = {
1241 .format_name = "UYVY",
1242 .format_depth = 16,
1243 .format = {
1244 .code = V4L2_MBUS_FMT_UYVY8_2X8,
1245 .colorspace = V4L2_COLORSPACE_SMPTE170M,
1246 .field = V4L2_FIELD_NONE,
1247 .width = 640,
1248 .height = 480,
1249 },
d1e87ed7
GL
1250 .mbus_param = V4L2_MBUS_PCLK_SAMPLE_RISING | V4L2_MBUS_MASTER |
1251 V4L2_MBUS_VSYNC_ACTIVE_HIGH | V4L2_MBUS_HSYNC_ACTIVE_HIGH |
1252 V4L2_MBUS_DATA_ACTIVE_HIGH,
1253 .mbus_type = V4L2_MBUS_PARALLEL,
ae37c8de
MD
1254 .set_capture = camera_set_capture,
1255};
1256
1257static struct soc_camera_link camera_link = {
1258 .bus_id = 0,
1259 .add_device = mackerel_camera_add,
1260 .del_device = mackerel_camera_del,
1261 .module_name = "soc_camera_platform",
1262 .priv = &camera_info,
1263};
1264
86a73144
GL
1265static struct platform_device *camera_device;
1266
1267static void mackerel_camera_release(struct device *dev)
ae37c8de 1268{
86a73144 1269 soc_camera_platform_release(&camera_device);
ae37c8de
MD
1270}
1271
7dfff953 1272static int mackerel_camera_add(struct soc_camera_device *icd)
ae37c8de 1273{
7dfff953 1274 return soc_camera_platform_add(icd, &camera_device, &camera_link,
86a73144 1275 mackerel_camera_release, 0);
ae37c8de
MD
1276}
1277
7dfff953 1278static void mackerel_camera_del(struct soc_camera_device *icd)
ae37c8de 1279{
7dfff953 1280 soc_camera_platform_del(icd, camera_device, &camera_link);
ae37c8de
MD
1281}
1282
1283static struct sh_mobile_ceu_info sh_mobile_ceu_info = {
1284 .flags = SH_CEU_FLAG_USE_8BIT_BUS,
ef8f41ff
GL
1285 .max_width = 8188,
1286 .max_height = 8188,
ae37c8de
MD
1287};
1288
1289static struct resource ceu_resources[] = {
1290 [0] = {
1291 .name = "CEU",
1292 .start = 0xfe910000,
1293 .end = 0xfe91009f,
1294 .flags = IORESOURCE_MEM,
1295 },
1296 [1] = {
1297 .start = intcs_evt2irq(0x880),
1298 .flags = IORESOURCE_IRQ,
1299 },
1300 [2] = {
1301 /* place holder for contiguous memory */
1302 },
1303};
1304
1305static struct platform_device ceu_device = {
1306 .name = "sh_mobile_ceu",
1307 .id = 0, /* "ceu0" clock */
1308 .num_resources = ARRAY_SIZE(ceu_resources),
1309 .resource = ceu_resources,
1310 .dev = {
05a5f01c
GL
1311 .platform_data = &sh_mobile_ceu_info,
1312 .coherent_dma_mask = 0xffffffff,
ae37c8de
MD
1313 },
1314};
1315
1316static struct platform_device mackerel_camera = {
1317 .name = "soc-camera-pdrv",
1318 .id = 0,
1319 .dev = {
1320 .platform_data = &camera_link,
1321 },
1322};
1323
920adc75
KM
1324static struct platform_device *mackerel_devices[] __initdata = {
1325 &nor_flash_device,
2264c151 1326 &smc911x_device,
11fee467 1327 &lcdc_device,
66ee3bef 1328 &usbhs1_device,
5a568552 1329 &usbhs0_device,
d44deb35 1330 &leds_device,
1a44d72a
KM
1331 &fsi_device,
1332 &fsi_ak4643_device,
3f25c9cc 1333 &fsi_hdmi_device,
2aab52e8 1334 &nand_flash_device,
6dff7da2 1335 &sdhi0_device,
5bcd7517 1336#if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
6dff7da2 1337 &sdhi1_device,
41491b9a 1338#endif
6dff7da2 1339 &sdhi2_device,
41491b9a 1340 &sh_mmcif_device,
ae37c8de
MD
1341 &ceu_device,
1342 &mackerel_camera,
12c4309b 1343 &hdmi_device,
a1022adb 1344 &hdmi_lcdc_device,
1c7fcbed 1345 &meram_device,
1a44d72a
KM
1346};
1347
cd8ab004
TS
1348/* Keypad Initialization */
1349#define KEYPAD_BUTTON(ev_type, ev_code, act_low) \
1350{ \
1351 .type = ev_type, \
1352 .code = ev_code, \
1353 .active_low = act_low, \
1354}
1355
1356#define KEYPAD_BUTTON_LOW(event_code) KEYPAD_BUTTON(EV_KEY, event_code, 1)
1357
1358static struct tca6416_button mackerel_gpio_keys[] = {
1359 KEYPAD_BUTTON_LOW(KEY_HOME),
1360 KEYPAD_BUTTON_LOW(KEY_MENU),
1361 KEYPAD_BUTTON_LOW(KEY_BACK),
1362 KEYPAD_BUTTON_LOW(KEY_POWER),
1363};
1364
1365static struct tca6416_keys_platform_data mackerel_tca6416_keys_info = {
1366 .buttons = mackerel_gpio_keys,
1367 .nbuttons = ARRAY_SIZE(mackerel_gpio_keys),
1368 .rep = 1,
1369 .use_polling = 0,
1370 .pinmask = 0x000F,
1371};
1372
1a44d72a 1373/* I2C */
6ae1e19d 1374#define IRQ7 evt2irq(0x02e0)
cd8ab004
TS
1375#define IRQ9 evt2irq(0x0320)
1376
1a44d72a
KM
1377static struct i2c_board_info i2c0_devices[] = {
1378 {
1379 I2C_BOARD_INFO("ak4643", 0x13),
1380 },
cd8ab004
TS
1381 /* Keypad */
1382 {
1383 I2C_BOARD_INFO("tca6408-keys", 0x20),
1384 .platform_data = &mackerel_tca6416_keys_info,
1385 .irq = IRQ9,
1386 },
6ae1e19d
TS
1387 /* Touchscreen */
1388 {
1389 I2C_BOARD_INFO("st1232-ts", 0x55),
1390 .irq = IRQ7,
1391 },
920adc75
KM
1392};
1393
80f1dc7c
TS
1394#define IRQ21 evt2irq(0x32a0)
1395
1396static struct i2c_board_info i2c1_devices[] = {
1397 /* Accelerometer */
1398 {
1399 I2C_BOARD_INFO("adxl34x", 0x53),
1400 .irq = IRQ21,
1401 },
1402};
1403
0a4b04dc
AB
1404#define GPIO_PORT9CR IOMEM(0xE6051009)
1405#define GPIO_PORT10CR IOMEM(0xE605100A)
1406#define GPIO_PORT167CR IOMEM(0xE60520A7)
1407#define GPIO_PORT168CR IOMEM(0xE60520A8)
1408#define SRCR4 IOMEM(0xe61580bc)
1409#define USCCR1 IOMEM(0xE6058144)
920adc75
KM
1410static void __init mackerel_init(void)
1411{
12c4309b 1412 u32 srcr4;
98d27b8a 1413 struct clk *clk;
12c4309b 1414
70ccb28d
GL
1415 regulator_register_always_on(0, "fixed-1.8V", fixed1v8_power_consumers,
1416 ARRAY_SIZE(fixed1v8_power_consumers), 1800000);
1417 regulator_register_always_on(1, "fixed-3.3V", fixed3v3_power_consumers,
1418 ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
1419 regulator_register_fixed(2, dummy_supplies, ARRAY_SIZE(dummy_supplies));
1420
12bb16d2
MD
1421 /* External clock source */
1422 clk_set_rate(&sh7372_dv_clki_clk, 27000000);
1423
920adc75
KM
1424 sh7372_pinmux_init();
1425
1426 /* enable SCIFA0 */
1427 gpio_request(GPIO_FN_SCIFA0_TXD, NULL);
1428 gpio_request(GPIO_FN_SCIFA0_RXD, NULL);
1429
2264c151
KM
1430 /* enable SMSC911X */
1431 gpio_request(GPIO_FN_CS5A, NULL);
1432 gpio_request(GPIO_FN_IRQ6_39, NULL);
1433
11fee467 1434 /* LCDC */
eb87e677
KM
1435 gpio_request(GPIO_FN_LCDD23, NULL);
1436 gpio_request(GPIO_FN_LCDD22, NULL);
1437 gpio_request(GPIO_FN_LCDD21, NULL);
1438 gpio_request(GPIO_FN_LCDD20, NULL);
1439 gpio_request(GPIO_FN_LCDD19, NULL);
1440 gpio_request(GPIO_FN_LCDD18, NULL);
11fee467
KM
1441 gpio_request(GPIO_FN_LCDD17, NULL);
1442 gpio_request(GPIO_FN_LCDD16, NULL);
1443 gpio_request(GPIO_FN_LCDD15, NULL);
1444 gpio_request(GPIO_FN_LCDD14, NULL);
1445 gpio_request(GPIO_FN_LCDD13, NULL);
1446 gpio_request(GPIO_FN_LCDD12, NULL);
1447 gpio_request(GPIO_FN_LCDD11, NULL);
1448 gpio_request(GPIO_FN_LCDD10, NULL);
1449 gpio_request(GPIO_FN_LCDD9, NULL);
1450 gpio_request(GPIO_FN_LCDD8, NULL);
1451 gpio_request(GPIO_FN_LCDD7, NULL);
1452 gpio_request(GPIO_FN_LCDD6, NULL);
1453 gpio_request(GPIO_FN_LCDD5, NULL);
1454 gpio_request(GPIO_FN_LCDD4, NULL);
1455 gpio_request(GPIO_FN_LCDD3, NULL);
1456 gpio_request(GPIO_FN_LCDD2, NULL);
1457 gpio_request(GPIO_FN_LCDD1, NULL);
1458 gpio_request(GPIO_FN_LCDD0, NULL);
1459 gpio_request(GPIO_FN_LCDDISP, NULL);
1460 gpio_request(GPIO_FN_LCDDCK, NULL);
1461
1462 gpio_request(GPIO_PORT31, NULL); /* backlight */
1fbdfcde 1463 gpio_direction_output(GPIO_PORT31, 0); /* off by default */
11fee467
KM
1464
1465 gpio_request(GPIO_PORT151, NULL); /* LCDDON */
1466 gpio_direction_output(GPIO_PORT151, 1);
1467
e2a53b7c
MD
1468 /* USBHS0 */
1469 gpio_request(GPIO_FN_VBUS0_0, NULL);
c721e0cb 1470 gpio_request_pulldown(GPIO_PORT168CR); /* VBUS0_0 pull down */
e2a53b7c
MD
1471
1472 /* USBHS1 */
1473 gpio_request(GPIO_FN_VBUS0_1, NULL);
c721e0cb 1474 gpio_request_pulldown(GPIO_PORT167CR); /* VBUS0_1 pull down */
e2a53b7c
MD
1475 gpio_request(GPIO_FN_IDIN_1_113, NULL);
1476
1a44d72a
KM
1477 /* enable FSI2 port A (ak4643) */
1478 gpio_request(GPIO_FN_FSIAIBT, NULL);
1479 gpio_request(GPIO_FN_FSIAILR, NULL);
1480 gpio_request(GPIO_FN_FSIAISLD, NULL);
1481 gpio_request(GPIO_FN_FSIAOSLD, NULL);
1482 gpio_request(GPIO_PORT161, NULL);
1483 gpio_direction_output(GPIO_PORT161, 0); /* slave */
1484
1485 gpio_request(GPIO_PORT9, NULL);
1486 gpio_request(GPIO_PORT10, NULL);
c721e0cb
KM
1487 gpio_direction_none(GPIO_PORT9CR); /* FSIAOBT needs no direction */
1488 gpio_direction_none(GPIO_PORT10CR); /* FSIAOLR needs no direction */
1a44d72a
KM
1489
1490 intc_set_priority(IRQ_FSI, 3); /* irq priority FSI(3) > SMSC911X(2) */
1491
98d27b8a
KM
1492 /* setup FSI2 port B (HDMI) */
1493 gpio_request(GPIO_FN_FSIBCK, NULL);
1494 __raw_writew(__raw_readw(USCCR1) & ~(1 << 6), USCCR1); /* use SPDIF */
1495
1496 /* set SPU2 clock to 119.6 MHz */
1497 clk = clk_get(NULL, "spu_clk");
1498 if (!IS_ERR(clk)) {
1499 clk_set_rate(clk, clk_round_rate(clk, 119600000));
1500 clk_put(clk);
1501 }
1502
cd8ab004
TS
1503 /* enable Keypad */
1504 gpio_request(GPIO_FN_IRQ9_42, NULL);
6845664a 1505 irq_set_irq_type(IRQ9, IRQ_TYPE_LEVEL_HIGH);
cd8ab004 1506
6ae1e19d
TS
1507 /* enable Touchscreen */
1508 gpio_request(GPIO_FN_IRQ7_40, NULL);
6845664a 1509 irq_set_irq_type(IRQ7, IRQ_TYPE_LEVEL_LOW);
6ae1e19d 1510
80f1dc7c
TS
1511 /* enable Accelerometer */
1512 gpio_request(GPIO_FN_IRQ21, NULL);
6845664a 1513 irq_set_irq_type(IRQ21, IRQ_TYPE_LEVEL_HIGH);
1a44d72a 1514
6dff7da2 1515 /* enable SDHI0 */
6dff7da2
YG
1516 gpio_request(GPIO_FN_SDHIWP0, NULL);
1517 gpio_request(GPIO_FN_SDHICMD0, NULL);
1518 gpio_request(GPIO_FN_SDHICLK0, NULL);
1519 gpio_request(GPIO_FN_SDHID0_3, NULL);
1520 gpio_request(GPIO_FN_SDHID0_2, NULL);
1521 gpio_request(GPIO_FN_SDHID0_1, NULL);
1522 gpio_request(GPIO_FN_SDHID0_0, NULL);
1523
56fb523f
GL
1524 /* SDHI0 PORT172 card-detect IRQ26 */
1525 gpio_request(GPIO_FN_IRQ26_172, NULL);
1526
5bcd7517 1527#if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
6dff7da2
YG
1528 /* enable SDHI1 */
1529 gpio_request(GPIO_FN_SDHICMD1, NULL);
1530 gpio_request(GPIO_FN_SDHICLK1, NULL);
1531 gpio_request(GPIO_FN_SDHID1_3, NULL);
1532 gpio_request(GPIO_FN_SDHID1_2, NULL);
1533 gpio_request(GPIO_FN_SDHID1_1, NULL);
1534 gpio_request(GPIO_FN_SDHID1_0, NULL);
41491b9a 1535#endif
6dff7da2
YG
1536 /* card detect pin for MMC slot (CN7) */
1537 gpio_request(GPIO_PORT41, NULL);
1538 gpio_direction_input(GPIO_PORT41);
1539
1540 /* enable SDHI2 */
1541 gpio_request(GPIO_FN_SDHICMD2, NULL);
1542 gpio_request(GPIO_FN_SDHICLK2, NULL);
1543 gpio_request(GPIO_FN_SDHID2_3, NULL);
1544 gpio_request(GPIO_FN_SDHID2_2, NULL);
1545 gpio_request(GPIO_FN_SDHID2_1, NULL);
1546 gpio_request(GPIO_FN_SDHID2_0, NULL);
1547
da5d1f4c
YG
1548 /* card detect pin for microSD slot (CN23) */
1549 gpio_request(GPIO_PORT162, NULL);
1550 gpio_direction_input(GPIO_PORT162);
1551
41491b9a
YG
1552 /* MMCIF */
1553 gpio_request(GPIO_FN_MMCD0_0, NULL);
1554 gpio_request(GPIO_FN_MMCD0_1, NULL);
1555 gpio_request(GPIO_FN_MMCD0_2, NULL);
1556 gpio_request(GPIO_FN_MMCD0_3, NULL);
1557 gpio_request(GPIO_FN_MMCD0_4, NULL);
1558 gpio_request(GPIO_FN_MMCD0_5, NULL);
1559 gpio_request(GPIO_FN_MMCD0_6, NULL);
1560 gpio_request(GPIO_FN_MMCD0_7, NULL);
1561 gpio_request(GPIO_FN_MMCCMD0, NULL);
1562 gpio_request(GPIO_FN_MMCCLK0, NULL);
1563
2aab52e8
BH
1564 /* FLCTL */
1565 gpio_request(GPIO_FN_D0_NAF0, NULL);
1566 gpio_request(GPIO_FN_D1_NAF1, NULL);
1567 gpio_request(GPIO_FN_D2_NAF2, NULL);
1568 gpio_request(GPIO_FN_D3_NAF3, NULL);
1569 gpio_request(GPIO_FN_D4_NAF4, NULL);
1570 gpio_request(GPIO_FN_D5_NAF5, NULL);
1571 gpio_request(GPIO_FN_D6_NAF6, NULL);
1572 gpio_request(GPIO_FN_D7_NAF7, NULL);
1573 gpio_request(GPIO_FN_D8_NAF8, NULL);
1574 gpio_request(GPIO_FN_D9_NAF9, NULL);
1575 gpio_request(GPIO_FN_D10_NAF10, NULL);
1576 gpio_request(GPIO_FN_D11_NAF11, NULL);
1577 gpio_request(GPIO_FN_D12_NAF12, NULL);
1578 gpio_request(GPIO_FN_D13_NAF13, NULL);
1579 gpio_request(GPIO_FN_D14_NAF14, NULL);
1580 gpio_request(GPIO_FN_D15_NAF15, NULL);
1581 gpio_request(GPIO_FN_FCE0, NULL);
1582 gpio_request(GPIO_FN_WE0_FWE, NULL);
1583 gpio_request(GPIO_FN_FRB, NULL);
1584 gpio_request(GPIO_FN_A4_FOE, NULL);
1585 gpio_request(GPIO_FN_A5_FCDE, NULL);
1586 gpio_request(GPIO_FN_RD_FSC, NULL);
1587
56e78daf
YG
1588 /* enable GPS module (GT-720F) */
1589 gpio_request(GPIO_FN_SCIFA2_TXD1, NULL);
1590 gpio_request(GPIO_FN_SCIFA2_RXD1, NULL);
1591
ae37c8de
MD
1592 /* CEU */
1593 gpio_request(GPIO_FN_VIO_CLK, NULL);
1594 gpio_request(GPIO_FN_VIO_VD, NULL);
1595 gpio_request(GPIO_FN_VIO_HD, NULL);
1596 gpio_request(GPIO_FN_VIO_FIELD, NULL);
1597 gpio_request(GPIO_FN_VIO_CKO, NULL);
1598 gpio_request(GPIO_FN_VIO_D7, NULL);
1599 gpio_request(GPIO_FN_VIO_D6, NULL);
1600 gpio_request(GPIO_FN_VIO_D5, NULL);
1601 gpio_request(GPIO_FN_VIO_D4, NULL);
1602 gpio_request(GPIO_FN_VIO_D3, NULL);
1603 gpio_request(GPIO_FN_VIO_D2, NULL);
1604 gpio_request(GPIO_FN_VIO_D1, NULL);
1605 gpio_request(GPIO_FN_VIO_D0, NULL);
1606
12c4309b
KM
1607 /* HDMI */
1608 gpio_request(GPIO_FN_HDMI_HPD, NULL);
1609 gpio_request(GPIO_FN_HDMI_CEC, NULL);
1610
1611 /* Reset HDMI, must be held at least one EXTALR (32768Hz) period */
1612 srcr4 = __raw_readl(SRCR4);
1613 __raw_writel(srcr4 | (1 << 13), SRCR4);
1614 udelay(50);
1615 __raw_writel(srcr4 & ~(1 << 13), SRCR4);
1616
1a44d72a
KM
1617 i2c_register_board_info(0, i2c0_devices,
1618 ARRAY_SIZE(i2c0_devices));
80f1dc7c
TS
1619 i2c_register_board_info(1, i2c1_devices,
1620 ARRAY_SIZE(i2c1_devices));
11fee467 1621
920adc75
KM
1622 sh7372_add_standard_devices();
1623
1624 platform_add_devices(mackerel_devices, ARRAY_SIZE(mackerel_devices));
2ce51f8b 1625
aa7541fd
KM
1626 rmobile_add_device_to_domain(&sh7372_pd_a4lc, &lcdc_device);
1627 rmobile_add_device_to_domain(&sh7372_pd_a4lc, &hdmi_lcdc_device);
1628 rmobile_add_device_to_domain(&sh7372_pd_a4lc, &meram_device);
1629 rmobile_add_device_to_domain(&sh7372_pd_a4mp, &fsi_device);
1630 rmobile_add_device_to_domain(&sh7372_pd_a3sp, &usbhs0_device);
1631 rmobile_add_device_to_domain(&sh7372_pd_a3sp, &usbhs1_device);
1632 rmobile_add_device_to_domain(&sh7372_pd_a3sp, &nand_flash_device);
1633 rmobile_add_device_to_domain(&sh7372_pd_a3sp, &sh_mmcif_device);
1634 rmobile_add_device_to_domain(&sh7372_pd_a3sp, &sdhi0_device);
d93f5cde 1635#if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
aa7541fd 1636 rmobile_add_device_to_domain(&sh7372_pd_a3sp, &sdhi1_device);
d93f5cde 1637#endif
aa7541fd
KM
1638 rmobile_add_device_to_domain(&sh7372_pd_a3sp, &sdhi2_device);
1639 rmobile_add_device_to_domain(&sh7372_pd_a4r, &ceu_device);
e3e01091 1640
2ce51f8b 1641 hdmi_init_pm_clock();
97991657 1642 sh7372_pm_init();
a41b6466 1643 pm_clk_add(&fsi_device.dev, "spu2");
5c3f96b2 1644 pm_clk_add(&hdmi_lcdc_device.dev, "hdmi");
920adc75
KM
1645}
1646
920adc75 1647MACHINE_START(MACKEREL, "mackerel")
426f1af9 1648 .map_io = sh7372_map_io,
5d7220ec 1649 .init_early = sh7372_add_early_devices,
920adc75 1650 .init_irq = sh7372_init_irq,
863b1719 1651 .handle_irq = shmobile_handle_irq_intc,
920adc75 1652 .init_machine = mackerel_init,
21cc1b7e 1653 .init_late = shmobile_init_late,
17254bff 1654 .timer = &shmobile_timer,
920adc75 1655MACHINE_END