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7f627f03 MD |
1 | /* |
2 | * Emma Mobile EV2 processor support | |
3 | * | |
4 | * Copyright (C) 2012 Magnus Damm | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; version 2 of the License. | |
9 | * | |
10 | * This program is distributed in the hope that it will be useful, | |
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | * GNU General Public License for more details. | |
14 | * | |
15 | * You should have received a copy of the GNU General Public License | |
16 | * along with this program; if not, write to the Free Software | |
17 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | |
18 | */ | |
19 | #include <linux/kernel.h> | |
20 | #include <linux/init.h> | |
21 | #include <linux/interrupt.h> | |
22 | #include <linux/irq.h> | |
23 | #include <linux/platform_device.h> | |
088efd92 | 24 | #include <linux/platform_data/gpio-em.h> |
3d5de271 | 25 | #include <linux/of_platform.h> |
7f627f03 MD |
26 | #include <linux/delay.h> |
27 | #include <linux/input.h> | |
28 | #include <linux/io.h> | |
520f7bd7 | 29 | #include <linux/irqchip/arm-gic.h> |
7f627f03 MD |
30 | #include <mach/common.h> |
31 | #include <mach/emev2.h> | |
32 | #include <mach/irqs.h> | |
33 | #include <asm/mach-types.h> | |
34 | #include <asm/mach/arch.h> | |
35 | #include <asm/mach/map.h> | |
36 | #include <asm/mach/time.h> | |
7f627f03 | 37 | |
bd5a875d MD |
38 | static struct map_desc emev2_io_desc[] __initdata = { |
39 | #ifdef CONFIG_SMP | |
bd5a875d MD |
40 | /* 2M mapping for SCU + L2 controller */ |
41 | { | |
42 | .virtual = 0xf0000000, | |
43 | .pfn = __phys_to_pfn(0x1e000000), | |
44 | .length = SZ_2M, | |
45 | .type = MT_DEVICE | |
46 | }, | |
47 | #endif | |
48 | }; | |
49 | ||
50 | void __init emev2_map_io(void) | |
51 | { | |
52 | iotable_init(emev2_io_desc, ARRAY_SIZE(emev2_io_desc)); | |
53 | } | |
54 | ||
7f627f03 MD |
55 | /* UART */ |
56 | static struct resource uart0_resources[] = { | |
210e179d MD |
57 | DEFINE_RES_MEM(0xe1020000, 0x38), |
58 | DEFINE_RES_IRQ(40), | |
7f627f03 MD |
59 | }; |
60 | ||
61 | static struct resource uart1_resources[] = { | |
210e179d MD |
62 | DEFINE_RES_MEM(0xe1030000, 0x38), |
63 | DEFINE_RES_IRQ(41), | |
7f627f03 MD |
64 | }; |
65 | ||
66 | static struct resource uart2_resources[] = { | |
210e179d MD |
67 | DEFINE_RES_MEM(0xe1040000, 0x38), |
68 | DEFINE_RES_IRQ(42), | |
7f627f03 MD |
69 | }; |
70 | ||
71 | static struct resource uart3_resources[] = { | |
210e179d MD |
72 | DEFINE_RES_MEM(0xe1050000, 0x38), |
73 | DEFINE_RES_IRQ(43), | |
7f627f03 MD |
74 | }; |
75 | ||
210e179d MD |
76 | #define emev2_register_uart(idx) \ |
77 | platform_device_register_simple("serial8250-em", idx, \ | |
78 | uart##idx##_resources, \ | |
79 | ARRAY_SIZE(uart##idx##_resources)) | |
7f627f03 MD |
80 | |
81 | /* STI */ | |
82 | static struct resource sti_resources[] = { | |
210e179d MD |
83 | DEFINE_RES_MEM(0xe0180000, 0x54), |
84 | DEFINE_RES_IRQ(157), | |
7f627f03 MD |
85 | }; |
86 | ||
210e179d MD |
87 | #define emev2_register_sti() \ |
88 | platform_device_register_simple("em_sti", 0, \ | |
89 | sti_resources, \ | |
90 | ARRAY_SIZE(sti_resources)) | |
088efd92 MD |
91 | |
92 | /* GIO */ | |
93 | static struct gpio_em_config gio0_config = { | |
94 | .gpio_base = 0, | |
95 | .irq_base = EMEV2_GPIO_IRQ(0), | |
96 | .number_of_pins = 32, | |
97 | }; | |
98 | ||
99 | static struct resource gio0_resources[] = { | |
210e179d MD |
100 | DEFINE_RES_MEM(0xe0050000, 0x2c), |
101 | DEFINE_RES_MEM(0xe0050040, 0x20), | |
102 | DEFINE_RES_IRQ(99), | |
103 | DEFINE_RES_IRQ(100), | |
088efd92 MD |
104 | }; |
105 | ||
106 | static struct gpio_em_config gio1_config = { | |
107 | .gpio_base = 32, | |
108 | .irq_base = EMEV2_GPIO_IRQ(32), | |
109 | .number_of_pins = 32, | |
110 | }; | |
111 | ||
112 | static struct resource gio1_resources[] = { | |
210e179d MD |
113 | DEFINE_RES_MEM(0xe0050080, 0x2c), |
114 | DEFINE_RES_MEM(0xe00500c0, 0x20), | |
115 | DEFINE_RES_IRQ(101), | |
116 | DEFINE_RES_IRQ(102), | |
088efd92 MD |
117 | }; |
118 | ||
119 | static struct gpio_em_config gio2_config = { | |
120 | .gpio_base = 64, | |
121 | .irq_base = EMEV2_GPIO_IRQ(64), | |
122 | .number_of_pins = 32, | |
123 | }; | |
124 | ||
125 | static struct resource gio2_resources[] = { | |
210e179d MD |
126 | DEFINE_RES_MEM(0xe0050100, 0x2c), |
127 | DEFINE_RES_MEM(0xe0050140, 0x20), | |
128 | DEFINE_RES_IRQ(103), | |
129 | DEFINE_RES_IRQ(104), | |
088efd92 MD |
130 | }; |
131 | ||
132 | static struct gpio_em_config gio3_config = { | |
133 | .gpio_base = 96, | |
134 | .irq_base = EMEV2_GPIO_IRQ(96), | |
135 | .number_of_pins = 32, | |
136 | }; | |
137 | ||
138 | static struct resource gio3_resources[] = { | |
210e179d MD |
139 | DEFINE_RES_MEM(0xe0050180, 0x2c), |
140 | DEFINE_RES_MEM(0xe00501c0, 0x20), | |
141 | DEFINE_RES_IRQ(105), | |
142 | DEFINE_RES_IRQ(106), | |
088efd92 MD |
143 | }; |
144 | ||
145 | static struct gpio_em_config gio4_config = { | |
146 | .gpio_base = 128, | |
147 | .irq_base = EMEV2_GPIO_IRQ(128), | |
148 | .number_of_pins = 31, | |
149 | }; | |
150 | ||
151 | static struct resource gio4_resources[] = { | |
210e179d MD |
152 | DEFINE_RES_MEM(0xe0050200, 0x2c), |
153 | DEFINE_RES_MEM(0xe0050240, 0x20), | |
154 | DEFINE_RES_IRQ(107), | |
155 | DEFINE_RES_IRQ(108), | |
088efd92 MD |
156 | }; |
157 | ||
210e179d MD |
158 | #define emev2_register_gio(idx) \ |
159 | platform_device_register_resndata(&platform_bus, "em_gio", \ | |
160 | idx, gio##idx##_resources, \ | |
161 | ARRAY_SIZE(gio##idx##_resources), \ | |
162 | &gio##idx##_config, \ | |
163 | sizeof(struct gpio_em_config)) | |
088efd92 | 164 | |
e433d444 | 165 | static struct resource pmu_resources[] = { |
210e179d MD |
166 | DEFINE_RES_IRQ(152), |
167 | DEFINE_RES_IRQ(153), | |
e433d444 TK |
168 | }; |
169 | ||
210e179d MD |
170 | #define emev2_register_pmu() \ |
171 | platform_device_register_simple("arm-pmu", -1, \ | |
172 | pmu_resources, \ | |
173 | ARRAY_SIZE(pmu_resources)) | |
7f627f03 MD |
174 | |
175 | void __init emev2_add_standard_devices(void) | |
176 | { | |
cbc60e7c MD |
177 | if (!IS_ENABLED(CONFIG_COMMON_CLK)) |
178 | emev2_clock_init(); | |
7f627f03 | 179 | |
210e179d MD |
180 | emev2_register_uart(0); |
181 | emev2_register_uart(1); | |
182 | emev2_register_uart(2); | |
183 | emev2_register_uart(3); | |
184 | emev2_register_sti(); | |
185 | emev2_register_gio(0); | |
186 | emev2_register_gio(1); | |
187 | emev2_register_gio(2); | |
188 | emev2_register_gio(3); | |
189 | emev2_register_gio(4); | |
190 | emev2_register_pmu(); | |
7f627f03 MD |
191 | } |
192 | ||
4146fa88 | 193 | void __init emev2_init_delay(void) |
7f627f03 MD |
194 | { |
195 | shmobile_setup_delay(533, 1, 3); /* Cortex-A9 @ 533MHz */ | |
3d5de271 MD |
196 | } |
197 | ||
3d5de271 | 198 | #ifdef CONFIG_USE_OF |
3d5de271 | 199 | |
3d5de271 MD |
200 | static const char *emev2_boards_compat_dt[] __initdata = { |
201 | "renesas,emev2", | |
202 | NULL, | |
203 | }; | |
204 | ||
3d5de271 | 205 | DT_MACHINE_START(EMEV2_DT, "Generic Emma Mobile EV2 (Flattened Device Tree)") |
a62580e5 | 206 | .smp = smp_ops(emev2_smp_ops), |
0ea2b538 | 207 | .map_io = emev2_map_io, |
3d5de271 | 208 | .init_early = emev2_init_delay, |
3d5de271 MD |
209 | .dt_compat = emev2_boards_compat_dt, |
210 | MACHINE_END | |
211 | ||
212 | #endif /* CONFIG_USE_OF */ |