projects / mirror_ubuntu-artful-kernel.git / blame
| Commit | Line | Data |
|---|---|---|
| f411fade MD |
1 | /* |
| 2 | * r8a7779 processor support | |
| 3 | * | |
| dace48d0 | 4 | * Copyright (C) 2011, 2013 Renesas Solutions Corp. |
| f411fade | 5 | * Copyright (C) 2011 Magnus Damm |
| dace48d0 | 6 | * Copyright (C) 2013 Cogent Embedded, Inc. |
| f411fade MD |
7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify | |
| 9 | * it under the terms of the GNU General Public License as published by | |
| 10 | * the Free Software Foundation; version 2 of the License. | |
| 11 | * | |
| 12 | * This program is distributed in the hope that it will be useful, | |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 15 | * GNU General Public License for more details. | |
| f411fade | 16 | */ |
| f411fade | 17 | #include <linux/init.h> |
| f411fade | 18 | #include <linux/irq.h> |
| 5b3859d7 KM |
19 | #include <linux/irqchip.h> |
| 20 | #include <linux/irqchip/arm-gic.h> | |
| 1b55353c | 21 | |
| f411fade | 22 | #include <asm/mach/arch.h> |
| 3e353b87 | 23 | #include <asm/mach/map.h> |
| 1b55353c | 24 | |
| fd44aa5e | 25 | #include "common.h" |
| 1b55353c | 26 | #include "r8a7779.h" |
| 3e353b87 MD |
27 | |
| 28 | static struct map_desc r8a7779_io_desc[] __initdata = { | |
| 3e940958 | 29 | /* 2M identity mapping for 0xf0000000 (MPCORE) */ |
| 3e353b87 MD |
30 | { |
| 31 | .virtual = 0xf0000000, | |
| 32 | .pfn = __phys_to_pfn(0xf0000000), | |
| 33 | .length = SZ_2M, | |
| 34 | .type = MT_DEVICE_NONSHARED | |
| 35 | }, | |
| 3e940958 | 36 | /* 16M identity mapping for 0xfexxxxxx (DMAC-S/HPBREG/INTC2/LRAM/DBSC) */ |
| 3e353b87 MD |
37 | { |
| 38 | .virtual = 0xfe000000, | |
| 39 | .pfn = __phys_to_pfn(0xfe000000), | |
| 40 | .length = SZ_16M, | |
| 41 | .type = MT_DEVICE_NONSHARED | |
| 42 | }, | |
| 43 | }; | |
| 44 | ||
| c99cd90d | 45 | static void __init r8a7779_map_io(void) |
| 3e353b87 | 46 | { |
| 7a2071c5 | 47 | debug_ll_io_init(); |
| 3e353b87 MD |
48 | iotable_init(r8a7779_io_desc, ARRAY_SIZE(r8a7779_io_desc)); |
| 49 | } | |
| f411fade | 50 | |
| 5b3859d7 KM |
51 | /* IRQ */ |
| 52 | #define INT2SMSKCR0 IOMEM(0xfe7822a0) | |
| 53 | #define INT2SMSKCR1 IOMEM(0xfe7822a4) | |
| 54 | #define INT2SMSKCR2 IOMEM(0xfe7822a8) | |
| 55 | #define INT2SMSKCR3 IOMEM(0xfe7822ac) | |
| 56 | #define INT2SMSKCR4 IOMEM(0xfe7822b0) | |
| 57 | ||
| 58 | #define INT2NTSR0 IOMEM(0xfe700060) | |
| 59 | #define INT2NTSR1 IOMEM(0xfe700064) | |
| 60 | ||
| c99cd90d | 61 | static void __init r8a7779_init_irq_dt(void) |
| 31e4e292 | 62 | { |
| 5b3859d7 | 63 | irqchip_init(); |
| c99cd90d | 64 | |
| 5b3859d7 KM |
65 | /* route all interrupts to ARM */ |
| 66 | __raw_writel(0xffffffff, INT2NTSR0); | |
| 67 | __raw_writel(0x3fffffff, INT2NTSR1); | |
| 68 | ||
| 69 | /* unmask all known interrupts in INTCS2 */ | |
| 70 | __raw_writel(0xfffffff0, INT2SMSKCR0); | |
| 71 | __raw_writel(0xfff7ffff, INT2SMSKCR1); | |
| 72 | __raw_writel(0xfffbffdf, INT2SMSKCR2); | |
| 73 | __raw_writel(0xbffffffc, INT2SMSKCR3); | |
| 74 | __raw_writel(0x003fee3f, INT2SMSKCR4); | |
| 75 | } | |
| 76 | ||
| 19c233b7 | 77 | static const char *const r8a7779_compat_dt[] __initconst = { |
| 10e8d4f6 SH |
78 | "renesas,r8a7779", |
| 79 | NULL, | |
| 80 | }; | |
| 81 | ||
| abe0e14b | 82 | DT_MACHINE_START(R8A7779_DT, "Generic R8A7779 (Flattened Device Tree)") |
| 44ade5ed | 83 | .smp = smp_ops(r8a7779_smp_ops), |
| 10e8d4f6 | 84 | .map_io = r8a7779_map_io, |
| 0157b626 | 85 | .init_early = shmobile_init_delay, |
| 10e8d4f6 | 86 | .init_irq = r8a7779_init_irq_dt, |
| d5b00b90 | 87 | .init_late = shmobile_init_late, |
| 10e8d4f6 SH |
88 | .dt_compat = r8a7779_compat_dt, |
| 89 | MACHINE_END |