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Commit | Line | Data |
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c44e182e | 1 | // SPDX-License-Identifier: GPL-2.0 |
f411fade MD |
2 | /* |
3 | * r8a7779 processor support | |
4 | * | |
dace48d0 | 5 | * Copyright (C) 2011, 2013 Renesas Solutions Corp. |
f411fade | 6 | * Copyright (C) 2011 Magnus Damm |
dace48d0 | 7 | * Copyright (C) 2013 Cogent Embedded, Inc. |
f411fade | 8 | */ |
f411fade | 9 | #include <linux/init.h> |
5b3859d7 | 10 | #include <linux/irqchip.h> |
1b55353c | 11 | |
f411fade | 12 | #include <asm/mach/arch.h> |
3e353b87 | 13 | #include <asm/mach/map.h> |
1b55353c | 14 | |
fd44aa5e | 15 | #include "common.h" |
1b55353c | 16 | #include "r8a7779.h" |
3e353b87 | 17 | |
caf67a93 GU |
18 | #define HPBREG_BASE 0xfe700000 |
19 | ||
5b3859d7 | 20 | /* IRQ */ |
caf67a93 GU |
21 | #define INT2SMSKCR0 0x822a0 /* Interrupt Submask Clear Register 0 */ |
22 | #define INT2SMSKCR1 0x822a4 /* Interrupt Submask Clear Register 1 */ | |
23 | #define INT2SMSKCR2 0x822a8 /* Interrupt Submask Clear Register 2 */ | |
24 | #define INT2SMSKCR3 0x822ac /* Interrupt Submask Clear Register 3 */ | |
25 | #define INT2SMSKCR4 0x822b0 /* Interrupt Submask Clear Register 4 */ | |
5b3859d7 | 26 | |
caf67a93 GU |
27 | #define INT2NTSR0 0x00060 /* Interrupt Notification Select Register 0 */ |
28 | #define INT2NTSR1 0x00064 /* Interrupt Notification Select Register 1 */ | |
5b3859d7 | 29 | |
c99cd90d | 30 | static void __init r8a7779_init_irq_dt(void) |
31e4e292 | 31 | { |
caf67a93 GU |
32 | void __iomem *base = ioremap(HPBREG_BASE, 0x00100000); |
33 | ||
5b3859d7 | 34 | irqchip_init(); |
c99cd90d | 35 | |
5b3859d7 | 36 | /* route all interrupts to ARM */ |
d4a617c9 GU |
37 | writel(0xffffffff, base + INT2NTSR0); |
38 | writel(0x3fffffff, base + INT2NTSR1); | |
5b3859d7 KM |
39 | |
40 | /* unmask all known interrupts in INTCS2 */ | |
d4a617c9 GU |
41 | writel(0xfffffff0, base + INT2SMSKCR0); |
42 | writel(0xfff7ffff, base + INT2SMSKCR1); | |
43 | writel(0xfffbffdf, base + INT2SMSKCR2); | |
44 | writel(0xbffffffc, base + INT2SMSKCR3); | |
45 | writel(0x003fee3f, base + INT2SMSKCR4); | |
caf67a93 GU |
46 | |
47 | iounmap(base); | |
5b3859d7 KM |
48 | } |
49 | ||
19c233b7 | 50 | static const char *const r8a7779_compat_dt[] __initconst = { |
10e8d4f6 SH |
51 | "renesas,r8a7779", |
52 | NULL, | |
53 | }; | |
54 | ||
abe0e14b | 55 | DT_MACHINE_START(R8A7779_DT, "Generic R8A7779 (Flattened Device Tree)") |
44ade5ed | 56 | .smp = smp_ops(r8a7779_smp_ops), |
10e8d4f6 | 57 | .init_irq = r8a7779_init_irq_dt, |
d5b00b90 | 58 | .init_late = shmobile_init_late, |
10e8d4f6 SH |
59 | .dt_compat = r8a7779_compat_dt, |
60 | MACHINE_END |