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f411fade MD |
1 | /* |
2 | * r8a7779 processor support | |
3 | * | |
4 | * Copyright (C) 2011 Renesas Solutions Corp. | |
5 | * Copyright (C) 2011 Magnus Damm | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License as published by | |
9 | * the Free Software Foundation; version 2 of the License. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program; if not, write to the Free Software | |
18 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | |
19 | */ | |
20 | #include <linux/kernel.h> | |
21 | #include <linux/init.h> | |
22 | #include <linux/interrupt.h> | |
23 | #include <linux/irq.h> | |
10e8d4f6 | 24 | #include <linux/of_platform.h> |
f411fade MD |
25 | #include <linux/platform_device.h> |
26 | #include <linux/delay.h> | |
27 | #include <linux/input.h> | |
28 | #include <linux/io.h> | |
29 | #include <linux/serial_sci.h> | |
30 | #include <linux/sh_intc.h> | |
31 | #include <linux/sh_timer.h> | |
32 | #include <mach/hardware.h> | |
250a2723 | 33 | #include <mach/irqs.h> |
f411fade | 34 | #include <mach/r8a7779.h> |
a662c082 | 35 | #include <mach/common.h> |
f411fade MD |
36 | #include <asm/mach-types.h> |
37 | #include <asm/mach/arch.h> | |
df27a2d8 | 38 | #include <asm/mach/time.h> |
3e353b87 | 39 | #include <asm/mach/map.h> |
8bac13f5 | 40 | #include <asm/hardware/cache-l2x0.h> |
3e353b87 MD |
41 | |
42 | static struct map_desc r8a7779_io_desc[] __initdata = { | |
43 | /* 2M entity map for 0xf0000000 (MPCORE) */ | |
44 | { | |
45 | .virtual = 0xf0000000, | |
46 | .pfn = __phys_to_pfn(0xf0000000), | |
47 | .length = SZ_2M, | |
48 | .type = MT_DEVICE_NONSHARED | |
49 | }, | |
50 | /* 16M entity map for 0xfexxxxxx (DMAC-S/HPBREG/INTC2/LRAM/DBSC) */ | |
51 | { | |
52 | .virtual = 0xfe000000, | |
53 | .pfn = __phys_to_pfn(0xfe000000), | |
54 | .length = SZ_16M, | |
55 | .type = MT_DEVICE_NONSHARED | |
56 | }, | |
57 | }; | |
58 | ||
59 | void __init r8a7779_map_io(void) | |
60 | { | |
61 | iotable_init(r8a7779_io_desc, ARRAY_SIZE(r8a7779_io_desc)); | |
62 | } | |
f411fade | 63 | |
8b6edf36 LP |
64 | static struct resource r8a7779_pfc_resources[] = { |
65 | [0] = { | |
66 | .start = 0xfffc0000, | |
67 | .end = 0xfffc023b, | |
68 | .flags = IORESOURCE_MEM, | |
69 | }, | |
70 | [1] = { | |
71 | .start = 0xffc40000, | |
72 | .end = 0xffc46fff, | |
73 | .flags = IORESOURCE_MEM, | |
74 | } | |
75 | }; | |
76 | ||
77 | static struct platform_device r8a7779_pfc_device = { | |
78 | .name = "pfc-r8a7779", | |
79 | .id = -1, | |
80 | .resource = r8a7779_pfc_resources, | |
81 | .num_resources = ARRAY_SIZE(r8a7779_pfc_resources), | |
82 | }; | |
83 | ||
84 | void __init r8a7779_pinmux_init(void) | |
85 | { | |
86 | platform_device_register(&r8a7779_pfc_device); | |
87 | } | |
88 | ||
f411fade MD |
89 | static struct plat_sci_port scif0_platform_data = { |
90 | .mapbase = 0xffe40000, | |
91 | .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, | |
92 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, | |
93 | .scbrr_algo_id = SCBRR_ALGO_2, | |
94 | .type = PORT_SCIF, | |
ff8de98d | 95 | .irqs = SCIx_IRQ_MUXED(gic_spi(88)), |
f411fade MD |
96 | }; |
97 | ||
98 | static struct platform_device scif0_device = { | |
99 | .name = "sh-sci", | |
100 | .id = 0, | |
101 | .dev = { | |
102 | .platform_data = &scif0_platform_data, | |
103 | }, | |
104 | }; | |
105 | ||
106 | static struct plat_sci_port scif1_platform_data = { | |
107 | .mapbase = 0xffe41000, | |
108 | .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, | |
109 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, | |
110 | .scbrr_algo_id = SCBRR_ALGO_2, | |
111 | .type = PORT_SCIF, | |
ff8de98d | 112 | .irqs = SCIx_IRQ_MUXED(gic_spi(89)), |
f411fade MD |
113 | }; |
114 | ||
115 | static struct platform_device scif1_device = { | |
116 | .name = "sh-sci", | |
117 | .id = 1, | |
118 | .dev = { | |
119 | .platform_data = &scif1_platform_data, | |
120 | }, | |
121 | }; | |
122 | ||
123 | static struct plat_sci_port scif2_platform_data = { | |
124 | .mapbase = 0xffe42000, | |
125 | .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, | |
126 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, | |
127 | .scbrr_algo_id = SCBRR_ALGO_2, | |
128 | .type = PORT_SCIF, | |
ff8de98d | 129 | .irqs = SCIx_IRQ_MUXED(gic_spi(90)), |
f411fade MD |
130 | }; |
131 | ||
132 | static struct platform_device scif2_device = { | |
133 | .name = "sh-sci", | |
134 | .id = 2, | |
135 | .dev = { | |
136 | .platform_data = &scif2_platform_data, | |
137 | }, | |
138 | }; | |
139 | ||
140 | static struct plat_sci_port scif3_platform_data = { | |
141 | .mapbase = 0xffe43000, | |
142 | .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, | |
143 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, | |
144 | .scbrr_algo_id = SCBRR_ALGO_2, | |
145 | .type = PORT_SCIF, | |
ff8de98d | 146 | .irqs = SCIx_IRQ_MUXED(gic_spi(91)), |
f411fade MD |
147 | }; |
148 | ||
149 | static struct platform_device scif3_device = { | |
150 | .name = "sh-sci", | |
151 | .id = 3, | |
152 | .dev = { | |
153 | .platform_data = &scif3_platform_data, | |
154 | }, | |
155 | }; | |
156 | ||
157 | static struct plat_sci_port scif4_platform_data = { | |
158 | .mapbase = 0xffe44000, | |
159 | .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, | |
160 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, | |
161 | .scbrr_algo_id = SCBRR_ALGO_2, | |
162 | .type = PORT_SCIF, | |
ff8de98d | 163 | .irqs = SCIx_IRQ_MUXED(gic_spi(92)), |
f411fade MD |
164 | }; |
165 | ||
166 | static struct platform_device scif4_device = { | |
167 | .name = "sh-sci", | |
168 | .id = 4, | |
169 | .dev = { | |
170 | .platform_data = &scif4_platform_data, | |
171 | }, | |
172 | }; | |
173 | ||
174 | static struct plat_sci_port scif5_platform_data = { | |
175 | .mapbase = 0xffe45000, | |
176 | .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, | |
177 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, | |
178 | .scbrr_algo_id = SCBRR_ALGO_2, | |
179 | .type = PORT_SCIF, | |
ff8de98d | 180 | .irqs = SCIx_IRQ_MUXED(gic_spi(93)), |
f411fade MD |
181 | }; |
182 | ||
183 | static struct platform_device scif5_device = { | |
184 | .name = "sh-sci", | |
185 | .id = 5, | |
186 | .dev = { | |
187 | .platform_data = &scif5_platform_data, | |
188 | }, | |
189 | }; | |
190 | ||
191 | /* TMU */ | |
192 | static struct sh_timer_config tmu00_platform_data = { | |
193 | .name = "TMU00", | |
194 | .channel_offset = 0x4, | |
195 | .timer_bit = 0, | |
196 | .clockevent_rating = 200, | |
197 | }; | |
198 | ||
199 | static struct resource tmu00_resources[] = { | |
200 | [0] = { | |
201 | .name = "TMU00", | |
202 | .start = 0xffd80008, | |
203 | .end = 0xffd80013, | |
204 | .flags = IORESOURCE_MEM, | |
205 | }, | |
206 | [1] = { | |
207 | .start = gic_spi(32), | |
208 | .flags = IORESOURCE_IRQ, | |
209 | }, | |
210 | }; | |
211 | ||
212 | static struct platform_device tmu00_device = { | |
213 | .name = "sh_tmu", | |
214 | .id = 0, | |
215 | .dev = { | |
216 | .platform_data = &tmu00_platform_data, | |
217 | }, | |
218 | .resource = tmu00_resources, | |
219 | .num_resources = ARRAY_SIZE(tmu00_resources), | |
220 | }; | |
221 | ||
222 | static struct sh_timer_config tmu01_platform_data = { | |
223 | .name = "TMU01", | |
224 | .channel_offset = 0x10, | |
225 | .timer_bit = 1, | |
226 | .clocksource_rating = 200, | |
227 | }; | |
228 | ||
229 | static struct resource tmu01_resources[] = { | |
230 | [0] = { | |
231 | .name = "TMU01", | |
232 | .start = 0xffd80014, | |
233 | .end = 0xffd8001f, | |
234 | .flags = IORESOURCE_MEM, | |
235 | }, | |
236 | [1] = { | |
237 | .start = gic_spi(33), | |
238 | .flags = IORESOURCE_IRQ, | |
239 | }, | |
240 | }; | |
241 | ||
242 | static struct platform_device tmu01_device = { | |
243 | .name = "sh_tmu", | |
244 | .id = 1, | |
245 | .dev = { | |
246 | .platform_data = &tmu01_platform_data, | |
247 | }, | |
248 | .resource = tmu01_resources, | |
249 | .num_resources = ARRAY_SIZE(tmu01_resources), | |
250 | }; | |
251 | ||
ccc2a27b KM |
252 | /* I2C */ |
253 | static struct resource rcar_i2c0_res[] = { | |
254 | { | |
255 | .start = 0xffc70000, | |
256 | .end = 0xffc70fff, | |
257 | .flags = IORESOURCE_MEM, | |
258 | }, { | |
259 | .start = gic_spi(79), | |
260 | .flags = IORESOURCE_IRQ, | |
261 | }, | |
262 | }; | |
263 | ||
264 | static struct platform_device i2c0_device = { | |
265 | .name = "i2c-rcar", | |
266 | .id = 0, | |
267 | .resource = rcar_i2c0_res, | |
268 | .num_resources = ARRAY_SIZE(rcar_i2c0_res), | |
269 | }; | |
270 | ||
271 | static struct resource rcar_i2c1_res[] = { | |
272 | { | |
273 | .start = 0xffc71000, | |
274 | .end = 0xffc71fff, | |
275 | .flags = IORESOURCE_MEM, | |
276 | }, { | |
277 | .start = gic_spi(82), | |
278 | .flags = IORESOURCE_IRQ, | |
279 | }, | |
280 | }; | |
281 | ||
282 | static struct platform_device i2c1_device = { | |
283 | .name = "i2c-rcar", | |
284 | .id = 1, | |
285 | .resource = rcar_i2c1_res, | |
286 | .num_resources = ARRAY_SIZE(rcar_i2c1_res), | |
287 | }; | |
288 | ||
289 | static struct resource rcar_i2c2_res[] = { | |
290 | { | |
291 | .start = 0xffc72000, | |
292 | .end = 0xffc72fff, | |
293 | .flags = IORESOURCE_MEM, | |
294 | }, { | |
295 | .start = gic_spi(80), | |
296 | .flags = IORESOURCE_IRQ, | |
297 | }, | |
298 | }; | |
299 | ||
300 | static struct platform_device i2c2_device = { | |
301 | .name = "i2c-rcar", | |
302 | .id = 2, | |
303 | .resource = rcar_i2c2_res, | |
304 | .num_resources = ARRAY_SIZE(rcar_i2c2_res), | |
305 | }; | |
306 | ||
307 | static struct resource rcar_i2c3_res[] = { | |
308 | { | |
309 | .start = 0xffc73000, | |
310 | .end = 0xffc73fff, | |
311 | .flags = IORESOURCE_MEM, | |
312 | }, { | |
313 | .start = gic_spi(81), | |
314 | .flags = IORESOURCE_IRQ, | |
315 | }, | |
316 | }; | |
317 | ||
318 | static struct platform_device i2c3_device = { | |
319 | .name = "i2c-rcar", | |
320 | .id = 3, | |
321 | .resource = rcar_i2c3_res, | |
322 | .num_resources = ARRAY_SIZE(rcar_i2c3_res), | |
323 | }; | |
324 | ||
916ddc35 | 325 | static struct platform_device *r8a7779_devices_dt[] __initdata = { |
f411fade MD |
326 | &scif0_device, |
327 | &scif1_device, | |
328 | &scif2_device, | |
329 | &scif3_device, | |
330 | &scif4_device, | |
331 | &scif5_device, | |
332 | &tmu00_device, | |
333 | &tmu01_device, | |
10e8d4f6 SH |
334 | }; |
335 | ||
e7921202 | 336 | static struct platform_device *r8a7779_late_devices[] __initdata = { |
ccc2a27b KM |
337 | &i2c0_device, |
338 | &i2c1_device, | |
339 | &i2c2_device, | |
340 | &i2c3_device, | |
f411fade MD |
341 | }; |
342 | ||
f411fade MD |
343 | void __init r8a7779_add_standard_devices(void) |
344 | { | |
8bac13f5 MD |
345 | #ifdef CONFIG_CACHE_L2X0 |
346 | /* Early BRESP enable, Shared attribute override enable, 64K*16way */ | |
ed7d132a | 347 | l2x0_init(IOMEM(0xf0100000), 0x40470000, 0x82000fff); |
8bac13f5 | 348 | #endif |
a662c082 MD |
349 | r8a7779_pm_init(); |
350 | ||
45e5ca57 | 351 | r8a7779_init_pm_domains(); |
a662c082 | 352 | |
916ddc35 SH |
353 | platform_add_devices(r8a7779_devices_dt, |
354 | ARRAY_SIZE(r8a7779_devices_dt)); | |
e7921202 SH |
355 | platform_add_devices(r8a7779_late_devices, |
356 | ARRAY_SIZE(r8a7779_late_devices)); | |
f411fade MD |
357 | } |
358 | ||
b759bd11 MD |
359 | /* do nothing for !CONFIG_SMP or !CONFIG_HAVE_TWD */ |
360 | void __init __weak r8a7779_register_twd(void) { } | |
361 | ||
6bb27d73 | 362 | void __init r8a7779_earlytimer_init(void) |
df27a2d8 MD |
363 | { |
364 | r8a7779_clock_init(); | |
365 | shmobile_earlytimer_init(); | |
b759bd11 | 366 | r8a7779_register_twd(); |
df27a2d8 MD |
367 | } |
368 | ||
f411fade MD |
369 | void __init r8a7779_add_early_devices(void) |
370 | { | |
916ddc35 SH |
371 | early_platform_add_devices(r8a7779_devices_dt, |
372 | ARRAY_SIZE(r8a7779_devices_dt)); | |
3e353b87 MD |
373 | |
374 | /* Early serial console setup is not included here due to | |
375 | * memory map collisions. The SCIF serial ports in r8a7779 | |
376 | * are difficult to entity map 1:1 due to collision with the | |
377 | * virtual memory range used by the coherent DMA code on ARM. | |
378 | * | |
379 | * Anyone wanting to debug early can remove UPF_IOREMAP from | |
380 | * the sh-sci serial console platform data, adjust mapbase | |
381 | * to a static M:N virt:phys mapping that needs to be added to | |
382 | * the mappings passed with iotable_init() above. | |
383 | * | |
384 | * Then add a call to shmobile_setup_console() from this function. | |
385 | * | |
386 | * As a final step pass earlyprint=sh-sci.2,115200 on the kernel | |
387 | * command line in case of the marzen board. | |
388 | */ | |
f411fade | 389 | } |
10e8d4f6 SH |
390 | |
391 | #ifdef CONFIG_USE_OF | |
916ddc35 | 392 | void __init r8a7779_init_delay(void) |
10e8d4f6 SH |
393 | { |
394 | shmobile_setup_delay(1000, 2, 4); /* Cortex-A9 @ 1000MHz */ | |
10e8d4f6 SH |
395 | } |
396 | ||
397 | static const struct of_dev_auxdata r8a7779_auxdata_lookup[] __initconst = { | |
398 | {}, | |
399 | }; | |
400 | ||
401 | void __init r8a7779_add_standard_devices_dt(void) | |
402 | { | |
403 | /* clocks are setup late during boot in the case of DT */ | |
404 | r8a7779_clock_init(); | |
405 | ||
916ddc35 SH |
406 | platform_add_devices(r8a7779_devices_dt, |
407 | ARRAY_SIZE(r8a7779_devices_dt)); | |
10e8d4f6 SH |
408 | of_platform_populate(NULL, of_default_bus_match_table, |
409 | r8a7779_auxdata_lookup, NULL); | |
410 | } | |
411 | ||
412 | static const char *r8a7779_compat_dt[] __initdata = { | |
413 | "renesas,r8a7779", | |
414 | NULL, | |
415 | }; | |
416 | ||
abe0e14b | 417 | DT_MACHINE_START(R8A7779_DT, "Generic R8A7779 (Flattened Device Tree)") |
10e8d4f6 | 418 | .map_io = r8a7779_map_io, |
916ddc35 | 419 | .init_early = r8a7779_init_delay, |
10e8d4f6 SH |
420 | .nr_irqs = NR_IRQS_LEGACY, |
421 | .init_irq = r8a7779_init_irq_dt, | |
422 | .init_machine = r8a7779_add_standard_devices_dt, | |
423 | .init_time = shmobile_timer_init, | |
424 | .dt_compat = r8a7779_compat_dt, | |
425 | MACHINE_END | |
426 | #endif /* CONFIG_USE_OF */ |