projects / mirror_ubuntu-eoan-kernel.git / blame
| Commit | Line | Data |
|---|---|---|
| e024c3d5 | 1 | /* |
| d42799b7 | 2 | * SPEAr3xx/6xx Machine family specific definition |
| e024c3d5 | 3 | * |
| d42799b7 | 4 | * Copyright (C) 2009,2012 ST Microelectronics |
| e024c3d5 | 5 | * Rajeev Kumar<rajeev-dlh.kumar@st.com> |
| da89947b | 6 | * Viresh Kumar <vireshk@kernel.org> |
| e024c3d5 VK |
7 | * |
| 8 | * This file is licensed under the terms of the GNU General Public | |
| 9 | * License version 2. This program is licensed "as is" without any | |
| 10 | * warranty of any kind, whether express or implied. | |
| 11 | */ | |
| 12 | ||
| d42799b7 AB |
13 | #ifndef __MACH_SPEAR_H |
| 14 | #define __MACH_SPEAR_H | |
| e024c3d5 | 15 | |
| 981a95d3 | 16 | #include <asm/memory.h> |
| e024c3d5 | 17 | |
| 0ec05c3e AB |
18 | #if defined(CONFIG_ARCH_SPEAR3XX) || defined (CONFIG_ARCH_SPEAR6XX) |
| 19 | ||
| e024c3d5 | 20 | /* ICM1 - Low speed connection */ |
| d42799b7 | 21 | #define SPEAR_ICM1_2_BASE UL(0xD0000000) |
| d9909ebe | 22 | #define VA_SPEAR_ICM1_2_BASE IOMEM(0xFD000000) |
| d42799b7 | 23 | #define SPEAR_ICM1_UART_BASE UL(0xD0000000) |
| d9909ebe | 24 | #define VA_SPEAR_ICM1_UART_BASE (VA_SPEAR_ICM1_2_BASE - SPEAR_ICM1_2_BASE + SPEAR_ICM1_UART_BASE) |
| d42799b7 | 25 | #define SPEAR3XX_ICM1_SSP_BASE UL(0xD0100000) |
| e024c3d5 VK |
26 | |
| 27 | /* ML-1, 2 - Multi Layer CPU Subsystem */ | |
| d42799b7 | 28 | #define SPEAR_ICM3_ML1_2_BASE UL(0xF0000000) |
| d9909ebe | 29 | #define VA_SPEAR6XX_ML_CPU_BASE IOMEM(0xF0000000) |
| e024c3d5 VK |
30 | |
| 31 | /* ICM3 - Basic Subsystem */ | |
| d42799b7 | 32 | #define SPEAR_ICM3_SMI_CTRL_BASE UL(0xFC000000) |
| d9909ebe | 33 | #define VA_SPEAR_ICM3_SMI_CTRL_BASE IOMEM(0xFC000000) |
| d42799b7 AB |
34 | #define SPEAR_ICM3_DMA_BASE UL(0xFC400000) |
| 35 | #define SPEAR_ICM3_SYS_CTRL_BASE UL(0xFCA00000) | |
| d9909ebe | 36 | #define VA_SPEAR_ICM3_SYS_CTRL_BASE (VA_SPEAR_ICM3_SMI_CTRL_BASE - SPEAR_ICM3_SMI_CTRL_BASE + SPEAR_ICM3_SYS_CTRL_BASE) |
| d42799b7 | 37 | #define SPEAR_ICM3_MISC_REG_BASE UL(0xFCA80000) |
| d9909ebe | 38 | #define VA_SPEAR_ICM3_MISC_REG_BASE (VA_SPEAR_ICM3_SMI_CTRL_BASE - SPEAR_ICM3_SMI_CTRL_BASE + SPEAR_ICM3_MISC_REG_BASE) |
| e024c3d5 VK |
39 | |
| 40 | /* Debug uart for linux, will be used for debug and uncompress messages */ | |
| d42799b7 | 41 | #define SPEAR_DBG_UART_BASE SPEAR_ICM1_UART_BASE |
| e024c3d5 VK |
42 | |
| 43 | /* Sysctl base for spear platform */ | |
| d42799b7 AB |
44 | #define SPEAR_SYS_CTRL_BASE SPEAR_ICM3_SYS_CTRL_BASE |
| 45 | #define VA_SPEAR_SYS_CTRL_BASE VA_SPEAR_ICM3_SYS_CTRL_BASE | |
| d9909ebe | 46 | #endif /* SPEAR3xx || SPEAR6XX */ |
| d42799b7 AB |
47 | |
| 48 | /* SPEAr320 Macros */ | |
| 49 | #define SPEAR320_SOC_CONFIG_BASE UL(0xB3000000) | |
| d9909ebe | 50 | #define VA_SPEAR320_SOC_CONFIG_BASE IOMEM(0xFE000000) |
| 0ec05c3e AB |
51 | |
| 52 | #ifdef CONFIG_ARCH_SPEAR13XX | |
| 53 | ||
| 54 | #define PERIP_GRP2_BASE UL(0xB3000000) | |
| 36c5c90d | 55 | #define VA_PERIP_GRP2_BASE IOMEM(0xF9000000) |
| 0ec05c3e AB |
56 | #define MCIF_SDHCI_BASE UL(0xB3000000) |
| 57 | #define SYSRAM0_BASE UL(0xB3800000) | |
| 36c5c90d | 58 | #define VA_SYSRAM0_BASE IOMEM(0xF9800000) |
| 0ec05c3e AB |
59 | #define SYS_LOCATION (VA_SYSRAM0_BASE + 0x600) |
| 60 | ||
| 61 | #define PERIP_GRP1_BASE UL(0xE0000000) | |
| 62 | #define VA_PERIP_GRP1_BASE IOMEM(0xFD000000) | |
| 63 | #define UART_BASE UL(0xE0000000) | |
| 64 | #define VA_UART_BASE IOMEM(0xFD000000) | |
| 65 | #define SSP_BASE UL(0xE0100000) | |
| 66 | #define MISC_BASE UL(0xE0700000) | |
| 67 | #define VA_MISC_BASE IOMEM(0xFD700000) | |
| 68 | ||
| 69 | #define A9SM_AND_MPMC_BASE UL(0xEC000000) | |
| 70 | #define VA_A9SM_AND_MPMC_BASE IOMEM(0xFC000000) | |
| 71 | ||
| d9909ebe AB |
72 | #define SPEAR1310_RAS_BASE UL(0xD8400000) |
| 73 | #define VA_SPEAR1310_RAS_BASE IOMEM(UL(0xFA400000)) | |
| 74 | ||
| 0ec05c3e AB |
75 | /* A9SM peripheral offsets */ |
| 76 | #define A9SM_PERIP_BASE UL(0xEC800000) | |
| 77 | #define VA_A9SM_PERIP_BASE IOMEM(0xFC800000) | |
| 78 | #define VA_SCU_BASE (VA_A9SM_PERIP_BASE + 0x00) | |
| 79 | ||
| 80 | #define L2CC_BASE UL(0xED000000) | |
| 81 | #define VA_L2CC_BASE IOMEM(UL(0xFB000000)) | |
| 82 | ||
| 83 | /* others */ | |
| 0ec05c3e AB |
84 | #define MCIF_CF_BASE UL(0xB2800000) |
| 85 | ||
| 86 | /* Debug uart for linux, will be used for debug and uncompress messages */ | |
| 87 | #define SPEAR_DBG_UART_BASE UART_BASE | |
| 0ec05c3e AB |
88 | |
| 89 | #endif /* SPEAR13XX */ | |
| d42799b7 AB |
90 | |
| 91 | #endif /* __MACH_SPEAR_H */ |