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e3978dc7 VK |
1 | /* |
2 | * arch/arm/mach-spear13xx/spear13xx.c | |
3 | * | |
4 | * SPEAr13XX machines common source file | |
5 | * | |
6 | * Copyright (C) 2012 ST Microelectronics | |
10d8935f | 7 | * Viresh Kumar <viresh.linux@gmail.com> |
e3978dc7 VK |
8 | * |
9 | * This file is licensed under the terms of the GNU General Public | |
10 | * License version 2. This program is licensed "as is" without any | |
11 | * warranty of any kind, whether express or implied. | |
12 | */ | |
13 | ||
14 | #define pr_fmt(fmt) "SPEAr13xx: " fmt | |
15 | ||
16 | #include <linux/amba/pl022.h> | |
17 | #include <linux/clk.h> | |
18 | #include <linux/dw_dmac.h> | |
19 | #include <linux/err.h> | |
20 | #include <linux/of_irq.h> | |
21 | #include <asm/hardware/cache-l2x0.h> | |
22 | #include <asm/hardware/gic.h> | |
23 | #include <asm/mach/map.h> | |
24 | #include <asm/smp_twd.h> | |
25 | #include <mach/dma.h> | |
26 | #include <mach/generic.h> | |
27 | #include <mach/spear.h> | |
28 | ||
29 | /* common dw_dma filter routine to be used by peripherals */ | |
30 | bool dw_dma_filter(struct dma_chan *chan, void *slave) | |
31 | { | |
32 | struct dw_dma_slave *dws = (struct dw_dma_slave *)slave; | |
33 | ||
34 | if (chan->device->dev == dws->dma_dev) { | |
35 | chan->private = slave; | |
36 | return true; | |
37 | } else { | |
38 | return false; | |
39 | } | |
40 | } | |
41 | ||
42 | /* ssp device registration */ | |
43 | static struct dw_dma_slave ssp_dma_param[] = { | |
44 | { | |
45 | /* Tx */ | |
46 | .cfg_hi = DWC_CFGH_DST_PER(DMA_REQ_SSP0_TX), | |
47 | .cfg_lo = 0, | |
48 | .src_master = DMA_MASTER_MEMORY, | |
49 | .dst_master = DMA_MASTER_SSP0, | |
50 | }, { | |
51 | /* Rx */ | |
52 | .cfg_hi = DWC_CFGH_SRC_PER(DMA_REQ_SSP0_RX), | |
53 | .cfg_lo = 0, | |
54 | .src_master = DMA_MASTER_SSP0, | |
55 | .dst_master = DMA_MASTER_MEMORY, | |
56 | } | |
57 | }; | |
58 | ||
59 | struct pl022_ssp_controller pl022_plat_data = { | |
e3978dc7 VK |
60 | .enable_dma = 1, |
61 | .dma_filter = dw_dma_filter, | |
62 | .dma_rx_param = &ssp_dma_param[1], | |
63 | .dma_tx_param = &ssp_dma_param[0], | |
e3978dc7 VK |
64 | }; |
65 | ||
66 | /* CF device registration */ | |
67 | struct dw_dma_slave cf_dma_priv = { | |
68 | .cfg_hi = 0, | |
69 | .cfg_lo = 0, | |
70 | .src_master = 0, | |
71 | .dst_master = 0, | |
72 | }; | |
73 | ||
74 | /* dmac device registeration */ | |
75 | struct dw_dma_platform_data dmac_plat_data = { | |
76 | .nr_channels = 8, | |
77 | .chan_allocation_order = CHAN_ALLOCATION_DESCENDING, | |
78 | .chan_priority = CHAN_PRIORITY_DESCENDING, | |
4a63a8b3 | 79 | .block_size = 4095U, |
a0982004 AS |
80 | .nr_masters = 2, |
81 | .data_width = { 3, 3, 0, 0 }, | |
e3978dc7 VK |
82 | }; |
83 | ||
84 | void __init spear13xx_l2x0_init(void) | |
85 | { | |
86 | /* | |
87 | * 512KB (64KB/way), 8-way associativity, parity supported | |
88 | * | |
89 | * FIXME: 9th bit, of Auxillary Controller register must be set | |
90 | * for some spear13xx devices for stable L2 operation. | |
91 | * | |
92 | * Enable Early BRESP, L2 prefetch for Instruction and Data, | |
93 | * write alloc and 'Full line of zero' options | |
94 | * | |
95 | */ | |
96 | ||
97 | writel_relaxed(0x06, VA_L2CC_BASE + L2X0_PREFETCH_CTRL); | |
98 | ||
99 | /* | |
100 | * Program following latencies in order to make | |
101 | * SPEAr1340 work at 600 MHz | |
102 | */ | |
103 | writel_relaxed(0x221, VA_L2CC_BASE + L2X0_TAG_LATENCY_CTRL); | |
104 | writel_relaxed(0x441, VA_L2CC_BASE + L2X0_DATA_LATENCY_CTRL); | |
105 | l2x0_init(VA_L2CC_BASE, 0x70A60001, 0xfe00ffff); | |
106 | } | |
107 | ||
108 | /* | |
109 | * Following will create 16MB static virtual/physical mappings | |
110 | * PHYSICAL VIRTUAL | |
111 | * 0xB3000000 0xFE000000 | |
112 | * 0xE0000000 0xFD000000 | |
113 | * 0xEC000000 0xFC000000 | |
114 | * 0xED000000 0xFB000000 | |
115 | */ | |
116 | struct map_desc spear13xx_io_desc[] __initdata = { | |
117 | { | |
009a01e3 | 118 | .virtual = (unsigned long)VA_PERIP_GRP2_BASE, |
e3978dc7 VK |
119 | .pfn = __phys_to_pfn(PERIP_GRP2_BASE), |
120 | .length = SZ_16M, | |
121 | .type = MT_DEVICE | |
122 | }, { | |
009a01e3 | 123 | .virtual = (unsigned long)VA_PERIP_GRP1_BASE, |
e3978dc7 VK |
124 | .pfn = __phys_to_pfn(PERIP_GRP1_BASE), |
125 | .length = SZ_16M, | |
126 | .type = MT_DEVICE | |
127 | }, { | |
009a01e3 | 128 | .virtual = (unsigned long)VA_A9SM_AND_MPMC_BASE, |
e3978dc7 VK |
129 | .pfn = __phys_to_pfn(A9SM_AND_MPMC_BASE), |
130 | .length = SZ_16M, | |
131 | .type = MT_DEVICE | |
132 | }, { | |
133 | .virtual = (unsigned long)VA_L2CC_BASE, | |
134 | .pfn = __phys_to_pfn(L2CC_BASE), | |
135 | .length = SZ_4K, | |
136 | .type = MT_DEVICE | |
137 | }, | |
138 | }; | |
139 | ||
140 | /* This will create static memory mapping for selected devices */ | |
141 | void __init spear13xx_map_io(void) | |
142 | { | |
143 | iotable_init(spear13xx_io_desc, ARRAY_SIZE(spear13xx_io_desc)); | |
144 | } | |
145 | ||
146 | static void __init spear13xx_clk_init(void) | |
147 | { | |
148 | if (of_machine_is_compatible("st,spear1310")) | |
149 | spear1310_clk_init(); | |
150 | else if (of_machine_is_compatible("st,spear1340")) | |
151 | spear1340_clk_init(); | |
152 | else | |
153 | pr_err("%s: Unknown machine\n", __func__); | |
154 | } | |
155 | ||
6bb27d73 | 156 | void __init spear13xx_timer_init(void) |
e3978dc7 VK |
157 | { |
158 | char pclk_name[] = "osc_24m_clk"; | |
159 | struct clk *gpt_clk, *pclk; | |
160 | ||
161 | spear13xx_clk_init(); | |
162 | ||
163 | /* get the system timer clock */ | |
164 | gpt_clk = clk_get_sys("gpt0", NULL); | |
165 | if (IS_ERR(gpt_clk)) { | |
166 | pr_err("%s:couldn't get clk for gpt\n", __func__); | |
167 | BUG(); | |
168 | } | |
169 | ||
170 | /* get the suitable parent clock for timer*/ | |
171 | pclk = clk_get(NULL, pclk_name); | |
172 | if (IS_ERR(pclk)) { | |
173 | pr_err("%s:couldn't get %s as parent for gpt\n", __func__, | |
174 | pclk_name); | |
175 | BUG(); | |
176 | } | |
177 | ||
178 | clk_set_parent(gpt_clk, pclk); | |
179 | clk_put(gpt_clk); | |
180 | clk_put(pclk); | |
181 | ||
182 | spear_setup_of_timer(); | |
183 | twd_local_timer_of_register(); | |
184 | } | |
185 | ||
e3978dc7 VK |
186 | static const struct of_device_id gic_of_match[] __initconst = { |
187 | { .compatible = "arm,cortex-a9-gic", .data = gic_of_init }, | |
188 | { /* Sentinel */ } | |
189 | }; | |
190 | ||
191 | void __init spear13xx_dt_init_irq(void) | |
192 | { | |
193 | of_irq_init(gic_of_match); | |
194 | } |