projects / mirror_ubuntu-artful-kernel.git / blame
| Commit | Line | Data |
|---|---|---|
| 3b52634f MR |
1 | /* |
| 2 | * Device Tree support for Allwinner A1X SoCs | |
| 3 | * | |
| 4 | * Copyright (C) 2012 Maxime Ripard | |
| 5 | * | |
| 6 | * Maxime Ripard <maxime.ripard@free-electrons.com> | |
| 7 | * | |
| 8 | * This file is licensed under the terms of the GNU General Public | |
| 9 | * License version 2. This program is licensed "as is" without any | |
| 10 | * warranty of any kind, whether express or implied. | |
| 11 | */ | |
| 12 | ||
| 751b2ac4 MR |
13 | #include <linux/clk-provider.h> |
| 14 | #include <linux/clocksource.h> | |
| d767af5e | 15 | #include <linux/init.h> |
| f91b7c62 | 16 | #include <linux/platform_device.h> |
| 3b52634f | 17 | |
| 3b52634f | 18 | #include <asm/mach/arch.h> |
| bc34b5f2 | 19 | |
| f91b7c62 CYT |
20 | static void __init sunxi_dt_cpufreq_init(void) |
| 21 | { | |
| 22 | platform_device_register_simple("cpufreq-dt", -1, NULL, 0); | |
| 23 | } | |
| 24 | ||
| 3b52634f | 25 | static const char * const sunxi_board_dt_compat[] = { |
| 43880f70 | 26 | "allwinner,sun4i-a10", |
| 81265dfb | 27 | "allwinner,sun5i-a10s", |
| 43880f70 | 28 | "allwinner,sun5i-a13", |
| bef6229f | 29 | "allwinner,sun5i-r8", |
| 3b52634f MR |
30 | NULL, |
| 31 | }; | |
| 32 | ||
| bef6229f | 33 | DT_MACHINE_START(SUNXI_DT, "Allwinner sun4i/sun5i Families") |
| 3b52634f | 34 | .dt_compat = sunxi_board_dt_compat, |
| f91b7c62 | 35 | .init_late = sunxi_dt_cpufreq_init, |
| 3b52634f | 36 | MACHINE_END |
| 91a31977 MR |
37 | |
| 38 | static const char * const sun6i_board_dt_compat[] = { | |
| 39 | "allwinner,sun6i-a31", | |
| b0f2faa5 | 40 | "allwinner,sun6i-a31s", |
| 91a31977 MR |
41 | NULL, |
| 42 | }; | |
| 43 | ||
| 751b2ac4 MR |
44 | extern void __init sun6i_reset_init(void); |
| 45 | static void __init sun6i_timer_init(void) | |
| 46 | { | |
| 47 | of_clk_init(NULL); | |
| e58cf019 AB |
48 | if (IS_ENABLED(CONFIG_RESET_CONTROLLER)) |
| 49 | sun6i_reset_init(); | |
| 751b2ac4 MR |
50 | clocksource_of_init(); |
| 51 | } | |
| 52 | ||
| 91a31977 | 53 | DT_MACHINE_START(SUN6I_DT, "Allwinner sun6i (A31) Family") |
| 751b2ac4 | 54 | .init_time = sun6i_timer_init, |
| 91a31977 | 55 | .dt_compat = sun6i_board_dt_compat, |
| f91b7c62 | 56 | .init_late = sunxi_dt_cpufreq_init, |
| 91a31977 MR |
57 | MACHINE_END |
| 58 | ||
| 59 | static const char * const sun7i_board_dt_compat[] = { | |
| 60 | "allwinner,sun7i-a20", | |
| 61 | NULL, | |
| 62 | }; | |
| 63 | ||
| 64 | DT_MACHINE_START(SUN7I_DT, "Allwinner sun7i (A20) Family") | |
| 91a31977 | 65 | .dt_compat = sun7i_board_dt_compat, |
| f91b7c62 | 66 | .init_late = sunxi_dt_cpufreq_init, |
| 3b52634f | 67 | MACHINE_END |
| ac84b79f CYT |
68 | |
| 69 | static const char * const sun8i_board_dt_compat[] = { | |
| 70 | "allwinner,sun8i-a23", | |
| 159870d2 | 71 | "allwinner,sun8i-a33", |
| 14a882df | 72 | "allwinner,sun8i-h3", |
| ac84b79f CYT |
73 | NULL, |
| 74 | }; | |
| 75 | ||
| 14a882df JK |
76 | DT_MACHINE_START(SUN8I_DT, "Allwinner sun8i Family") |
| 77 | .init_time = sun6i_timer_init, | |
| ac84b79f | 78 | .dt_compat = sun8i_board_dt_compat, |
| f91b7c62 | 79 | .init_late = sunxi_dt_cpufreq_init, |
| ac84b79f | 80 | MACHINE_END |
| 3d4c2f1c CYT |
81 | |
| 82 | static const char * const sun9i_board_dt_compat[] = { | |
| 83 | "allwinner,sun9i-a80", | |
| 84 | NULL, | |
| 85 | }; | |
| 86 | ||
| 87 | DT_MACHINE_START(SUN9I_DT, "Allwinner sun9i Family") | |
| 88 | .dt_compat = sun9i_board_dt_compat, | |
| 89 | MACHINE_END |