]>
Commit | Line | Data |
---|---|---|
7056d423 CC |
1 | /* |
2 | * arch/arm/mach-tegra/cpu-tegra.c | |
3 | * | |
4 | * Copyright (C) 2010 Google, Inc. | |
5 | * | |
6 | * Author: | |
7 | * Colin Cross <ccross@google.com> | |
8 | * Based on arch/arm/plat-omap/cpu-omap.c, (C) 2005 Nokia Corporation | |
9 | * | |
10 | * This software is licensed under the terms of the GNU General Public | |
11 | * License version 2, as published by the Free Software Foundation, and | |
12 | * may be copied, distributed, and modified under those terms. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | */ | |
20 | ||
21 | #include <linux/kernel.h> | |
22 | #include <linux/module.h> | |
23 | #include <linux/types.h> | |
24 | #include <linux/sched.h> | |
25 | #include <linux/cpufreq.h> | |
26 | #include <linux/delay.h> | |
27 | #include <linux/init.h> | |
28 | #include <linux/err.h> | |
29 | #include <linux/clk.h> | |
30 | #include <linux/io.h> | |
1eb2ecf1 | 31 | #include <linux/suspend.h> |
7056d423 | 32 | |
7056d423 | 33 | |
7056d423 CC |
34 | #include <mach/clk.h> |
35 | ||
36 | /* Frequency table index must be sequential starting at 0 */ | |
37 | static struct cpufreq_frequency_table freq_table[] = { | |
1eb2ecf1 CC |
38 | { 0, 216000 }, |
39 | { 1, 312000 }, | |
40 | { 2, 456000 }, | |
41 | { 3, 608000 }, | |
42 | { 4, 760000 }, | |
43 | { 5, 816000 }, | |
44 | { 6, 912000 }, | |
45 | { 7, 1000000 }, | |
46 | { 8, CPUFREQ_TABLE_END }, | |
7056d423 CC |
47 | }; |
48 | ||
49 | #define NUM_CPUS 2 | |
50 | ||
51 | static struct clk *cpu_clk; | |
7a281284 | 52 | static struct clk *emc_clk; |
7056d423 CC |
53 | |
54 | static unsigned long target_cpu_speed[NUM_CPUS]; | |
1eb2ecf1 CC |
55 | static DEFINE_MUTEX(tegra_cpu_lock); |
56 | static bool is_suspended; | |
7056d423 | 57 | |
6686c733 | 58 | static int tegra_verify_speed(struct cpufreq_policy *policy) |
7056d423 CC |
59 | { |
60 | return cpufreq_frequency_table_verify(policy, freq_table); | |
61 | } | |
62 | ||
6686c733 | 63 | static unsigned int tegra_getspeed(unsigned int cpu) |
7056d423 CC |
64 | { |
65 | unsigned long rate; | |
66 | ||
67 | if (cpu >= NUM_CPUS) | |
68 | return 0; | |
69 | ||
70 | rate = clk_get_rate(cpu_clk) / 1000; | |
71 | return rate; | |
72 | } | |
73 | ||
1eb2ecf1 | 74 | static int tegra_update_cpu_speed(unsigned long rate) |
7056d423 | 75 | { |
7056d423 CC |
76 | int ret = 0; |
77 | struct cpufreq_freqs freqs; | |
78 | ||
7056d423 CC |
79 | freqs.old = tegra_getspeed(0); |
80 | freqs.new = rate; | |
81 | ||
82 | if (freqs.old == freqs.new) | |
83 | return ret; | |
84 | ||
7a281284 CC |
85 | /* |
86 | * Vote on memory bus frequency based on cpu frequency | |
87 | * This sets the minimum frequency, display or avp may request higher | |
88 | */ | |
89 | if (rate >= 816000) | |
90 | clk_set_rate(emc_clk, 600000000); /* cpu 816 MHz, emc max */ | |
91 | else if (rate >= 456000) | |
92 | clk_set_rate(emc_clk, 300000000); /* cpu 456 MHz, emc 150Mhz */ | |
93 | else | |
94 | clk_set_rate(emc_clk, 100000000); /* emc 50Mhz */ | |
95 | ||
7056d423 CC |
96 | for_each_online_cpu(freqs.cpu) |
97 | cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); | |
98 | ||
99 | #ifdef CONFIG_CPU_FREQ_DEBUG | |
100 | printk(KERN_DEBUG "cpufreq-tegra: transition: %u --> %u\n", | |
101 | freqs.old, freqs.new); | |
102 | #endif | |
103 | ||
41cfe367 | 104 | ret = clk_set_rate(cpu_clk, freqs.new * 1000); |
7056d423 CC |
105 | if (ret) { |
106 | pr_err("cpu-tegra: Failed to set cpu frequency to %d kHz\n", | |
107 | freqs.new); | |
108 | return ret; | |
109 | } | |
110 | ||
111 | for_each_online_cpu(freqs.cpu) | |
112 | cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); | |
113 | ||
114 | return 0; | |
115 | } | |
116 | ||
1eb2ecf1 CC |
117 | static unsigned long tegra_cpu_highest_speed(void) |
118 | { | |
119 | unsigned long rate = 0; | |
120 | int i; | |
121 | ||
122 | for_each_online_cpu(i) | |
123 | rate = max(rate, target_cpu_speed[i]); | |
124 | return rate; | |
125 | } | |
126 | ||
7056d423 CC |
127 | static int tegra_target(struct cpufreq_policy *policy, |
128 | unsigned int target_freq, | |
129 | unsigned int relation) | |
130 | { | |
fdb684ac | 131 | unsigned int idx; |
7056d423 | 132 | unsigned int freq; |
1eb2ecf1 CC |
133 | int ret = 0; |
134 | ||
135 | mutex_lock(&tegra_cpu_lock); | |
136 | ||
137 | if (is_suspended) { | |
138 | ret = -EBUSY; | |
139 | goto out; | |
140 | } | |
7056d423 CC |
141 | |
142 | cpufreq_frequency_table_target(policy, freq_table, target_freq, | |
143 | relation, &idx); | |
144 | ||
145 | freq = freq_table[idx].frequency; | |
146 | ||
147 | target_cpu_speed[policy->cpu] = freq; | |
148 | ||
1eb2ecf1 CC |
149 | ret = tegra_update_cpu_speed(tegra_cpu_highest_speed()); |
150 | ||
151 | out: | |
152 | mutex_unlock(&tegra_cpu_lock); | |
153 | return ret; | |
7056d423 CC |
154 | } |
155 | ||
1eb2ecf1 CC |
156 | static int tegra_pm_notify(struct notifier_block *nb, unsigned long event, |
157 | void *dummy) | |
158 | { | |
159 | mutex_lock(&tegra_cpu_lock); | |
160 | if (event == PM_SUSPEND_PREPARE) { | |
161 | is_suspended = true; | |
162 | pr_info("Tegra cpufreq suspend: setting frequency to %d kHz\n", | |
163 | freq_table[0].frequency); | |
164 | tegra_update_cpu_speed(freq_table[0].frequency); | |
165 | } else if (event == PM_POST_SUSPEND) { | |
166 | is_suspended = false; | |
167 | } | |
168 | mutex_unlock(&tegra_cpu_lock); | |
169 | ||
170 | return NOTIFY_OK; | |
171 | } | |
172 | ||
173 | static struct notifier_block tegra_cpu_pm_notifier = { | |
174 | .notifier_call = tegra_pm_notify, | |
175 | }; | |
176 | ||
7056d423 CC |
177 | static int tegra_cpu_init(struct cpufreq_policy *policy) |
178 | { | |
179 | if (policy->cpu >= NUM_CPUS) | |
180 | return -EINVAL; | |
181 | ||
182 | cpu_clk = clk_get_sys(NULL, "cpu"); | |
183 | if (IS_ERR(cpu_clk)) | |
184 | return PTR_ERR(cpu_clk); | |
185 | ||
7a281284 CC |
186 | emc_clk = clk_get_sys("cpu", "emc"); |
187 | if (IS_ERR(emc_clk)) { | |
188 | clk_put(cpu_clk); | |
189 | return PTR_ERR(emc_clk); | |
190 | } | |
191 | ||
6a5278d0 PG |
192 | clk_prepare_enable(emc_clk); |
193 | clk_prepare_enable(cpu_clk); | |
89a5fb84 | 194 | |
7056d423 CC |
195 | cpufreq_frequency_table_cpuinfo(policy, freq_table); |
196 | cpufreq_frequency_table_get_attr(freq_table, policy->cpu); | |
197 | policy->cur = tegra_getspeed(policy->cpu); | |
198 | target_cpu_speed[policy->cpu] = policy->cur; | |
199 | ||
200 | /* FIXME: what's the actual transition time? */ | |
201 | policy->cpuinfo.transition_latency = 300 * 1000; | |
202 | ||
203 | policy->shared_type = CPUFREQ_SHARED_TYPE_ALL; | |
204 | cpumask_copy(policy->related_cpus, cpu_possible_mask); | |
205 | ||
1eb2ecf1 CC |
206 | if (policy->cpu == 0) |
207 | register_pm_notifier(&tegra_cpu_pm_notifier); | |
208 | ||
7056d423 CC |
209 | return 0; |
210 | } | |
211 | ||
212 | static int tegra_cpu_exit(struct cpufreq_policy *policy) | |
213 | { | |
214 | cpufreq_frequency_table_cpuinfo(policy, freq_table); | |
6a5278d0 | 215 | clk_disable_unprepare(emc_clk); |
7a281284 | 216 | clk_put(emc_clk); |
7056d423 CC |
217 | clk_put(cpu_clk); |
218 | return 0; | |
219 | } | |
220 | ||
221 | static struct freq_attr *tegra_cpufreq_attr[] = { | |
222 | &cpufreq_freq_attr_scaling_available_freqs, | |
223 | NULL, | |
224 | }; | |
225 | ||
226 | static struct cpufreq_driver tegra_cpufreq_driver = { | |
227 | .verify = tegra_verify_speed, | |
228 | .target = tegra_target, | |
229 | .get = tegra_getspeed, | |
230 | .init = tegra_cpu_init, | |
231 | .exit = tegra_cpu_exit, | |
232 | .name = "tegra", | |
233 | .attr = tegra_cpufreq_attr, | |
234 | }; | |
235 | ||
236 | static int __init tegra_cpufreq_init(void) | |
237 | { | |
238 | return cpufreq_register_driver(&tegra_cpufreq_driver); | |
239 | } | |
240 | ||
241 | static void __exit tegra_cpufreq_exit(void) | |
242 | { | |
243 | cpufreq_unregister_driver(&tegra_cpufreq_driver); | |
244 | } | |
245 | ||
246 | ||
247 | MODULE_AUTHOR("Colin Cross <ccross@android.com>"); | |
248 | MODULE_DESCRIPTION("cpufreq driver for Nvidia Tegra2"); | |
249 | MODULE_LICENSE("GPL"); | |
250 | module_init(tegra_cpufreq_init); | |
251 | module_exit(tegra_cpufreq_exit); |