projects / mirror_ubuntu-jammy-kernel.git / blame
| Commit | Line | Data |
|---|---|---|
| 9c92ab61 | 1 | // SPDX-License-Identifier: GPL-2.0-only |
| 5ad36c5f | 2 | /* |
| 938fa349 | 3 | * Copyright (C) 2011 Google, Inc. |
| 5ad36c5f EG |
4 | * |
| 5 | * Author: | |
| 938fa349 | 6 | * Colin Cross <ccross@android.com> |
| 5ad36c5f | 7 | * |
| e307cc89 | 8 | * Copyright (C) 2010,2013, NVIDIA Corporation |
| 5ad36c5f EG |
9 | */ |
| 10 | ||
| 7e8b15db | 11 | #include <linux/cpu_pm.h> |
| 5ad36c5f | 12 | #include <linux/interrupt.h> |
| 5ad36c5f | 13 | #include <linux/io.h> |
| 520f7bd7 | 14 | #include <linux/irqchip/arm-gic.h> |
| a0524acc TR |
15 | #include <linux/irq.h> |
| 16 | #include <linux/kernel.h> | |
| 17 | #include <linux/of_address.h> | |
| 18 | #include <linux/of.h> | |
| e307cc89 | 19 | #include <linux/syscore_ops.h> |
| 5ad36c5f | 20 | |
| 7741868f DO |
21 | #include <soc/tegra/irq.h> |
| 22 | ||
| 5ad36c5f | 23 | #include "board.h" |
| 2be39c07 | 24 | #include "iomap.h" |
| 5ad36c5f | 25 | |
| d4b92fb2 JL |
26 | #define SGI_MASK 0xFFFF |
| 27 | ||
| e307cc89 | 28 | #ifdef CONFIG_PM_SLEEP |
| 7e8b15db | 29 | static void __iomem *tegra_gic_cpu_base; |
| e307cc89 JL |
30 | #endif |
| 31 | ||
| d4b92fb2 JL |
32 | bool tegra_pending_sgi(void) |
| 33 | { | |
| 34 | u32 pending_set; | |
| 35 | void __iomem *distbase = IO_ADDRESS(TEGRA_ARM_INT_DIST_BASE); | |
| 36 | ||
| 37 | pending_set = readl_relaxed(distbase + GIC_DIST_PENDING_SET); | |
| 38 | ||
| 39 | if (pending_set & SGI_MASK) | |
| 40 | return true; | |
| 41 | ||
| 42 | return false; | |
| 43 | } | |
| 44 | ||
| e307cc89 | 45 | #ifdef CONFIG_PM_SLEEP |
| 7e8b15db JL |
46 | static int tegra_gic_notifier(struct notifier_block *self, |
| 47 | unsigned long cmd, void *v) | |
| 48 | { | |
| 49 | switch (cmd) { | |
| 50 | case CPU_PM_ENTER: | |
| 51 | writel_relaxed(0x1E0, tegra_gic_cpu_base + GIC_CPU_CTRL); | |
| 52 | break; | |
| 53 | } | |
| 54 | ||
| 55 | return NOTIFY_OK; | |
| 56 | } | |
| 57 | ||
| 58 | static struct notifier_block tegra_gic_notifier_block = { | |
| 59 | .notifier_call = tegra_gic_notifier, | |
| 60 | }; | |
| 61 | ||
| 62 | static const struct of_device_id tegra114_dt_gic_match[] __initconst = { | |
| 63 | { .compatible = "arm,cortex-a15-gic" }, | |
| 64 | { } | |
| 65 | }; | |
| 66 | ||
| 4dd201be | 67 | static void __init tegra114_gic_cpu_pm_registration(void) |
| 7e8b15db JL |
68 | { |
| 69 | struct device_node *dn; | |
| 70 | ||
| 71 | dn = of_find_matching_node(NULL, tegra114_dt_gic_match); | |
| 72 | if (!dn) | |
| 73 | return; | |
| 74 | ||
| 75 | tegra_gic_cpu_base = of_iomap(dn, 1); | |
| 76 | ||
| 77 | cpu_pm_register_notifier(&tegra_gic_notifier_block); | |
| 78 | } | |
| e307cc89 | 79 | #else |
| 4dd201be | 80 | static void __init tegra114_gic_cpu_pm_registration(void) { } |
| e307cc89 JL |
81 | #endif |
| 82 | ||
| e9479e0e MZ |
83 | static const struct of_device_id tegra_ictlr_match[] __initconst = { |
| 84 | { .compatible = "nvidia,tegra20-ictlr" }, | |
| 85 | { .compatible = "nvidia,tegra30-ictlr" }, | |
| 86 | { } | |
| 87 | }; | |
| 88 | ||
| 5ad36c5f EG |
89 | void __init tegra_init_irq(void) |
| 90 | { | |
| 1a703bff MZ |
91 | if (WARN_ON(!of_find_matching_node(NULL, tegra_ictlr_match))) |
| 92 | pr_warn("Outdated DT detected, suspend/resume will NOT work\n"); | |
| 938fa349 | 93 | |
| 7e8b15db | 94 | tegra114_gic_cpu_pm_registration(); |
| 460907bc | 95 | } |