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ARM: ux500: Fix build error due to missing include of asm/pmu.h in cpu-db8500.c
[mirror_ubuntu-eoan-kernel.git] / arch / arm / mach-ux500 / board-mop500.c
CommitLineData
ed781d39 1
aa44ef4d
SK
2/*
3 * Copyright (C) 2008-2009 ST-Ericsson
4 *
5 * Author: Srinidhi KASAGAR <srinidhi.kasagar@stericsson.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2, as
9 * published by the Free Software Foundation.
10 *
11 */
12#include <linux/kernel.h>
13#include <linux/init.h>
14#include <linux/interrupt.h>
15#include <linux/platform_device.h>
16#include <linux/io.h>
b8410a15 17#include <linux/i2c.h>
af97bace 18#include <linux/platform_data/i2c-nomadik.h>
ea05a57f 19#include <linux/gpio.h>
aa44ef4d
SK
20#include <linux/amba/bus.h>
21#include <linux/amba/pl022.h>
5d7b8467 22#include <linux/amba/serial.h>
aa44ef4d 23#include <linux/spi/spi.h>
ee66e653 24#include <linux/mfd/abx500/ab8500.h>
79568b94 25#include <linux/regulator/ab8500.h>
20406ebf 26#include <linux/mfd/tc3589x.h>
fe67dfc8 27#include <linux/mfd/tps6105x.h>
ee66e653 28#include <linux/mfd/abx500/ab8500-gpio.h>
f242e50e 29#include <linux/mfd/abx500/ab8500-codec.h>
dd7b2a05 30#include <linux/leds-lp5521.h>
a71b819b 31#include <linux/input.h>
350abe03 32#include <linux/smsc911x.h>
a71b819b 33#include <linux/gpio_keys.h>
1a7d4369 34#include <linux/delay.h>
2d334297
AB
35#include <linux/of.h>
36#include <linux/of_platform.h>
350abe03 37#include <linux/leds.h>
a0980660
LW
38#include <linux/pinctrl/consumer.h>
39
aa44ef4d
SK
40#include <asm/mach-types.h>
41#include <asm/mach/arch.h>
bbf5f385 42#include <asm/hardware/gic.h>
aa44ef4d 43
5d7b8467 44#include <plat/ste_dma40.h>
0f332861 45#include <plat/gpio-nomadik.h>
aa44ef4d
SK
46
47#include <mach/hardware.h>
48#include <mach/setup.h>
9e4e7fe1 49#include <mach/devices.h>
29aeb3cf 50#include <mach/irqs.h>
585d188f 51#include <mach/crypto-ux500.h>
aa44ef4d 52
5d7b8467 53#include "ste-dma40-db8500.h"
fbf1eadf 54#include "devices-db8500.h"
008f8a2f 55#include "board-mop500.h"
a1e516e3 56#include "board-mop500-regulators.h"
c0af14d3 57#include "board-mop500-msp.h"
ea05a57f 58
350abe03
RM
59static struct gpio_led snowball_led_array[] = {
60 {
61 .name = "user_led",
c525f071 62 .default_trigger = "heartbeat",
350abe03
RM
63 .gpio = 142,
64 },
65};
66
67static struct gpio_led_platform_data snowball_led_data = {
68 .leds = snowball_led_array,
69 .num_leds = ARRAY_SIZE(snowball_led_array),
70};
71
72static struct platform_device snowball_led_dev = {
73 .name = "leds-gpio",
74 .dev = {
75 .platform_data = &snowball_led_data,
76 },
77};
78
3ef374a2 79static struct ab8500_gpio_platform_data ab8500_gpio_pdata = {
a1524eeb 80 .gpio_base = MOP500_AB8500_PIN_GPIO(1),
3ef374a2
BB
81 .irq_base = MOP500_AB8500_VIR_GPIO_IRQ_BASE,
82 /* config_reg is the initial configuration of ab8500 pins.
83 * The pins can be configured as GPIO or alt functions based
84 * on value present in GpioSel1 to GpioSel6 and AlternatFunction
85 * register. This is the array of 7 configuration settings.
86 * One has to compile time decide these settings. Below is the
25985edc 87 * explanation of these setting
3ef374a2
BB
88 * GpioSel1 = 0x00 => Pins GPIO1 to GPIO8 are not used as GPIO
89 * GpioSel2 = 0x1E => Pins GPIO10 to GPIO13 are configured as GPIO
90 * GpioSel3 = 0x80 => Pin GPIO24 is configured as GPIO
91 * GpioSel4 = 0x01 => Pin GPIo25 is configured as GPIO
92 * GpioSel5 = 0x7A => Pins GPIO34, GPIO36 to GPIO39 are conf as GPIO
93 * GpioSel6 = 0x00 => Pins GPIO41 & GPIo42 are not configured as GPIO
94 * AlternaFunction = 0x00 => If Pins GPIO10 to 13 are not configured
95 * as GPIO then this register selectes the alternate fucntions
96 */
97 .config_reg = {0x00, 0x1E, 0x80, 0x01,
98 0x7A, 0x00, 0x00},
99};
100
f242e50e
OL
101/* ab8500-codec */
102static struct ab8500_codec_platform_data ab8500_codec_pdata = {
103 .amics = {
104 .mic1_type = AMIC_TYPE_DIFFERENTIAL,
105 .mic2_type = AMIC_TYPE_DIFFERENTIAL,
106 .mic1a_micbias = AMIC_MICBIAS_VAMIC1,
107 .mic1b_micbias = AMIC_MICBIAS_VAMIC1,
108 .mic2_micbias = AMIC_MICBIAS_VAMIC2
109 },
110 .ear_cmv = EAR_CMV_0_95V
111};
112
350abe03
RM
113static struct gpio_keys_button snowball_key_array[] = {
114 {
115 .gpio = 32,
116 .type = EV_KEY,
117 .code = KEY_1,
118 .desc = "userpb",
119 .active_low = 1,
120 .debounce_interval = 50,
121 .wakeup = 1,
122 },
123 {
124 .gpio = 151,
125 .type = EV_KEY,
126 .code = KEY_2,
127 .desc = "extkb1",
128 .active_low = 1,
129 .debounce_interval = 50,
130 .wakeup = 1,
131 },
132 {
133 .gpio = 152,
134 .type = EV_KEY,
135 .code = KEY_3,
136 .desc = "extkb2",
137 .active_low = 1,
138 .debounce_interval = 50,
139 .wakeup = 1,
140 },
141 {
142 .gpio = 161,
143 .type = EV_KEY,
144 .code = KEY_4,
145 .desc = "extkb3",
146 .active_low = 1,
147 .debounce_interval = 50,
148 .wakeup = 1,
149 },
150 {
151 .gpio = 162,
152 .type = EV_KEY,
153 .code = KEY_5,
154 .desc = "extkb4",
155 .active_low = 1,
156 .debounce_interval = 50,
157 .wakeup = 1,
158 },
159};
160
161static struct gpio_keys_platform_data snowball_key_data = {
162 .buttons = snowball_key_array,
163 .nbuttons = ARRAY_SIZE(snowball_key_array),
164};
165
166static struct platform_device snowball_key_dev = {
167 .name = "gpio-keys",
168 .id = -1,
169 .dev = {
170 .platform_data = &snowball_key_data,
171 }
172};
173
174static struct smsc911x_platform_config snowball_sbnet_cfg = {
175 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH,
176 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
177 .flags = SMSC911X_USE_16BIT | SMSC911X_FORCE_INTERNAL_PHY,
178 .shift = 1,
179};
180
181static struct resource sbnet_res[] = {
182 {
183 .name = "smsc911x-memory",
184 .start = (0x5000 << 16),
185 .end = (0x5000 << 16) + 0xffff,
186 .flags = IORESOURCE_MEM,
187 },
188 {
189 .start = NOMADIK_GPIO_TO_IRQ(140),
190 .end = NOMADIK_GPIO_TO_IRQ(140),
191 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
192 },
193};
194
195static struct platform_device snowball_sbnet_dev = {
196 .name = "smsc911x",
197 .num_resources = ARRAY_SIZE(sbnet_res),
198 .resource = sbnet_res,
199 .dev = {
200 .platform_data = &snowball_sbnet_cfg,
201 },
202};
203
39ae702c
RV
204static struct ab8500_platform_data ab8500_platdata = {
205 .irq_base = MOP500_AB8500_IRQ_BASE,
dfa3a824
BJ
206 .regulator_reg_init = ab8500_regulator_reg_init,
207 .num_regulator_reg_init = ARRAY_SIZE(ab8500_regulator_reg_init),
a1e516e3
BJ
208 .regulator = ab8500_regulators,
209 .num_regulator = ARRAY_SIZE(ab8500_regulators),
3ef374a2 210 .gpio = &ab8500_gpio_pdata,
f242e50e 211 .codec = &ab8500_codec_pdata,
39ae702c
RV
212};
213
fe67dfc8
LW
214/*
215 * TPS61052
216 */
217
218static struct tps6105x_platform_data mop500_tps61052_data = {
219 .mode = TPS6105X_MODE_VOLTAGE,
220 .regulator_data = &tps61052_regulator,
221};
222
b8410a15
RV
223/*
224 * TC35892
225 */
226
20406ebf 227static void mop500_tc35892_init(struct tc3589x *tc3589x, unsigned int base)
b8410a15 228{
18403424
LJ
229 struct device *parent = NULL;
230#if 0
231 /* FIXME: Is the sdi actually part of tc3589x? */
232 parent = tc3589x->dev;
233#endif
234 mop500_sdi_tc35892_init(parent);
b8410a15
RV
235}
236
20406ebf 237static struct tc3589x_gpio_platform_data mop500_tc35892_gpio_data = {
b8410a15
RV
238 .gpio_base = MOP500_EGPIO(0),
239 .setup = mop500_tc35892_init,
240};
241
20406ebf 242static struct tc3589x_platform_data mop500_tc35892_data = {
611b7590 243 .block = TC3589x_BLOCK_GPIO,
b8410a15
RV
244 .gpio = &mop500_tc35892_gpio_data,
245 .irq_base = MOP500_EGPIO_IRQ_BASE,
246};
247
dd7b2a05
PL
248static struct lp5521_led_config lp5521_pri_led[] = {
249 [0] = {
250 .chan_nr = 0,
251 .led_current = 0x2f,
252 .max_current = 0x5f,
253 },
254 [1] = {
255 .chan_nr = 1,
256 .led_current = 0x2f,
257 .max_current = 0x5f,
258 },
259 [2] = {
260 .chan_nr = 2,
261 .led_current = 0x2f,
262 .max_current = 0x5f,
263 },
264};
265
266static struct lp5521_platform_data __initdata lp5521_pri_data = {
267 .label = "lp5521_pri",
268 .led_config = &lp5521_pri_led[0],
269 .num_channels = 3,
270 .clock_mode = LP5521_CLOCK_EXT,
271};
272
273static struct lp5521_led_config lp5521_sec_led[] = {
274 [0] = {
275 .chan_nr = 0,
276 .led_current = 0x2f,
277 .max_current = 0x5f,
278 },
279 [1] = {
280 .chan_nr = 1,
281 .led_current = 0x2f,
282 .max_current = 0x5f,
283 },
284 [2] = {
285 .chan_nr = 2,
286 .led_current = 0x2f,
287 .max_current = 0x5f,
288 },
289};
290
291static struct lp5521_platform_data __initdata lp5521_sec_data = {
292 .label = "lp5521_sec",
293 .led_config = &lp5521_sec_led[0],
294 .num_channels = 3,
295 .clock_mode = LP5521_CLOCK_EXT,
296};
297
fe67dfc8 298static struct i2c_board_info __initdata mop500_i2c0_devices[] = {
b8410a15 299 {
20406ebf 300 I2C_BOARD_INFO("tc3589x", 0x42),
dd7b2a05 301 .irq = NOMADIK_GPIO_TO_IRQ(217),
b8410a15
RV
302 .platform_data = &mop500_tc35892_data,
303 },
cf568c58 304 /* I2C0 devices only available prior to HREFv60 */
fe67dfc8
LW
305 {
306 I2C_BOARD_INFO("tps61052", 0x33),
307 .platform_data = &mop500_tps61052_data,
308 },
309};
310
cf568c58
LW
311#define NUM_PRE_V60_I2C0_DEVICES 1
312
dd7b2a05
PL
313static struct i2c_board_info __initdata mop500_i2c2_devices[] = {
314 {
315 /* lp5521 LED driver, 1st device */
316 I2C_BOARD_INFO("lp5521", 0x33),
317 .platform_data = &lp5521_pri_data,
318 },
319 {
320 /* lp5521 LED driver, 2st device */
321 I2C_BOARD_INFO("lp5521", 0x34),
322 .platform_data = &lp5521_sec_data,
323 },
bb3b2187
LJ
324 {
325 /* Light sensor Rohm BH1780GLI */
326 I2C_BOARD_INFO("bh1780", 0x29),
327 },
dd7b2a05
PL
328};
329
18403424 330static void __init mop500_i2c_init(struct device *parent)
fbf1eadf 331{
98582d95
LJ
332 db8500_add_i2c0(parent, NULL);
333 db8500_add_i2c1(parent, NULL);
334 db8500_add_i2c2(parent, NULL);
335 db8500_add_i2c3(parent, NULL);
fbf1eadf 336}
aa44ef4d 337
a71b819b
PL
338static struct gpio_keys_button mop500_gpio_keys[] = {
339 {
340 .desc = "SFH7741 Proximity Sensor",
341 .type = EV_SW,
342 .code = SW_FRONT_PROXIMITY,
a71b819b
PL
343 .active_low = 0,
344 .can_disable = 1,
345 }
346};
347
348static struct regulator *prox_regulator;
349static int mop500_prox_activate(struct device *dev);
350static void mop500_prox_deactivate(struct device *dev);
351
352static struct gpio_keys_platform_data mop500_gpio_keys_data = {
353 .buttons = mop500_gpio_keys,
354 .nbuttons = ARRAY_SIZE(mop500_gpio_keys),
355 .enable = mop500_prox_activate,
356 .disable = mop500_prox_deactivate,
357};
358
359static struct platform_device mop500_gpio_keys_device = {
360 .name = "gpio-keys",
361 .id = 0,
362 .dev = {
363 .platform_data = &mop500_gpio_keys_data,
364 },
365};
366
367static int mop500_prox_activate(struct device *dev)
368{
369 prox_regulator = regulator_get(&mop500_gpio_keys_device.dev,
370 "vcc");
371 if (IS_ERR(prox_regulator)) {
372 dev_err(&mop500_gpio_keys_device.dev,
373 "no regulator\n");
374 return PTR_ERR(prox_regulator);
375 }
376 regulator_enable(prox_regulator);
377 return 0;
378}
379
380static void mop500_prox_deactivate(struct device *dev)
381{
382 regulator_disable(prox_regulator);
383 regulator_put(prox_regulator);
384}
385
585d188f
AW
386static struct cryp_platform_data u8500_cryp1_platform_data = {
387 .mem_to_engine = {
388 .dir = STEDMA40_MEM_TO_PERIPH,
389 .src_dev_type = STEDMA40_DEV_SRC_MEMORY,
390 .dst_dev_type = DB8500_DMA_DEV48_CAC1_TX,
391 .src_info.data_width = STEDMA40_WORD_WIDTH,
392 .dst_info.data_width = STEDMA40_WORD_WIDTH,
393 .mode = STEDMA40_MODE_LOGICAL,
394 .src_info.psize = STEDMA40_PSIZE_LOG_4,
395 .dst_info.psize = STEDMA40_PSIZE_LOG_4,
396 },
397 .engine_to_mem = {
398 .dir = STEDMA40_PERIPH_TO_MEM,
399 .src_dev_type = DB8500_DMA_DEV48_CAC1_RX,
400 .dst_dev_type = STEDMA40_DEV_DST_MEMORY,
401 .src_info.data_width = STEDMA40_WORD_WIDTH,
402 .dst_info.data_width = STEDMA40_WORD_WIDTH,
403 .mode = STEDMA40_MODE_LOGICAL,
404 .src_info.psize = STEDMA40_PSIZE_LOG_4,
405 .dst_info.psize = STEDMA40_PSIZE_LOG_4,
406 }
407};
408
409static struct stedma40_chan_cfg u8500_hash_dma_cfg_tx = {
410 .dir = STEDMA40_MEM_TO_PERIPH,
411 .src_dev_type = STEDMA40_DEV_SRC_MEMORY,
412 .dst_dev_type = DB8500_DMA_DEV50_HAC1_TX,
413 .src_info.data_width = STEDMA40_WORD_WIDTH,
414 .dst_info.data_width = STEDMA40_WORD_WIDTH,
415 .mode = STEDMA40_MODE_LOGICAL,
416 .src_info.psize = STEDMA40_PSIZE_LOG_16,
417 .dst_info.psize = STEDMA40_PSIZE_LOG_16,
418};
419
420static struct hash_platform_data u8500_hash1_platform_data = {
421 .mem_to_engine = &u8500_hash_dma_cfg_tx,
422 .dma_filter = stedma40_filter,
423};
424
d48a41c1 425/* add any platform devices here - TODO */
350abe03 426static struct platform_device *mop500_platform_devs[] __initdata = {
a71b819b 427 &mop500_gpio_keys_device,
d48a41c1
SK
428};
429
5d7b8467
LW
430#ifdef CONFIG_STE_DMA40
431static struct stedma40_chan_cfg ssp0_dma_cfg_rx = {
432 .mode = STEDMA40_MODE_LOGICAL,
433 .dir = STEDMA40_PERIPH_TO_MEM,
434 .src_dev_type = DB8500_DMA_DEV8_SSP0_RX,
435 .dst_dev_type = STEDMA40_DEV_DST_MEMORY,
436 .src_info.data_width = STEDMA40_BYTE_WIDTH,
437 .dst_info.data_width = STEDMA40_BYTE_WIDTH,
438};
439
440static struct stedma40_chan_cfg ssp0_dma_cfg_tx = {
441 .mode = STEDMA40_MODE_LOGICAL,
442 .dir = STEDMA40_MEM_TO_PERIPH,
443 .src_dev_type = STEDMA40_DEV_SRC_MEMORY,
444 .dst_dev_type = DB8500_DMA_DEV8_SSP0_TX,
445 .src_info.data_width = STEDMA40_BYTE_WIDTH,
446 .dst_info.data_width = STEDMA40_BYTE_WIDTH,
447};
448#endif
449
15daf691 450static struct pl022_ssp_controller ssp0_plat = {
5d7b8467
LW
451 .bus_id = 0,
452#ifdef CONFIG_STE_DMA40
453 .enable_dma = 1,
454 .dma_filter = stedma40_filter,
455 .dma_rx_param = &ssp0_dma_cfg_rx,
456 .dma_tx_param = &ssp0_dma_cfg_tx,
457#else
458 .enable_dma = 0,
459#endif
460 /* on this platform, gpio 31,142,144,214 &
461 * 224 are connected as chip selects
462 */
463 .num_chipselect = 5,
464};
465
18403424 466static void __init mop500_spi_init(struct device *parent)
aa44ef4d 467{
15daf691 468 db8500_add_ssp0(parent, &ssp0_plat);
fbf1eadf 469}
aa44ef4d 470
5d7b8467
LW
471#ifdef CONFIG_STE_DMA40
472static struct stedma40_chan_cfg uart0_dma_cfg_rx = {
473 .mode = STEDMA40_MODE_LOGICAL,
474 .dir = STEDMA40_PERIPH_TO_MEM,
475 .src_dev_type = DB8500_DMA_DEV13_UART0_RX,
476 .dst_dev_type = STEDMA40_DEV_DST_MEMORY,
477 .src_info.data_width = STEDMA40_BYTE_WIDTH,
478 .dst_info.data_width = STEDMA40_BYTE_WIDTH,
479};
480
481static struct stedma40_chan_cfg uart0_dma_cfg_tx = {
482 .mode = STEDMA40_MODE_LOGICAL,
483 .dir = STEDMA40_MEM_TO_PERIPH,
484 .src_dev_type = STEDMA40_DEV_SRC_MEMORY,
485 .dst_dev_type = DB8500_DMA_DEV13_UART0_TX,
486 .src_info.data_width = STEDMA40_BYTE_WIDTH,
487 .dst_info.data_width = STEDMA40_BYTE_WIDTH,
488};
489
490static struct stedma40_chan_cfg uart1_dma_cfg_rx = {
491 .mode = STEDMA40_MODE_LOGICAL,
492 .dir = STEDMA40_PERIPH_TO_MEM,
493 .src_dev_type = DB8500_DMA_DEV12_UART1_RX,
494 .dst_dev_type = STEDMA40_DEV_DST_MEMORY,
495 .src_info.data_width = STEDMA40_BYTE_WIDTH,
496 .dst_info.data_width = STEDMA40_BYTE_WIDTH,
497};
498
499static struct stedma40_chan_cfg uart1_dma_cfg_tx = {
500 .mode = STEDMA40_MODE_LOGICAL,
501 .dir = STEDMA40_MEM_TO_PERIPH,
502 .src_dev_type = STEDMA40_DEV_SRC_MEMORY,
503 .dst_dev_type = DB8500_DMA_DEV12_UART1_TX,
504 .src_info.data_width = STEDMA40_BYTE_WIDTH,
505 .dst_info.data_width = STEDMA40_BYTE_WIDTH,
506};
507
508static struct stedma40_chan_cfg uart2_dma_cfg_rx = {
509 .mode = STEDMA40_MODE_LOGICAL,
510 .dir = STEDMA40_PERIPH_TO_MEM,
511 .src_dev_type = DB8500_DMA_DEV11_UART2_RX,
512 .dst_dev_type = STEDMA40_DEV_DST_MEMORY,
513 .src_info.data_width = STEDMA40_BYTE_WIDTH,
514 .dst_info.data_width = STEDMA40_BYTE_WIDTH,
515};
516
517static struct stedma40_chan_cfg uart2_dma_cfg_tx = {
518 .mode = STEDMA40_MODE_LOGICAL,
519 .dir = STEDMA40_MEM_TO_PERIPH,
520 .src_dev_type = STEDMA40_DEV_SRC_MEMORY,
521 .dst_dev_type = DB8500_DMA_DEV11_UART2_TX,
522 .src_info.data_width = STEDMA40_BYTE_WIDTH,
523 .dst_info.data_width = STEDMA40_BYTE_WIDTH,
524};
525#endif
526
1a7d4369
SKS
527#define PRCC_K_SOFTRST_SET 0x18
528#define PRCC_K_SOFTRST_CLEAR 0x1C
529static void ux500_uart0_reset(void)
530{
531 void __iomem *prcc_rst_set, *prcc_rst_clr;
532
533 prcc_rst_set = (void __iomem *)IO_ADDRESS(U8500_CLKRST1_BASE +
534 PRCC_K_SOFTRST_SET);
535 prcc_rst_clr = (void __iomem *)IO_ADDRESS(U8500_CLKRST1_BASE +
536 PRCC_K_SOFTRST_CLEAR);
537
538 /* Activate soft reset PRCC_K_SOFTRST_CLEAR */
539 writel((readl(prcc_rst_clr) | 0x1), prcc_rst_clr);
540 udelay(1);
541
542 /* Release soft reset PRCC_K_SOFTRST_SET */
543 writel((readl(prcc_rst_set) | 0x1), prcc_rst_set);
544 udelay(1);
545}
546
5d7b8467
LW
547static struct amba_pl011_data uart0_plat = {
548#ifdef CONFIG_STE_DMA40
549 .dma_filter = stedma40_filter,
550 .dma_rx_param = &uart0_dma_cfg_rx,
551 .dma_tx_param = &uart0_dma_cfg_tx,
552#endif
1a7d4369 553 .reset = ux500_uart0_reset,
5d7b8467
LW
554};
555
556static struct amba_pl011_data uart1_plat = {
557#ifdef CONFIG_STE_DMA40
558 .dma_filter = stedma40_filter,
559 .dma_rx_param = &uart1_dma_cfg_rx,
560 .dma_tx_param = &uart1_dma_cfg_tx,
561#endif
562};
563
564static struct amba_pl011_data uart2_plat = {
565#ifdef CONFIG_STE_DMA40
566 .dma_filter = stedma40_filter,
567 .dma_rx_param = &uart2_dma_cfg_rx,
568 .dma_tx_param = &uart2_dma_cfg_tx,
569#endif
570};
571
18403424 572static void __init mop500_uart_init(struct device *parent)
fbf1eadf 573{
78d80c5a 574 db8500_add_uart0(parent, &uart0_plat);
18403424
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575 db8500_add_uart1(parent, &uart1_plat);
576 db8500_add_uart2(parent, &uart2_plat);
fbf1eadf
RV
577}
578
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579static void __init u8500_cryp1_hash1_init(struct device *parent)
580{
581 db8500_add_cryp1(parent, &u8500_cryp1_platform_data);
582 db8500_add_hash1(parent, &u8500_hash1_platform_data);
583}
584
350abe03
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585static struct platform_device *snowball_platform_devs[] __initdata = {
586 &snowball_led_dev,
587 &snowball_key_dev,
e6fada59 588 &snowball_sbnet_dev,
350abe03
RM
589};
590
4b4f757c 591static void __init mop500_init_machine(void)
fbf1eadf 592{
18403424 593 struct device *parent = NULL;
cf568c58 594 int i2c0_devs;
b024a0c8 595 int i;
cf568c58 596
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597 mop500_gpio_keys[0].gpio = GPIO_PROX_SENSOR;
598
ed781d39 599 mop500_pinmaps_init();
3a8e39c9 600 parent = u8500_init_devices(&ab8500_platdata);
110c2c2f 601
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602 for (i = 0; i < ARRAY_SIZE(mop500_platform_devs); i++)
603 mop500_platform_devs[i]->dev.parent = parent;
604
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605 platform_add_devices(mop500_platform_devs,
606 ARRAY_SIZE(mop500_platform_devs));
607
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608 mop500_i2c_init(parent);
609 mop500_sdi_init(parent);
610 mop500_spi_init(parent);
c0af14d3 611 mop500_msp_init(parent);
18403424 612 mop500_uart_init(parent);
110c2c2f 613
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614 u8500_cryp1_hash1_init(parent);
615
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616 i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices);
617
618 i2c_register_board_info(0, mop500_i2c0_devices, i2c0_devs);
619 i2c_register_board_info(2, mop500_i2c2_devices,
620 ARRAY_SIZE(mop500_i2c2_devices));
621
622 /* This board has full regulator constraints */
623 regulator_has_full_constraints();
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624
625 mop500_uib_init();
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626}
627
628static void __init snowball_init_machine(void)
629{
18403424 630 struct device *parent = NULL;
b024a0c8 631 int i;
110c2c2f 632
ed781d39 633 snowball_pinmaps_init();
3a8e39c9 634 parent = u8500_init_devices(&ab8500_platdata);
110c2c2f 635
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636 for (i = 0; i < ARRAY_SIZE(snowball_platform_devs); i++)
637 snowball_platform_devs[i]->dev.parent = parent;
638
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639 platform_add_devices(snowball_platform_devs,
640 ARRAY_SIZE(snowball_platform_devs));
641
18403424
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642 mop500_i2c_init(parent);
643 snowball_sdi_init(parent);
644 mop500_spi_init(parent);
c0af14d3 645 mop500_msp_init(parent);
18403424 646 mop500_uart_init(parent);
110c2c2f 647
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648 /* This board has full regulator constraints */
649 regulator_has_full_constraints();
650}
651
652static void __init hrefv60_init_machine(void)
653{
18403424 654 struct device *parent = NULL;
110c2c2f 655 int i2c0_devs;
b024a0c8 656 int i;
110c2c2f 657
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658 /*
659 * The HREFv60 board removed a GPIO expander and routed
660 * all these GPIO pins to the internal GPIO controller
661 * instead.
662 */
110c2c2f 663 mop500_gpio_keys[0].gpio = HREFV60_PROX_SENSE_GPIO;
4b4f757c 664
ed781d39 665 hrefv60_pinmaps_init();
3a8e39c9 666 parent = u8500_init_devices(&ab8500_platdata);
ea05a57f 667
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668 for (i = 0; i < ARRAY_SIZE(mop500_platform_devs); i++)
669 mop500_platform_devs[i]->dev.parent = parent;
670
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671 platform_add_devices(mop500_platform_devs,
672 ARRAY_SIZE(mop500_platform_devs));
d48a41c1 673
18403424
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674 mop500_i2c_init(parent);
675 hrefv60_sdi_init(parent);
676 mop500_spi_init(parent);
c0af14d3 677 mop500_msp_init(parent);
18403424 678 mop500_uart_init(parent);
008f8a2f 679
cf568c58 680 i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices);
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681
682 i2c0_devs -= NUM_PRE_V60_I2C0_DEVICES;
cf568c58
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683
684 i2c_register_board_info(0, mop500_i2c0_devices, i2c0_devs);
dd7b2a05
PL
685 i2c_register_board_info(2, mop500_i2c2_devices,
686 ARRAY_SIZE(mop500_i2c2_devices));
db24520f
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687
688 /* This board has full regulator constraints */
689 regulator_has_full_constraints();
fd6948bb
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690
691 mop500_uib_init();
aa44ef4d
SK
692}
693
694MACHINE_START(U8500, "ST-Ericsson MOP500 platform")
695 /* Maintainer: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> */
bc77b1aa 696 .atag_offset = 0x100,
aa44ef4d 697 .map_io = u8500_map_io,
178980f9 698 .init_irq = ux500_init_irq,
aa44ef4d 699 /* we re-use nomadik timer here */
41ac329f 700 .timer = &ux500_timer,
bbf5f385 701 .handle_irq = gic_handle_irq,
4b4f757c 702 .init_machine = mop500_init_machine,
a010bc2b 703 .init_late = ux500_init_late,
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704MACHINE_END
705
706MACHINE_START(HREFV60, "ST-Ericsson U8500 Platform HREFv60+")
bc77b1aa 707 .atag_offset = 0x100,
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LW
708 .map_io = u8500_map_io,
709 .init_irq = ux500_init_irq,
710 .timer = &ux500_timer,
bbf5f385 711 .handle_irq = gic_handle_irq,
110c2c2f 712 .init_machine = hrefv60_init_machine,
a010bc2b 713 .init_late = ux500_init_late,
aa44ef4d 714MACHINE_END
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715
716MACHINE_START(SNOWBALL, "Calao Systems Snowball platform")
bc77b1aa 717 .atag_offset = 0x100,
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718 .map_io = u8500_map_io,
719 .init_irq = ux500_init_irq,
720 /* we re-use nomadik timer here */
721 .timer = &ux500_timer,
bbf5f385 722 .handle_irq = gic_handle_irq,
110c2c2f 723 .init_machine = snowball_init_machine,
a010bc2b 724 .init_late = ux500_init_late,
350abe03 725MACHINE_END
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726
727#ifdef CONFIG_MACH_UX500_DT
7e0ce270 728
c57920e6
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729static struct platform_device *snowball_of_platform_devs[] __initdata = {
730 &snowball_led_dev,
731 &snowball_key_dev,
732};
733
7e0ce270 734struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = {
513c27f8 735 /* Requires DMA and call-back bindings. */
4905af0e
LJ
736 OF_DEV_AUXDATA("arm,pl011", 0x80120000, "uart0", &uart0_plat),
737 OF_DEV_AUXDATA("arm,pl011", 0x80121000, "uart1", &uart1_plat),
738 OF_DEV_AUXDATA("arm,pl011", 0x80007000, "uart2", &uart2_plat),
513c27f8 739 /* Requires DMA bindings. */
15daf691 740 OF_DEV_AUXDATA("arm,pl022", 0x80002000, "ssp0", &ssp0_plat),
5e1ac7db
LJ
741 OF_DEV_AUXDATA("arm,pl18x", 0x80126000, "sdi0", &mop500_sdi0_data),
742 OF_DEV_AUXDATA("arm,pl18x", 0x80114000, "sdi4", &mop500_sdi4_data),
513c27f8
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743 /* Requires clock name bindings. */
744 OF_DEV_AUXDATA("st,nomadik-gpio", 0x8012e000, "gpio.0", NULL),
745 OF_DEV_AUXDATA("st,nomadik-gpio", 0x8012e080, "gpio.1", NULL),
746 OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e000, "gpio.2", NULL),
747 OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e080, "gpio.3", NULL),
748 OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e100, "gpio.4", NULL),
749 OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e180, "gpio.5", NULL),
750 OF_DEV_AUXDATA("st,nomadik-gpio", 0x8011e000, "gpio.6", NULL),
751 OF_DEV_AUXDATA("st,nomadik-gpio", 0x8011e080, "gpio.7", NULL),
752 OF_DEV_AUXDATA("st,nomadik-gpio", 0xa03fe000, "gpio.8", NULL),
079c61e1
LJ
753 OF_DEV_AUXDATA("st,nomadik-i2c", 0x80004000, "nmk-i2c.0", NULL),
754 OF_DEV_AUXDATA("st,nomadik-i2c", 0x80122000, "nmk-i2c.1", NULL),
755 OF_DEV_AUXDATA("st,nomadik-i2c", 0x80128000, "nmk-i2c.2", NULL),
756 OF_DEV_AUXDATA("st,nomadik-i2c", 0x80110000, "nmk-i2c.3", NULL),
757 OF_DEV_AUXDATA("st,nomadik-i2c", 0x8012a000, "nmk-i2c.4", NULL),
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758 /* Requires device name bindings. */
759 OF_DEV_AUXDATA("stericsson,nmk_pinctrl", 0, "pinctrl-db8500", NULL),
7e0ce270
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760 {},
761};
762
2cfaa62d 763static const struct of_device_id u8500_local_bus_nodes[] = {
7e0ce270
LJ
764 /* only create devices below soc node */
765 { .compatible = "stericsson,db8500", },
48a4ea62 766 { .compatible = "stericsson,db8500-prcmu", },
2cfaa62d 767 { .compatible = "simple-bus"},
7e0ce270
LJ
768 { },
769};
770
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771static void __init u8500_init_machine(void)
772{
7734fed8
AB
773 struct device *parent = NULL;
774 int i2c0_devs;
775 int i;
776
ed781d39
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777 /* Pinmaps must be in place before devices register */
778 if (of_machine_is_compatible("st-ericsson,mop500"))
779 mop500_pinmaps_init();
780 else if (of_machine_is_compatible("calaosystems,snowball-a9500"))
781 snowball_pinmaps_init();
782 else if (of_machine_is_compatible("st-ericsson,hrefv60+"))
783 hrefv60_pinmaps_init();
784
f65c1982 785 parent = u8500_of_init_devices();
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AB
786
787 for (i = 0; i < ARRAY_SIZE(mop500_platform_devs); i++)
788 mop500_platform_devs[i]->dev.parent = parent;
7734fed8 789
7e0ce270 790 /* automatically probe child nodes of db8500 device */
2cfaa62d 791 of_platform_populate(NULL, u8500_local_bus_nodes, u8500_auxdata_lookup, parent);
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792
793 if (of_machine_is_compatible("st-ericsson,mop500")) {
794 mop500_gpio_keys[0].gpio = GPIO_PROX_SENSOR;
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795
796 platform_add_devices(mop500_platform_devs,
797 ARRAY_SIZE(mop500_platform_devs));
798
799 mop500_sdi_init(parent);
4809f90a
LJ
800 i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices);
801 i2c_register_board_info(0, mop500_i2c0_devices, i2c0_devs);
802 i2c_register_board_info(2, mop500_i2c2_devices,
803 ARRAY_SIZE(mop500_i2c2_devices));
804
fd6948bb
LJ
805 mop500_uib_init();
806
7734fed8
AB
807 } else if (of_machine_is_compatible("st-ericsson,hrefv60+")) {
808 /*
809 * The HREFv60 board removed a GPIO expander and routed
810 * all these GPIO pins to the internal GPIO controller
811 * instead.
812 */
813 mop500_gpio_keys[0].gpio = HREFV60_PROX_SENSE_GPIO;
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AB
814 platform_add_devices(mop500_platform_devs,
815 ARRAY_SIZE(mop500_platform_devs));
816
817 hrefv60_sdi_init(parent);
4809f90a
LJ
818
819 i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices);
820 i2c0_devs -= NUM_PRE_V60_I2C0_DEVICES;
821
822 i2c_register_board_info(0, mop500_i2c0_devices, i2c0_devs);
823 i2c_register_board_info(2, mop500_i2c2_devices,
824 ARRAY_SIZE(mop500_i2c2_devices));
fd6948bb
LJ
825
826 mop500_uib_init();
7734fed8 827 }
7734fed8 828
7734fed8
AB
829 /* This board has full regulator constraints */
830 regulator_has_full_constraints();
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AB
831}
832
833static const char * u8500_dt_board_compat[] = {
834 "calaosystems,snowball-a9500",
835 "st-ericsson,hrefv60+",
836 "st-ericsson,u8500",
837 "st-ericsson,mop500",
838 NULL,
839};
840
841
842DT_MACHINE_START(U8500_DT, "ST-Ericsson U8500 platform (Device Tree Support)")
843 .map_io = u8500_map_io,
844 .init_irq = ux500_init_irq,
845 /* we re-use nomadik timer here */
846 .timer = &ux500_timer,
847 .handle_irq = gic_handle_irq,
848 .init_machine = u8500_init_machine,
a010bc2b 849 .init_late = ux500_init_late,
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850 .dt_compat = u8500_dt_board_compat,
851MACHINE_END
852#endif