]>
Commit | Line | Data |
---|---|---|
aa44ef4d | 1 | /* |
a3a6c6a3 | 2 | * Copyright (C) 2008-2012 ST-Ericsson |
aa44ef4d SK |
3 | * |
4 | * Author: Srinidhi KASAGAR <srinidhi.kasagar@stericsson.com> | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2, as | |
8 | * published by the Free Software Foundation. | |
9 | * | |
10 | */ | |
11 | #include <linux/kernel.h> | |
12 | #include <linux/init.h> | |
13 | #include <linux/interrupt.h> | |
14 | #include <linux/platform_device.h> | |
15 | #include <linux/io.h> | |
b8410a15 | 16 | #include <linux/i2c.h> |
af97bace | 17 | #include <linux/platform_data/i2c-nomadik.h> |
dc1956b5 | 18 | #include <linux/platform_data/db8500_thermal.h> |
ea05a57f | 19 | #include <linux/gpio.h> |
aa44ef4d SK |
20 | #include <linux/amba/bus.h> |
21 | #include <linux/amba/pl022.h> | |
5d7b8467 | 22 | #include <linux/amba/serial.h> |
aa44ef4d | 23 | #include <linux/spi/spi.h> |
ee66e653 | 24 | #include <linux/mfd/abx500/ab8500.h> |
79568b94 | 25 | #include <linux/regulator/ab8500.h> |
0b5ea1e2 | 26 | #include <linux/regulator/fixed.h> |
20406ebf | 27 | #include <linux/mfd/tc3589x.h> |
fe67dfc8 | 28 | #include <linux/mfd/tps6105x.h> |
ee66e653 | 29 | #include <linux/mfd/abx500/ab8500-gpio.h> |
f242e50e | 30 | #include <linux/mfd/abx500/ab8500-codec.h> |
df4094d2 | 31 | #include <linux/platform_data/leds-lp55xx.h> |
a71b819b | 32 | #include <linux/input.h> |
350abe03 | 33 | #include <linux/smsc911x.h> |
a71b819b | 34 | #include <linux/gpio_keys.h> |
1a7d4369 | 35 | #include <linux/delay.h> |
350abe03 | 36 | #include <linux/leds.h> |
a0980660 | 37 | #include <linux/pinctrl/consumer.h> |
bb16bd9b | 38 | #include <linux/platform_data/pinctrl-nomadik.h> |
865fab60 | 39 | #include <linux/platform_data/dma-ste-dma40.h> |
a0980660 | 40 | |
aa44ef4d SK |
41 | #include <asm/mach-types.h> |
42 | #include <asm/mach/arch.h> | |
43 | ||
aa44ef4d SK |
44 | #include <mach/hardware.h> |
45 | #include <mach/setup.h> | |
9e4e7fe1 | 46 | #include <mach/devices.h> |
29aeb3cf | 47 | #include <mach/irqs.h> |
db298da2 | 48 | #include <linux/platform_data/crypto-ux500.h> |
aa44ef4d | 49 | |
5d7b8467 | 50 | #include "ste-dma40-db8500.h" |
fbf1eadf | 51 | #include "devices-db8500.h" |
008f8a2f | 52 | #include "board-mop500.h" |
a1e516e3 | 53 | #include "board-mop500-regulators.h" |
ea05a57f | 54 | |
350abe03 RM |
55 | static struct gpio_led snowball_led_array[] = { |
56 | { | |
57 | .name = "user_led", | |
c525f071 | 58 | .default_trigger = "heartbeat", |
350abe03 RM |
59 | .gpio = 142, |
60 | }, | |
61 | }; | |
62 | ||
63 | static struct gpio_led_platform_data snowball_led_data = { | |
64 | .leds = snowball_led_array, | |
65 | .num_leds = ARRAY_SIZE(snowball_led_array), | |
66 | }; | |
67 | ||
68 | static struct platform_device snowball_led_dev = { | |
69 | .name = "leds-gpio", | |
70 | .dev = { | |
71 | .platform_data = &snowball_led_data, | |
72 | }, | |
73 | }; | |
74 | ||
0b5ea1e2 LJ |
75 | static struct fixed_voltage_config snowball_gpio_en_3v3_data = { |
76 | .supply_name = "EN-3V3", | |
77 | .gpio = SNOWBALL_EN_3V3_ETH_GPIO, | |
78 | .microvolts = 3300000, | |
79 | .enable_high = 1, | |
80 | .init_data = &gpio_en_3v3_regulator, | |
81 | .startup_delay = 5000, /* 1200us */ | |
82 | }; | |
83 | ||
84 | static struct platform_device snowball_gpio_en_3v3_regulator_dev = { | |
85 | .name = "reg-fixed-voltage", | |
86 | .id = 1, | |
87 | .dev = { | |
88 | .platform_data = &snowball_gpio_en_3v3_data, | |
89 | }, | |
90 | }; | |
91 | ||
0493e649 | 92 | static struct abx500_gpio_platform_data ab8500_gpio_pdata = { |
a1524eeb | 93 | .gpio_base = MOP500_AB8500_PIN_GPIO(1), |
3ef374a2 BB |
94 | }; |
95 | ||
f242e50e OL |
96 | /* ab8500-codec */ |
97 | static struct ab8500_codec_platform_data ab8500_codec_pdata = { | |
98 | .amics = { | |
99 | .mic1_type = AMIC_TYPE_DIFFERENTIAL, | |
100 | .mic2_type = AMIC_TYPE_DIFFERENTIAL, | |
101 | .mic1a_micbias = AMIC_MICBIAS_VAMIC1, | |
102 | .mic1b_micbias = AMIC_MICBIAS_VAMIC1, | |
103 | .mic2_micbias = AMIC_MICBIAS_VAMIC2 | |
104 | }, | |
105 | .ear_cmv = EAR_CMV_0_95V | |
106 | }; | |
107 | ||
350abe03 RM |
108 | static struct gpio_keys_button snowball_key_array[] = { |
109 | { | |
110 | .gpio = 32, | |
111 | .type = EV_KEY, | |
112 | .code = KEY_1, | |
113 | .desc = "userpb", | |
114 | .active_low = 1, | |
115 | .debounce_interval = 50, | |
116 | .wakeup = 1, | |
117 | }, | |
118 | { | |
119 | .gpio = 151, | |
120 | .type = EV_KEY, | |
121 | .code = KEY_2, | |
122 | .desc = "extkb1", | |
123 | .active_low = 1, | |
124 | .debounce_interval = 50, | |
125 | .wakeup = 1, | |
126 | }, | |
127 | { | |
128 | .gpio = 152, | |
129 | .type = EV_KEY, | |
130 | .code = KEY_3, | |
131 | .desc = "extkb2", | |
132 | .active_low = 1, | |
133 | .debounce_interval = 50, | |
134 | .wakeup = 1, | |
135 | }, | |
136 | { | |
137 | .gpio = 161, | |
138 | .type = EV_KEY, | |
139 | .code = KEY_4, | |
140 | .desc = "extkb3", | |
141 | .active_low = 1, | |
142 | .debounce_interval = 50, | |
143 | .wakeup = 1, | |
144 | }, | |
145 | { | |
146 | .gpio = 162, | |
147 | .type = EV_KEY, | |
148 | .code = KEY_5, | |
149 | .desc = "extkb4", | |
150 | .active_low = 1, | |
151 | .debounce_interval = 50, | |
152 | .wakeup = 1, | |
153 | }, | |
154 | }; | |
155 | ||
156 | static struct gpio_keys_platform_data snowball_key_data = { | |
157 | .buttons = snowball_key_array, | |
158 | .nbuttons = ARRAY_SIZE(snowball_key_array), | |
159 | }; | |
160 | ||
161 | static struct platform_device snowball_key_dev = { | |
162 | .name = "gpio-keys", | |
163 | .id = -1, | |
164 | .dev = { | |
165 | .platform_data = &snowball_key_data, | |
166 | } | |
167 | }; | |
168 | ||
169 | static struct smsc911x_platform_config snowball_sbnet_cfg = { | |
170 | .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH, | |
171 | .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL, | |
172 | .flags = SMSC911X_USE_16BIT | SMSC911X_FORCE_INTERNAL_PHY, | |
173 | .shift = 1, | |
174 | }; | |
175 | ||
176 | static struct resource sbnet_res[] = { | |
177 | { | |
178 | .name = "smsc911x-memory", | |
179 | .start = (0x5000 << 16), | |
180 | .end = (0x5000 << 16) + 0xffff, | |
181 | .flags = IORESOURCE_MEM, | |
182 | }, | |
183 | { | |
184 | .start = NOMADIK_GPIO_TO_IRQ(140), | |
185 | .end = NOMADIK_GPIO_TO_IRQ(140), | |
186 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, | |
187 | }, | |
188 | }; | |
189 | ||
190 | static struct platform_device snowball_sbnet_dev = { | |
191 | .name = "smsc911x", | |
192 | .num_resources = ARRAY_SIZE(sbnet_res), | |
193 | .resource = sbnet_res, | |
194 | .dev = { | |
195 | .platform_data = &snowball_sbnet_cfg, | |
196 | }, | |
197 | }; | |
198 | ||
05ec260e | 199 | struct ab8500_platform_data ab8500_platdata = { |
39ae702c | 200 | .irq_base = MOP500_AB8500_IRQ_BASE, |
dfa3a824 BJ |
201 | .regulator_reg_init = ab8500_regulator_reg_init, |
202 | .num_regulator_reg_init = ARRAY_SIZE(ab8500_regulator_reg_init), | |
a1e516e3 BJ |
203 | .regulator = ab8500_regulators, |
204 | .num_regulator = ARRAY_SIZE(ab8500_regulators), | |
3ef374a2 | 205 | .gpio = &ab8500_gpio_pdata, |
f242e50e | 206 | .codec = &ab8500_codec_pdata, |
39ae702c RV |
207 | }; |
208 | ||
dc1956b5 | 209 | static struct platform_device u8500_cpufreq_cooling_device = { |
210 | .name = "db8500-cpufreq-cooling", | |
211 | }; | |
212 | ||
fe67dfc8 LW |
213 | /* |
214 | * TPS61052 | |
215 | */ | |
216 | ||
217 | static struct tps6105x_platform_data mop500_tps61052_data = { | |
218 | .mode = TPS6105X_MODE_VOLTAGE, | |
219 | .regulator_data = &tps61052_regulator, | |
220 | }; | |
221 | ||
b8410a15 RV |
222 | /* |
223 | * TC35892 | |
224 | */ | |
225 | ||
20406ebf | 226 | static void mop500_tc35892_init(struct tc3589x *tc3589x, unsigned int base) |
b8410a15 | 227 | { |
18403424 LJ |
228 | struct device *parent = NULL; |
229 | #if 0 | |
230 | /* FIXME: Is the sdi actually part of tc3589x? */ | |
231 | parent = tc3589x->dev; | |
232 | #endif | |
233 | mop500_sdi_tc35892_init(parent); | |
b8410a15 RV |
234 | } |
235 | ||
20406ebf | 236 | static struct tc3589x_gpio_platform_data mop500_tc35892_gpio_data = { |
b8410a15 RV |
237 | .gpio_base = MOP500_EGPIO(0), |
238 | .setup = mop500_tc35892_init, | |
239 | }; | |
240 | ||
20406ebf | 241 | static struct tc3589x_platform_data mop500_tc35892_data = { |
611b7590 | 242 | .block = TC3589x_BLOCK_GPIO, |
b8410a15 RV |
243 | .gpio = &mop500_tc35892_gpio_data, |
244 | .irq_base = MOP500_EGPIO_IRQ_BASE, | |
245 | }; | |
246 | ||
df4094d2 | 247 | static struct lp55xx_led_config lp5521_pri_led[] = { |
dd7b2a05 PL |
248 | [0] = { |
249 | .chan_nr = 0, | |
250 | .led_current = 0x2f, | |
251 | .max_current = 0x5f, | |
252 | }, | |
253 | [1] = { | |
254 | .chan_nr = 1, | |
255 | .led_current = 0x2f, | |
256 | .max_current = 0x5f, | |
257 | }, | |
258 | [2] = { | |
259 | .chan_nr = 2, | |
260 | .led_current = 0x2f, | |
261 | .max_current = 0x5f, | |
262 | }, | |
263 | }; | |
264 | ||
df4094d2 | 265 | static struct lp55xx_platform_data __initdata lp5521_pri_data = { |
dd7b2a05 PL |
266 | .label = "lp5521_pri", |
267 | .led_config = &lp5521_pri_led[0], | |
268 | .num_channels = 3, | |
df4094d2 | 269 | .clock_mode = LP55XX_CLOCK_EXT, |
dd7b2a05 PL |
270 | }; |
271 | ||
df4094d2 | 272 | static struct lp55xx_led_config lp5521_sec_led[] = { |
dd7b2a05 PL |
273 | [0] = { |
274 | .chan_nr = 0, | |
275 | .led_current = 0x2f, | |
276 | .max_current = 0x5f, | |
277 | }, | |
278 | [1] = { | |
279 | .chan_nr = 1, | |
280 | .led_current = 0x2f, | |
281 | .max_current = 0x5f, | |
282 | }, | |
283 | [2] = { | |
284 | .chan_nr = 2, | |
285 | .led_current = 0x2f, | |
286 | .max_current = 0x5f, | |
287 | }, | |
288 | }; | |
289 | ||
df4094d2 | 290 | static struct lp55xx_platform_data __initdata lp5521_sec_data = { |
dd7b2a05 PL |
291 | .label = "lp5521_sec", |
292 | .led_config = &lp5521_sec_led[0], | |
293 | .num_channels = 3, | |
df4094d2 | 294 | .clock_mode = LP55XX_CLOCK_EXT, |
dd7b2a05 PL |
295 | }; |
296 | ||
fe67dfc8 | 297 | static struct i2c_board_info __initdata mop500_i2c0_devices[] = { |
b8410a15 | 298 | { |
20406ebf | 299 | I2C_BOARD_INFO("tc3589x", 0x42), |
dd7b2a05 | 300 | .irq = NOMADIK_GPIO_TO_IRQ(217), |
b8410a15 RV |
301 | .platform_data = &mop500_tc35892_data, |
302 | }, | |
cf568c58 | 303 | /* I2C0 devices only available prior to HREFv60 */ |
fe67dfc8 LW |
304 | { |
305 | I2C_BOARD_INFO("tps61052", 0x33), | |
306 | .platform_data = &mop500_tps61052_data, | |
307 | }, | |
308 | }; | |
309 | ||
cf568c58 LW |
310 | #define NUM_PRE_V60_I2C0_DEVICES 1 |
311 | ||
dd7b2a05 PL |
312 | static struct i2c_board_info __initdata mop500_i2c2_devices[] = { |
313 | { | |
314 | /* lp5521 LED driver, 1st device */ | |
315 | I2C_BOARD_INFO("lp5521", 0x33), | |
316 | .platform_data = &lp5521_pri_data, | |
317 | }, | |
318 | { | |
319 | /* lp5521 LED driver, 2st device */ | |
320 | I2C_BOARD_INFO("lp5521", 0x34), | |
321 | .platform_data = &lp5521_sec_data, | |
322 | }, | |
bb3b2187 LJ |
323 | { |
324 | /* Light sensor Rohm BH1780GLI */ | |
325 | I2C_BOARD_INFO("bh1780", 0x29), | |
326 | }, | |
dd7b2a05 PL |
327 | }; |
328 | ||
18403424 | 329 | static void __init mop500_i2c_init(struct device *parent) |
fbf1eadf | 330 | { |
98582d95 LJ |
331 | db8500_add_i2c0(parent, NULL); |
332 | db8500_add_i2c1(parent, NULL); | |
333 | db8500_add_i2c2(parent, NULL); | |
334 | db8500_add_i2c3(parent, NULL); | |
fbf1eadf | 335 | } |
aa44ef4d | 336 | |
a71b819b PL |
337 | static struct gpio_keys_button mop500_gpio_keys[] = { |
338 | { | |
339 | .desc = "SFH7741 Proximity Sensor", | |
340 | .type = EV_SW, | |
341 | .code = SW_FRONT_PROXIMITY, | |
a71b819b PL |
342 | .active_low = 0, |
343 | .can_disable = 1, | |
344 | } | |
345 | }; | |
346 | ||
347 | static struct regulator *prox_regulator; | |
348 | static int mop500_prox_activate(struct device *dev); | |
349 | static void mop500_prox_deactivate(struct device *dev); | |
350 | ||
351 | static struct gpio_keys_platform_data mop500_gpio_keys_data = { | |
352 | .buttons = mop500_gpio_keys, | |
353 | .nbuttons = ARRAY_SIZE(mop500_gpio_keys), | |
354 | .enable = mop500_prox_activate, | |
355 | .disable = mop500_prox_deactivate, | |
356 | }; | |
357 | ||
358 | static struct platform_device mop500_gpio_keys_device = { | |
359 | .name = "gpio-keys", | |
360 | .id = 0, | |
361 | .dev = { | |
362 | .platform_data = &mop500_gpio_keys_data, | |
363 | }, | |
364 | }; | |
365 | ||
366 | static int mop500_prox_activate(struct device *dev) | |
367 | { | |
368 | prox_regulator = regulator_get(&mop500_gpio_keys_device.dev, | |
369 | "vcc"); | |
370 | if (IS_ERR(prox_regulator)) { | |
371 | dev_err(&mop500_gpio_keys_device.dev, | |
372 | "no regulator\n"); | |
373 | return PTR_ERR(prox_regulator); | |
374 | } | |
375 | regulator_enable(prox_regulator); | |
376 | return 0; | |
377 | } | |
378 | ||
379 | static void mop500_prox_deactivate(struct device *dev) | |
380 | { | |
381 | regulator_disable(prox_regulator); | |
382 | regulator_put(prox_regulator); | |
383 | } | |
384 | ||
585d188f AW |
385 | static struct cryp_platform_data u8500_cryp1_platform_data = { |
386 | .mem_to_engine = { | |
387 | .dir = STEDMA40_MEM_TO_PERIPH, | |
388 | .src_dev_type = STEDMA40_DEV_SRC_MEMORY, | |
389 | .dst_dev_type = DB8500_DMA_DEV48_CAC1_TX, | |
390 | .src_info.data_width = STEDMA40_WORD_WIDTH, | |
391 | .dst_info.data_width = STEDMA40_WORD_WIDTH, | |
392 | .mode = STEDMA40_MODE_LOGICAL, | |
393 | .src_info.psize = STEDMA40_PSIZE_LOG_4, | |
394 | .dst_info.psize = STEDMA40_PSIZE_LOG_4, | |
395 | }, | |
396 | .engine_to_mem = { | |
397 | .dir = STEDMA40_PERIPH_TO_MEM, | |
398 | .src_dev_type = DB8500_DMA_DEV48_CAC1_RX, | |
399 | .dst_dev_type = STEDMA40_DEV_DST_MEMORY, | |
400 | .src_info.data_width = STEDMA40_WORD_WIDTH, | |
401 | .dst_info.data_width = STEDMA40_WORD_WIDTH, | |
402 | .mode = STEDMA40_MODE_LOGICAL, | |
403 | .src_info.psize = STEDMA40_PSIZE_LOG_4, | |
404 | .dst_info.psize = STEDMA40_PSIZE_LOG_4, | |
405 | } | |
406 | }; | |
407 | ||
408 | static struct stedma40_chan_cfg u8500_hash_dma_cfg_tx = { | |
409 | .dir = STEDMA40_MEM_TO_PERIPH, | |
410 | .src_dev_type = STEDMA40_DEV_SRC_MEMORY, | |
411 | .dst_dev_type = DB8500_DMA_DEV50_HAC1_TX, | |
412 | .src_info.data_width = STEDMA40_WORD_WIDTH, | |
413 | .dst_info.data_width = STEDMA40_WORD_WIDTH, | |
414 | .mode = STEDMA40_MODE_LOGICAL, | |
415 | .src_info.psize = STEDMA40_PSIZE_LOG_16, | |
416 | .dst_info.psize = STEDMA40_PSIZE_LOG_16, | |
417 | }; | |
418 | ||
419 | static struct hash_platform_data u8500_hash1_platform_data = { | |
420 | .mem_to_engine = &u8500_hash_dma_cfg_tx, | |
421 | .dma_filter = stedma40_filter, | |
422 | }; | |
423 | ||
d48a41c1 | 424 | /* add any platform devices here - TODO */ |
350abe03 | 425 | static struct platform_device *mop500_platform_devs[] __initdata = { |
a71b819b | 426 | &mop500_gpio_keys_device, |
d48a41c1 SK |
427 | }; |
428 | ||
5d7b8467 LW |
429 | #ifdef CONFIG_STE_DMA40 |
430 | static struct stedma40_chan_cfg ssp0_dma_cfg_rx = { | |
431 | .mode = STEDMA40_MODE_LOGICAL, | |
432 | .dir = STEDMA40_PERIPH_TO_MEM, | |
433 | .src_dev_type = DB8500_DMA_DEV8_SSP0_RX, | |
434 | .dst_dev_type = STEDMA40_DEV_DST_MEMORY, | |
435 | .src_info.data_width = STEDMA40_BYTE_WIDTH, | |
436 | .dst_info.data_width = STEDMA40_BYTE_WIDTH, | |
437 | }; | |
438 | ||
439 | static struct stedma40_chan_cfg ssp0_dma_cfg_tx = { | |
440 | .mode = STEDMA40_MODE_LOGICAL, | |
441 | .dir = STEDMA40_MEM_TO_PERIPH, | |
442 | .src_dev_type = STEDMA40_DEV_SRC_MEMORY, | |
443 | .dst_dev_type = DB8500_DMA_DEV8_SSP0_TX, | |
444 | .src_info.data_width = STEDMA40_BYTE_WIDTH, | |
445 | .dst_info.data_width = STEDMA40_BYTE_WIDTH, | |
446 | }; | |
447 | #endif | |
448 | ||
fa86a764 | 449 | struct pl022_ssp_controller ssp0_plat = { |
5d7b8467 LW |
450 | .bus_id = 0, |
451 | #ifdef CONFIG_STE_DMA40 | |
452 | .enable_dma = 1, | |
453 | .dma_filter = stedma40_filter, | |
454 | .dma_rx_param = &ssp0_dma_cfg_rx, | |
455 | .dma_tx_param = &ssp0_dma_cfg_tx, | |
456 | #else | |
457 | .enable_dma = 0, | |
458 | #endif | |
459 | /* on this platform, gpio 31,142,144,214 & | |
460 | * 224 are connected as chip selects | |
461 | */ | |
462 | .num_chipselect = 5, | |
463 | }; | |
464 | ||
18403424 | 465 | static void __init mop500_spi_init(struct device *parent) |
aa44ef4d | 466 | { |
15daf691 | 467 | db8500_add_ssp0(parent, &ssp0_plat); |
fbf1eadf | 468 | } |
aa44ef4d | 469 | |
5d7b8467 LW |
470 | #ifdef CONFIG_STE_DMA40 |
471 | static struct stedma40_chan_cfg uart0_dma_cfg_rx = { | |
472 | .mode = STEDMA40_MODE_LOGICAL, | |
473 | .dir = STEDMA40_PERIPH_TO_MEM, | |
474 | .src_dev_type = DB8500_DMA_DEV13_UART0_RX, | |
475 | .dst_dev_type = STEDMA40_DEV_DST_MEMORY, | |
476 | .src_info.data_width = STEDMA40_BYTE_WIDTH, | |
477 | .dst_info.data_width = STEDMA40_BYTE_WIDTH, | |
478 | }; | |
479 | ||
480 | static struct stedma40_chan_cfg uart0_dma_cfg_tx = { | |
481 | .mode = STEDMA40_MODE_LOGICAL, | |
482 | .dir = STEDMA40_MEM_TO_PERIPH, | |
483 | .src_dev_type = STEDMA40_DEV_SRC_MEMORY, | |
484 | .dst_dev_type = DB8500_DMA_DEV13_UART0_TX, | |
485 | .src_info.data_width = STEDMA40_BYTE_WIDTH, | |
486 | .dst_info.data_width = STEDMA40_BYTE_WIDTH, | |
487 | }; | |
488 | ||
489 | static struct stedma40_chan_cfg uart1_dma_cfg_rx = { | |
490 | .mode = STEDMA40_MODE_LOGICAL, | |
491 | .dir = STEDMA40_PERIPH_TO_MEM, | |
492 | .src_dev_type = DB8500_DMA_DEV12_UART1_RX, | |
493 | .dst_dev_type = STEDMA40_DEV_DST_MEMORY, | |
494 | .src_info.data_width = STEDMA40_BYTE_WIDTH, | |
495 | .dst_info.data_width = STEDMA40_BYTE_WIDTH, | |
496 | }; | |
497 | ||
498 | static struct stedma40_chan_cfg uart1_dma_cfg_tx = { | |
499 | .mode = STEDMA40_MODE_LOGICAL, | |
500 | .dir = STEDMA40_MEM_TO_PERIPH, | |
501 | .src_dev_type = STEDMA40_DEV_SRC_MEMORY, | |
502 | .dst_dev_type = DB8500_DMA_DEV12_UART1_TX, | |
503 | .src_info.data_width = STEDMA40_BYTE_WIDTH, | |
504 | .dst_info.data_width = STEDMA40_BYTE_WIDTH, | |
505 | }; | |
506 | ||
507 | static struct stedma40_chan_cfg uart2_dma_cfg_rx = { | |
508 | .mode = STEDMA40_MODE_LOGICAL, | |
509 | .dir = STEDMA40_PERIPH_TO_MEM, | |
510 | .src_dev_type = DB8500_DMA_DEV11_UART2_RX, | |
511 | .dst_dev_type = STEDMA40_DEV_DST_MEMORY, | |
512 | .src_info.data_width = STEDMA40_BYTE_WIDTH, | |
513 | .dst_info.data_width = STEDMA40_BYTE_WIDTH, | |
514 | }; | |
515 | ||
516 | static struct stedma40_chan_cfg uart2_dma_cfg_tx = { | |
517 | .mode = STEDMA40_MODE_LOGICAL, | |
518 | .dir = STEDMA40_MEM_TO_PERIPH, | |
519 | .src_dev_type = STEDMA40_DEV_SRC_MEMORY, | |
520 | .dst_dev_type = DB8500_DMA_DEV11_UART2_TX, | |
521 | .src_info.data_width = STEDMA40_BYTE_WIDTH, | |
522 | .dst_info.data_width = STEDMA40_BYTE_WIDTH, | |
523 | }; | |
524 | #endif | |
525 | ||
fa86a764 | 526 | struct amba_pl011_data uart0_plat = { |
5d7b8467 LW |
527 | #ifdef CONFIG_STE_DMA40 |
528 | .dma_filter = stedma40_filter, | |
529 | .dma_rx_param = &uart0_dma_cfg_rx, | |
530 | .dma_tx_param = &uart0_dma_cfg_tx, | |
531 | #endif | |
532 | }; | |
533 | ||
fa86a764 | 534 | struct amba_pl011_data uart1_plat = { |
5d7b8467 LW |
535 | #ifdef CONFIG_STE_DMA40 |
536 | .dma_filter = stedma40_filter, | |
537 | .dma_rx_param = &uart1_dma_cfg_rx, | |
538 | .dma_tx_param = &uart1_dma_cfg_tx, | |
539 | #endif | |
540 | }; | |
541 | ||
fa86a764 | 542 | struct amba_pl011_data uart2_plat = { |
5d7b8467 LW |
543 | #ifdef CONFIG_STE_DMA40 |
544 | .dma_filter = stedma40_filter, | |
545 | .dma_rx_param = &uart2_dma_cfg_rx, | |
546 | .dma_tx_param = &uart2_dma_cfg_tx, | |
547 | #endif | |
548 | }; | |
549 | ||
18403424 | 550 | static void __init mop500_uart_init(struct device *parent) |
fbf1eadf | 551 | { |
78d80c5a | 552 | db8500_add_uart0(parent, &uart0_plat); |
18403424 LJ |
553 | db8500_add_uart1(parent, &uart1_plat); |
554 | db8500_add_uart2(parent, &uart2_plat); | |
fbf1eadf RV |
555 | } |
556 | ||
585d188f AW |
557 | static void __init u8500_cryp1_hash1_init(struct device *parent) |
558 | { | |
559 | db8500_add_cryp1(parent, &u8500_cryp1_platform_data); | |
560 | db8500_add_hash1(parent, &u8500_hash1_platform_data); | |
561 | } | |
562 | ||
350abe03 RM |
563 | static struct platform_device *snowball_platform_devs[] __initdata = { |
564 | &snowball_led_dev, | |
565 | &snowball_key_dev, | |
e6fada59 | 566 | &snowball_sbnet_dev, |
0b5ea1e2 | 567 | &snowball_gpio_en_3v3_regulator_dev, |
dc1956b5 | 568 | &u8500_cpufreq_cooling_device, |
350abe03 RM |
569 | }; |
570 | ||
4b4f757c | 571 | static void __init mop500_init_machine(void) |
fbf1eadf | 572 | { |
18403424 | 573 | struct device *parent = NULL; |
cf568c58 | 574 | int i2c0_devs; |
b024a0c8 | 575 | int i; |
cf568c58 | 576 | |
05ec260e | 577 | platform_device_register(&db8500_prcmu_device); |
110c2c2f LJ |
578 | mop500_gpio_keys[0].gpio = GPIO_PROX_SENSOR; |
579 | ||
ed781d39 | 580 | mop500_pinmaps_init(); |
3a8e39c9 | 581 | parent = u8500_init_devices(&ab8500_platdata); |
110c2c2f | 582 | |
b024a0c8 LJ |
583 | for (i = 0; i < ARRAY_SIZE(mop500_platform_devs); i++) |
584 | mop500_platform_devs[i]->dev.parent = parent; | |
585 | ||
110c2c2f LJ |
586 | platform_add_devices(mop500_platform_devs, |
587 | ARRAY_SIZE(mop500_platform_devs)); | |
588 | ||
18403424 LJ |
589 | mop500_i2c_init(parent); |
590 | mop500_sdi_init(parent); | |
591 | mop500_spi_init(parent); | |
39b740bf | 592 | mop500_audio_init(parent); |
18403424 | 593 | mop500_uart_init(parent); |
110c2c2f | 594 | |
585d188f AW |
595 | u8500_cryp1_hash1_init(parent); |
596 | ||
110c2c2f LJ |
597 | i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices); |
598 | ||
599 | i2c_register_board_info(0, mop500_i2c0_devices, i2c0_devs); | |
600 | i2c_register_board_info(2, mop500_i2c2_devices, | |
601 | ARRAY_SIZE(mop500_i2c2_devices)); | |
602 | ||
603 | /* This board has full regulator constraints */ | |
604 | regulator_has_full_constraints(); | |
605 | } | |
606 | ||
607 | static void __init snowball_init_machine(void) | |
608 | { | |
18403424 | 609 | struct device *parent = NULL; |
b024a0c8 | 610 | int i; |
110c2c2f | 611 | |
05ec260e | 612 | platform_device_register(&db8500_prcmu_device); |
ed781d39 | 613 | snowball_pinmaps_init(); |
3a8e39c9 | 614 | parent = u8500_init_devices(&ab8500_platdata); |
110c2c2f | 615 | |
b024a0c8 LJ |
616 | for (i = 0; i < ARRAY_SIZE(snowball_platform_devs); i++) |
617 | snowball_platform_devs[i]->dev.parent = parent; | |
618 | ||
110c2c2f LJ |
619 | platform_add_devices(snowball_platform_devs, |
620 | ARRAY_SIZE(snowball_platform_devs)); | |
621 | ||
18403424 LJ |
622 | mop500_i2c_init(parent); |
623 | snowball_sdi_init(parent); | |
624 | mop500_spi_init(parent); | |
39b740bf | 625 | mop500_audio_init(parent); |
18403424 | 626 | mop500_uart_init(parent); |
110c2c2f | 627 | |
110c2c2f LJ |
628 | /* This board has full regulator constraints */ |
629 | regulator_has_full_constraints(); | |
630 | } | |
631 | ||
632 | static void __init hrefv60_init_machine(void) | |
633 | { | |
18403424 | 634 | struct device *parent = NULL; |
110c2c2f | 635 | int i2c0_devs; |
b024a0c8 | 636 | int i; |
110c2c2f | 637 | |
05ec260e | 638 | platform_device_register(&db8500_prcmu_device); |
4b4f757c LW |
639 | /* |
640 | * The HREFv60 board removed a GPIO expander and routed | |
641 | * all these GPIO pins to the internal GPIO controller | |
642 | * instead. | |
643 | */ | |
110c2c2f | 644 | mop500_gpio_keys[0].gpio = HREFV60_PROX_SENSE_GPIO; |
4b4f757c | 645 | |
ed781d39 | 646 | hrefv60_pinmaps_init(); |
3a8e39c9 | 647 | parent = u8500_init_devices(&ab8500_platdata); |
ea05a57f | 648 | |
b024a0c8 LJ |
649 | for (i = 0; i < ARRAY_SIZE(mop500_platform_devs); i++) |
650 | mop500_platform_devs[i]->dev.parent = parent; | |
651 | ||
110c2c2f LJ |
652 | platform_add_devices(mop500_platform_devs, |
653 | ARRAY_SIZE(mop500_platform_devs)); | |
d48a41c1 | 654 | |
18403424 LJ |
655 | mop500_i2c_init(parent); |
656 | hrefv60_sdi_init(parent); | |
657 | mop500_spi_init(parent); | |
39b740bf | 658 | mop500_audio_init(parent); |
18403424 | 659 | mop500_uart_init(parent); |
008f8a2f | 660 | |
cf568c58 | 661 | i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices); |
110c2c2f LJ |
662 | |
663 | i2c0_devs -= NUM_PRE_V60_I2C0_DEVICES; | |
cf568c58 LW |
664 | |
665 | i2c_register_board_info(0, mop500_i2c0_devices, i2c0_devs); | |
dd7b2a05 PL |
666 | i2c_register_board_info(2, mop500_i2c2_devices, |
667 | ARRAY_SIZE(mop500_i2c2_devices)); | |
db24520f LW |
668 | |
669 | /* This board has full regulator constraints */ | |
670 | regulator_has_full_constraints(); | |
aa44ef4d SK |
671 | } |
672 | ||
673 | MACHINE_START(U8500, "ST-Ericsson MOP500 platform") | |
674 | /* Maintainer: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> */ | |
bc77b1aa | 675 | .atag_offset = 0x100, |
5ac21a94 | 676 | .smp = smp_ops(ux500_smp_ops), |
aa44ef4d | 677 | .map_io = u8500_map_io, |
178980f9 | 678 | .init_irq = ux500_init_irq, |
aa44ef4d | 679 | /* we re-use nomadik timer here */ |
6bb27d73 | 680 | .init_time = ux500_timer_init, |
4b4f757c | 681 | .init_machine = mop500_init_machine, |
a010bc2b | 682 | .init_late = ux500_init_late, |
4b4f757c LW |
683 | MACHINE_END |
684 | ||
a3a6c6a3 LW |
685 | MACHINE_START(U8520, "ST-Ericsson U8520 Platform HREFP520") |
686 | .atag_offset = 0x100, | |
687 | .map_io = u8500_map_io, | |
688 | .init_irq = ux500_init_irq, | |
6bb27d73 | 689 | .init_time = ux500_timer_init, |
a3a6c6a3 LW |
690 | .init_machine = mop500_init_machine, |
691 | .init_late = ux500_init_late, | |
692 | MACHINE_END | |
693 | ||
4b4f757c | 694 | MACHINE_START(HREFV60, "ST-Ericsson U8500 Platform HREFv60+") |
bc77b1aa | 695 | .atag_offset = 0x100, |
5ac21a94 | 696 | .smp = smp_ops(ux500_smp_ops), |
4b4f757c LW |
697 | .map_io = u8500_map_io, |
698 | .init_irq = ux500_init_irq, | |
6bb27d73 | 699 | .init_time = ux500_timer_init, |
110c2c2f | 700 | .init_machine = hrefv60_init_machine, |
a010bc2b | 701 | .init_late = ux500_init_late, |
aa44ef4d | 702 | MACHINE_END |
350abe03 RM |
703 | |
704 | MACHINE_START(SNOWBALL, "Calao Systems Snowball platform") | |
bc77b1aa | 705 | .atag_offset = 0x100, |
5ac21a94 | 706 | .smp = smp_ops(ux500_smp_ops), |
350abe03 RM |
707 | .map_io = u8500_map_io, |
708 | .init_irq = ux500_init_irq, | |
709 | /* we re-use nomadik timer here */ | |
6bb27d73 | 710 | .init_time = ux500_timer_init, |
110c2c2f | 711 | .init_machine = snowball_init_machine, |
0ddf855a | 712 | .init_late = NULL, |
2d334297 | 713 | MACHINE_END |