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aa44ef4d | 1 | /* |
c15def1c | 2 | * Copyright (C) 2008-2009 ST-Ericsson SA |
aa44ef4d SK |
3 | * |
4 | * Author: Srinidhi KASAGAR <srinidhi.kasagar@stericsson.com> | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2, as | |
8 | * published by the Free Software Foundation. | |
9 | * | |
10 | */ | |
11 | #include <linux/types.h> | |
12 | #include <linux/init.h> | |
13 | #include <linux/device.h> | |
14 | #include <linux/amba/bus.h> | |
aa90eb9d | 15 | #include <linux/interrupt.h> |
aa44ef4d SK |
16 | #include <linux/irq.h> |
17 | #include <linux/platform_device.h> | |
cc2c1334 | 18 | #include <linux/io.h> |
3a8e39c9 | 19 | #include <linux/mfd/abx500/ab8500.h> |
661c6af0 | 20 | #include <linux/mfd/dbx500-prcmu.h> |
fa86a764 LJ |
21 | #include <linux/of.h> |
22 | #include <linux/of_platform.h> | |
23 | #include <linux/regulator/machine.h> | |
4040d10a | 24 | #include <linux/random.h> |
aa44ef4d | 25 | |
5caecb44 | 26 | #include <asm/pmu.h> |
aa44ef4d | 27 | #include <asm/mach/map.h> |
fa86a764 LJ |
28 | #include <asm/mach/arch.h> |
29 | #include <asm/hardware/gic.h> | |
aa44ef4d | 30 | #include <mach/hardware.h> |
cc2c1334 | 31 | #include <mach/setup.h> |
5b1f7ddf | 32 | #include <mach/devices.h> |
eda413c2 | 33 | #include <mach/db8500-regs.h> |
94bdc0e2 | 34 | |
fbf1eadf | 35 | #include "devices-db8500.h" |
6f3f3c3f | 36 | #include "ste-dma40-db8500.h" |
fa86a764 | 37 | #include "board-mop500.h" |
fbf1eadf | 38 | |
aa44ef4d | 39 | /* minimum static i/o mapping required to boot U8500 platforms */ |
abf12d71 | 40 | static struct map_desc u8500_uart_io_desc[] __initdata = { |
92389ca8 RV |
41 | __IO_DEV_DESC(U8500_UART0_BASE, SZ_4K), |
42 | __IO_DEV_DESC(U8500_UART2_BASE, SZ_4K), | |
abf12d71 | 43 | }; |
bc71c096 LW |
44 | /* U8500 and U9540 common io_desc */ |
45 | static struct map_desc u8500_common_io_desc[] __initdata = { | |
215e83d9 LW |
46 | /* SCU base also covers GIC CPU BASE and TWD with its 4K page */ |
47 | __IO_DEV_DESC(U8500_SCU_BASE, SZ_4K), | |
92389ca8 RV |
48 | __IO_DEV_DESC(U8500_GIC_DIST_BASE, SZ_4K), |
49 | __IO_DEV_DESC(U8500_L2CC_BASE, SZ_4K), | |
92389ca8 | 50 | __IO_DEV_DESC(U8500_MTU0_BASE, SZ_4K), |
92389ca8 RV |
51 | __IO_DEV_DESC(U8500_BACKUPRAM0_BASE, SZ_8K), |
52 | ||
53 | __IO_DEV_DESC(U8500_CLKRST1_BASE, SZ_4K), | |
54 | __IO_DEV_DESC(U8500_CLKRST2_BASE, SZ_4K), | |
55 | __IO_DEV_DESC(U8500_CLKRST3_BASE, SZ_4K), | |
56 | __IO_DEV_DESC(U8500_CLKRST5_BASE, SZ_4K), | |
57 | __IO_DEV_DESC(U8500_CLKRST6_BASE, SZ_4K), | |
58 | ||
c9c09572 | 59 | __IO_DEV_DESC(U8500_GPIO0_BASE, SZ_4K), |
94bdc0e2 RV |
60 | __IO_DEV_DESC(U8500_GPIO1_BASE, SZ_4K), |
61 | __IO_DEV_DESC(U8500_GPIO2_BASE, SZ_4K), | |
62 | __IO_DEV_DESC(U8500_GPIO3_BASE, SZ_4K), | |
ee9581d7 MJ |
63 | }; |
64 | ||
65 | /* U8500 IO map specific description */ | |
66 | static struct map_desc u8500_io_desc[] __initdata = { | |
67 | __IO_DEV_DESC(U8500_PRCMU_BASE, SZ_4K), | |
fcbd458e | 68 | __IO_DEV_DESC(U8500_PRCMU_TCDM_BASE, SZ_4K), |
ee9581d7 MJ |
69 | |
70 | }; | |
71 | ||
72 | /* U9540 IO map specific description */ | |
73 | static struct map_desc u9540_io_desc[] __initdata = { | |
74 | __IO_DEV_DESC(U8500_PRCMU_BASE, SZ_4K + SZ_8K), | |
75 | __IO_DEV_DESC(U8500_PRCMU_TCDM_BASE, SZ_4K + SZ_8K), | |
75a36ee0 RV |
76 | }; |
77 | ||
abf12d71 | 78 | void __init u8500_map_io(void) |
f946738c | 79 | { |
abf12d71 RV |
80 | /* |
81 | * Map the UARTs early so that the DEBUG_LL stuff continues to work. | |
82 | */ | |
83 | iotable_init(u8500_uart_io_desc, ARRAY_SIZE(u8500_uart_io_desc)); | |
f946738c | 84 | |
abf12d71 | 85 | ux500_map_io(); |
f946738c | 86 | |
bc71c096 | 87 | iotable_init(u8500_common_io_desc, ARRAY_SIZE(u8500_common_io_desc)); |
75a36ee0 | 88 | |
e1bbb55d | 89 | if (cpu_is_ux540_family()) |
ee9581d7 MJ |
90 | iotable_init(u9540_io_desc, ARRAY_SIZE(u9540_io_desc)); |
91 | else | |
92 | iotable_init(u8500_io_desc, ARRAY_SIZE(u8500_io_desc)); | |
75a36ee0 | 93 | |
11871890 | 94 | _PRCMU_BASE = __io_address(U8500_PRCMU_BASE); |
aa44ef4d SK |
95 | } |
96 | ||
aa90eb9d RV |
97 | static struct resource db8500_pmu_resources[] = { |
98 | [0] = { | |
99 | .start = IRQ_DB8500_PMU, | |
100 | .end = IRQ_DB8500_PMU, | |
101 | .flags = IORESOURCE_IRQ, | |
102 | }, | |
103 | }; | |
104 | ||
105 | /* | |
106 | * The PMU IRQ lines of two cores are wired together into a single interrupt. | |
107 | * Bounce the interrupt to the other core if it's not ours. | |
108 | */ | |
109 | static irqreturn_t db8500_pmu_handler(int irq, void *dev, irq_handler_t handler) | |
110 | { | |
111 | irqreturn_t ret = handler(irq, dev); | |
112 | int other = !smp_processor_id(); | |
113 | ||
114 | if (ret == IRQ_NONE && cpu_online(other)) | |
115 | irq_set_affinity(irq, cpumask_of(other)); | |
116 | ||
117 | /* | |
118 | * We should be able to get away with the amount of IRQ_NONEs we give, | |
119 | * while still having the spurious IRQ detection code kick in if the | |
120 | * interrupt really starts hitting spuriously. | |
121 | */ | |
122 | return ret; | |
123 | } | |
124 | ||
3a8e39c9 | 125 | struct arm_pmu_platdata db8500_pmu_platdata = { |
aa90eb9d RV |
126 | .handle_irq = db8500_pmu_handler, |
127 | }; | |
128 | ||
129 | static struct platform_device db8500_pmu_device = { | |
130 | .name = "arm-pmu", | |
df3d17e0 | 131 | .id = -1, |
aa90eb9d RV |
132 | .num_resources = ARRAY_SIZE(db8500_pmu_resources), |
133 | .resource = db8500_pmu_resources, | |
134 | .dev.platform_data = &db8500_pmu_platdata, | |
135 | }; | |
136 | ||
3df57bcf MN |
137 | static struct platform_device db8500_prcmu_device = { |
138 | .name = "db8500-prcmu", | |
139 | }; | |
140 | ||
aa90eb9d RV |
141 | static struct platform_device *platform_devs[] __initdata = { |
142 | &u8500_dma40_device, | |
143 | &db8500_pmu_device, | |
3df57bcf | 144 | &db8500_prcmu_device, |
aa90eb9d RV |
145 | }; |
146 | ||
01afdd13 RV |
147 | static resource_size_t __initdata db8500_gpio_base[] = { |
148 | U8500_GPIOBANK0_BASE, | |
149 | U8500_GPIOBANK1_BASE, | |
150 | U8500_GPIOBANK2_BASE, | |
151 | U8500_GPIOBANK3_BASE, | |
152 | U8500_GPIOBANK4_BASE, | |
153 | U8500_GPIOBANK5_BASE, | |
154 | U8500_GPIOBANK6_BASE, | |
155 | U8500_GPIOBANK7_BASE, | |
156 | U8500_GPIOBANK8_BASE, | |
157 | }; | |
158 | ||
18403424 | 159 | static void __init db8500_add_gpios(struct device *parent) |
01afdd13 RV |
160 | { |
161 | struct nmk_gpio_platform_data pdata = { | |
c15def1c | 162 | .supports_sleepmode = true, |
01afdd13 RV |
163 | }; |
164 | ||
18403424 | 165 | dbx500_add_gpios(parent, ARRAY_AND_SIZE(db8500_gpio_base), |
01afdd13 | 166 | IRQ_DB8500_GPIO0, &pdata); |
f4828336 | 167 | dbx500_add_pinctrl(parent, "pinctrl-db8500", U8500_PRCMU_BASE); |
01afdd13 RV |
168 | } |
169 | ||
6f3f3c3f MYK |
170 | static int usb_db8500_rx_dma_cfg[] = { |
171 | DB8500_DMA_DEV38_USB_OTG_IEP_1_9, | |
172 | DB8500_DMA_DEV37_USB_OTG_IEP_2_10, | |
173 | DB8500_DMA_DEV36_USB_OTG_IEP_3_11, | |
174 | DB8500_DMA_DEV19_USB_OTG_IEP_4_12, | |
175 | DB8500_DMA_DEV18_USB_OTG_IEP_5_13, | |
176 | DB8500_DMA_DEV17_USB_OTG_IEP_6_14, | |
177 | DB8500_DMA_DEV16_USB_OTG_IEP_7_15, | |
178 | DB8500_DMA_DEV39_USB_OTG_IEP_8 | |
179 | }; | |
180 | ||
181 | static int usb_db8500_tx_dma_cfg[] = { | |
182 | DB8500_DMA_DEV38_USB_OTG_OEP_1_9, | |
183 | DB8500_DMA_DEV37_USB_OTG_OEP_2_10, | |
184 | DB8500_DMA_DEV36_USB_OTG_OEP_3_11, | |
185 | DB8500_DMA_DEV19_USB_OTG_OEP_4_12, | |
186 | DB8500_DMA_DEV18_USB_OTG_OEP_5_13, | |
187 | DB8500_DMA_DEV17_USB_OTG_OEP_6_14, | |
188 | DB8500_DMA_DEV16_USB_OTG_OEP_7_15, | |
189 | DB8500_DMA_DEV39_USB_OTG_OEP_8 | |
190 | }; | |
191 | ||
eda413c2 LJ |
192 | static const char *db8500_read_soc_id(void) |
193 | { | |
194 | void __iomem *uid = __io_address(U8500_BB_UID_BASE); | |
195 | ||
4040d10a LW |
196 | /* Throw these device-specific numbers into the entropy pool */ |
197 | add_device_randomness(uid, 0x14); | |
eda413c2 LJ |
198 | return kasprintf(GFP_KERNEL, "%08x%08x%08x%08x%08x", |
199 | readl((u32 *)uid+1), | |
200 | readl((u32 *)uid+1), readl((u32 *)uid+2), | |
201 | readl((u32 *)uid+3), readl((u32 *)uid+4)); | |
202 | } | |
203 | ||
204 | static struct device * __init db8500_soc_device_init(void) | |
205 | { | |
206 | const char *soc_id = db8500_read_soc_id(); | |
207 | ||
208 | return ux500_soc_device_init(soc_id); | |
209 | } | |
210 | ||
aa44ef4d SK |
211 | /* |
212 | * This function is called from the board init | |
213 | */ | |
3a8e39c9 | 214 | struct device * __init u8500_init_devices(struct ab8500_platform_data *ab8500) |
aa44ef4d | 215 | { |
eda413c2 | 216 | struct device *parent; |
b024a0c8 | 217 | int i; |
eda413c2 LJ |
218 | |
219 | parent = db8500_soc_device_init(); | |
220 | ||
221 | db8500_add_rtc(parent); | |
222 | db8500_add_gpios(parent); | |
223 | db8500_add_usb(parent, usb_db8500_rx_dma_cfg, usb_db8500_tx_dma_cfg); | |
fbf1eadf | 224 | |
f65c1982 LJ |
225 | for (i = 0; i < ARRAY_SIZE(platform_devs); i++) |
226 | platform_devs[i]->dev.parent = parent; | |
227 | ||
3a8e39c9 LJ |
228 | db8500_prcmu_device.dev.platform_data = ab8500; |
229 | ||
f65c1982 LJ |
230 | platform_add_devices(platform_devs, ARRAY_SIZE(platform_devs)); |
231 | ||
232 | return parent; | |
233 | } | |
234 | ||
fa86a764 LJ |
235 | #ifdef CONFIG_MACH_UX500_DT |
236 | ||
f65c1982 | 237 | /* TODO: Once all pieces are DT:ed, remove completely. */ |
fa86a764 | 238 | static struct device * __init u8500_of_init_devices(void) |
f65c1982 | 239 | { |
fa86a764 | 240 | struct device *parent = db8500_soc_device_init(); |
f65c1982 | 241 | |
f65c1982 LJ |
242 | db8500_add_usb(parent, usb_db8500_rx_dma_cfg, usb_db8500_tx_dma_cfg); |
243 | ||
38cd8c5d | 244 | u8500_dma40_device.dev.parent = parent; |
b024a0c8 | 245 | |
08d05026 LJ |
246 | /* |
247 | * Devices to be DT:ed: | |
248 | * u8500_dma40_device = todo | |
da384870 | 249 | * db8500_pmu_device = done |
dee42ebe | 250 | * db8500_prcmu_device = done |
08d05026 | 251 | */ |
38cd8c5d | 252 | platform_device_register(&u8500_dma40_device); |
aa44ef4d | 253 | |
eda413c2 | 254 | return parent; |
aa44ef4d | 255 | } |
fa86a764 LJ |
256 | |
257 | static struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = { | |
258 | /* Requires call-back bindings. */ | |
259 | OF_DEV_AUXDATA("arm,cortex-a9-pmu", 0, "arm-pmu", &db8500_pmu_platdata), | |
cece5c40 | 260 | /* Requires DMA bindings. */ |
fa86a764 LJ |
261 | OF_DEV_AUXDATA("arm,pl011", 0x80120000, "uart0", &uart0_plat), |
262 | OF_DEV_AUXDATA("arm,pl011", 0x80121000, "uart1", &uart1_plat), | |
263 | OF_DEV_AUXDATA("arm,pl011", 0x80007000, "uart2", &uart2_plat), | |
fa86a764 LJ |
264 | OF_DEV_AUXDATA("arm,pl022", 0x80002000, "ssp0", &ssp0_plat), |
265 | OF_DEV_AUXDATA("arm,pl18x", 0x80126000, "sdi0", &mop500_sdi0_data), | |
266 | OF_DEV_AUXDATA("arm,pl18x", 0x80118000, "sdi1", &mop500_sdi1_data), | |
267 | OF_DEV_AUXDATA("arm,pl18x", 0x80005000, "sdi2", &mop500_sdi2_data), | |
268 | OF_DEV_AUXDATA("arm,pl18x", 0x80114000, "sdi4", &mop500_sdi4_data), | |
269 | /* Requires clock name bindings. */ | |
270 | OF_DEV_AUXDATA("st,nomadik-gpio", 0x8012e000, "gpio.0", NULL), | |
271 | OF_DEV_AUXDATA("st,nomadik-gpio", 0x8012e080, "gpio.1", NULL), | |
272 | OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e000, "gpio.2", NULL), | |
273 | OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e080, "gpio.3", NULL), | |
274 | OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e100, "gpio.4", NULL), | |
275 | OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e180, "gpio.5", NULL), | |
276 | OF_DEV_AUXDATA("st,nomadik-gpio", 0x8011e000, "gpio.6", NULL), | |
277 | OF_DEV_AUXDATA("st,nomadik-gpio", 0x8011e080, "gpio.7", NULL), | |
278 | OF_DEV_AUXDATA("st,nomadik-gpio", 0xa03fe000, "gpio.8", NULL), | |
279 | OF_DEV_AUXDATA("st,nomadik-i2c", 0x80004000, "nmk-i2c.0", NULL), | |
280 | OF_DEV_AUXDATA("st,nomadik-i2c", 0x80122000, "nmk-i2c.1", NULL), | |
281 | OF_DEV_AUXDATA("st,nomadik-i2c", 0x80128000, "nmk-i2c.2", NULL), | |
282 | OF_DEV_AUXDATA("st,nomadik-i2c", 0x80110000, "nmk-i2c.3", NULL), | |
283 | OF_DEV_AUXDATA("st,nomadik-i2c", 0x8012a000, "nmk-i2c.4", NULL), | |
284 | /* Requires device name bindings. */ | |
285 | OF_DEV_AUXDATA("stericsson,nmk_pinctrl", 0, "pinctrl-db8500", NULL), | |
286 | /* Requires clock name and DMA bindings. */ | |
287 | OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80123000, | |
288 | "ux500-msp-i2s.0", &msp0_platform_data), | |
289 | OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80124000, | |
290 | "ux500-msp-i2s.1", &msp1_platform_data), | |
291 | OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80117000, | |
292 | "ux500-msp-i2s.2", &msp2_platform_data), | |
293 | OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80125000, | |
294 | "ux500-msp-i2s.3", &msp3_platform_data), | |
295 | {}, | |
296 | }; | |
297 | ||
298 | static const struct of_device_id u8500_local_bus_nodes[] = { | |
299 | /* only create devices below soc node */ | |
300 | { .compatible = "stericsson,db8500", }, | |
301 | { .compatible = "stericsson,db8500-prcmu", }, | |
302 | { .compatible = "simple-bus"}, | |
303 | { }, | |
304 | }; | |
305 | ||
306 | static void __init u8500_init_machine(void) | |
307 | { | |
308 | struct device *parent = NULL; | |
309 | ||
310 | /* Pinmaps must be in place before devices register */ | |
311 | if (of_machine_is_compatible("st-ericsson,mop500")) | |
312 | mop500_pinmaps_init(); | |
313 | else if (of_machine_is_compatible("calaosystems,snowball-a9500")) | |
314 | snowball_pinmaps_init(); | |
315 | else if (of_machine_is_compatible("st-ericsson,hrefv60+")) | |
316 | hrefv60_pinmaps_init(); | |
58e5b9e3 LJ |
317 | else if (of_machine_is_compatible("st-ericsson,ccu9540")) {} |
318 | /* TODO: Add pinmaps for ccu9540 board. */ | |
fa86a764 LJ |
319 | |
320 | /* TODO: Export SoC, USB, cpu-freq and DMA40 */ | |
321 | parent = u8500_of_init_devices(); | |
322 | ||
323 | /* automatically probe child nodes of db8500 device */ | |
324 | of_platform_populate(NULL, u8500_local_bus_nodes, u8500_auxdata_lookup, parent); | |
fa86a764 LJ |
325 | } |
326 | ||
79b40753 LJ |
327 | static const char * stericsson_dt_platform_compat[] = { |
328 | "st-ericsson,u8500", | |
329 | "st-ericsson,u8540", | |
330 | "st-ericsson,u9500", | |
331 | "st-ericsson,u9540", | |
fa86a764 LJ |
332 | NULL, |
333 | }; | |
334 | ||
46c1bf81 | 335 | DT_MACHINE_START(U8500_DT, "ST-Ericsson Ux5x0 platform (Device Tree Support)") |
f44c5fd1 | 336 | .smp = smp_ops(ux500_smp_ops), |
fa86a764 LJ |
337 | .map_io = u8500_map_io, |
338 | .init_irq = ux500_init_irq, | |
339 | /* we re-use nomadik timer here */ | |
340 | .timer = &ux500_timer, | |
341 | .handle_irq = gic_handle_irq, | |
342 | .init_machine = u8500_init_machine, | |
74a1c9ab | 343 | .init_late = NULL, |
79b40753 | 344 | .dt_compat = stericsson_dt_platform_compat, |
fa86a764 LJ |
345 | MACHINE_END |
346 | ||
347 | #endif |