[mirror_ubuntu-zesty-kernel.git] / arch / arm / mach-ux500 / cpu-u8500.c

/*
 * Copyright (C) 2008-2009 ST-Ericsson
 *
 * Author: Srinidhi KASAGAR <srinidhi.kasagar@stericsson.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2, as
 * published by the Free Software Foundation.
 *
 */
#include <linux/types.h>
#include <linux/init.h>
#include <linux/device.h>
#include <linux/amba/bus.h>
#include <linux/irq.h>
#include <linux/gpio.h>
#include <linux/platform_device.h>
#include <linux/io.h>

#include <asm/localtimer.h>
#include <asm/hardware/gic.h>
#include <asm/mach/map.h>
#include <asm/hardware/cache-l2x0.h>
#include <plat/mtu.h>
#include <mach/hardware.h>
#include <mach/setup.h>

#define GPIO_RESOURCE(block)						\
	{								\
		.start	= U8500_GPIOBANK##block##_BASE,			\
		.end	= U8500_GPIOBANK##block##_BASE + 127,		\
		.flags	= IORESOURCE_MEM,				\
	},								\
	{								\
		.start	= IRQ_GPIO##block,				\
		.end	= IRQ_GPIO##block,				\
		.flags	= IORESOURCE_IRQ,				\
	}

#define GPIO_DEVICE(block)						\
	{								\
		.name 		= "gpio",				\
		.id		= block,				\
		.num_resources 	= 2,					\
		.resource	= &u8500_gpio_resources[block * 2],	\
		.dev = {						\
			.platform_data = &u8500_gpio_data[block],	\
		},							\
	}

#define GPIO_DATA(_name, first)						\
	{								\
		.name 		= _name,				\
		.first_gpio 	= first,				\
		.first_irq 	= NOMADIK_GPIO_TO_IRQ(first),		\
	}

static struct nmk_gpio_platform_data u8500_gpio_data[] = {
	GPIO_DATA("GPIO-0-31", 0),
	GPIO_DATA("GPIO-32-63", 32), /* 37..63 not routed to pin */
	GPIO_DATA("GPIO-64-95", 64),
	GPIO_DATA("GPIO-96-127", 96), /* 97..127 not routed to pin */
	GPIO_DATA("GPIO-128-159", 128),
	GPIO_DATA("GPIO-160-191", 160), /* 172..191 not routed to pin */
	GPIO_DATA("GPIO-192-223", 192),
	GPIO_DATA("GPIO-224-255", 224), /* 231..255 not routed to pin */
	GPIO_DATA("GPIO-256-288", 256), /* 258..288 not routed to pin */
};

static struct resource u8500_gpio_resources[] = {
	GPIO_RESOURCE(0),
	GPIO_RESOURCE(1),
	GPIO_RESOURCE(2),
	GPIO_RESOURCE(3),
	GPIO_RESOURCE(4),
	GPIO_RESOURCE(5),
	GPIO_RESOURCE(6),
	GPIO_RESOURCE(7),
	GPIO_RESOURCE(8),
};

static struct platform_device u8500_gpio_devs[] = {
	GPIO_DEVICE(0),
	GPIO_DEVICE(1),
	GPIO_DEVICE(2),
	GPIO_DEVICE(3),
	GPIO_DEVICE(4),
	GPIO_DEVICE(5),
	GPIO_DEVICE(6),
	GPIO_DEVICE(7),
	GPIO_DEVICE(8),
};

static struct platform_device *platform_devs[] __initdata = {
	&u8500_gpio_devs[0],
	&u8500_gpio_devs[1],
	&u8500_gpio_devs[2],
	&u8500_gpio_devs[3],
	&u8500_gpio_devs[4],
	&u8500_gpio_devs[5],
	&u8500_gpio_devs[6],
	&u8500_gpio_devs[7],
	&u8500_gpio_devs[8],
};

#define __IO_DEV_DESC(x, sz)	{		\
	.virtual	= IO_ADDRESS(x),	\
	.pfn		= __phys_to_pfn(x),	\
	.length		= sz,			\
	.type		= MT_DEVICE,		\
}

/* minimum static i/o mapping required to boot U8500 platforms */
static struct map_desc u8500_io_desc[] __initdata = {
	__IO_DEV_DESC(U8500_UART2_BASE, SZ_4K),
	__IO_DEV_DESC(U8500_GIC_CPU_BASE, SZ_4K),
	__IO_DEV_DESC(U8500_GIC_DIST_BASE, SZ_4K),
	__IO_DEV_DESC(U8500_TWD_BASE, SZ_4K),
	__IO_DEV_DESC(U8500_SCU_BASE, SZ_4K),
	__IO_DEV_DESC(U8500_BACKUPRAM0_BASE, SZ_8K),
	__IO_DEV_DESC(U8500_PRCMU_BASE, SZ_4K),
	__IO_DEV_DESC(U8500_CLKRST1_BASE, SZ_4K),
	__IO_DEV_DESC(U8500_CLKRST2_BASE, SZ_4K),
	__IO_DEV_DESC(U8500_CLKRST3_BASE, SZ_4K),
	__IO_DEV_DESC(U8500_CLKRST5_BASE, SZ_4K),
	__IO_DEV_DESC(U8500_CLKRST6_BASE, SZ_4K),
	__IO_DEV_DESC(U8500_GPIO0_BASE, SZ_4K),
	__IO_DEV_DESC(U8500_GPIO1_BASE, SZ_4K),
	__IO_DEV_DESC(U8500_GPIO2_BASE, SZ_4K),
	__IO_DEV_DESC(U8500_GPIO3_BASE, SZ_4K),
	__IO_DEV_DESC(U8500_L2CC_BASE, SZ_4K),
};

static struct map_desc u8500ed_io_desc[] __initdata = {
	__IO_DEV_DESC(U8500_MTU0_BASE_ED, SZ_4K),
	__IO_DEV_DESC(U8500_CLKRST7_BASE_ED, SZ_8K),
};

static struct map_desc u8500v1_io_desc[] __initdata = {
	__IO_DEV_DESC(U8500_MTU0_BASE, SZ_4K),
};

void __init u8500_map_io(void)
{
	iotable_init(u8500_io_desc, ARRAY_SIZE(u8500_io_desc));

	if (cpu_is_u8500ed())
		iotable_init(u8500ed_io_desc, ARRAY_SIZE(u8500ed_io_desc));
	else
		iotable_init(u8500v1_io_desc, ARRAY_SIZE(u8500v1_io_desc));
}

void __init u8500_init_irq(void)
{
	gic_dist_init(0, __io_address(U8500_GIC_DIST_BASE), 29);
	gic_cpu_init(0, __io_address(U8500_GIC_CPU_BASE));
}

/*
 * This function is called from the board init
 */
void __init u8500_init_devices(void)
{
	/* Register the platform devices */
	platform_add_devices(platform_devs, ARRAY_SIZE(platform_devs));

	return ;
}

static void __init u8500_timer_init(void)
{
#ifdef CONFIG_LOCAL_TIMERS
	/* Setup the local timer base */
	twd_base = __io_address(U8500_TWD_BASE);
#endif
	/* Setup the MTU base */
	if (cpu_is_u8500ed())
		mtu_base = __io_address(U8500_MTU0_BASE_ED);
	else
		mtu_base = __io_address(U8500_MTU0_BASE);

	nmdk_timer_init();
}

struct sys_timer u8500_timer = {
	.init	= u8500_timer_init,
};

#ifdef CONFIG_CACHE_L2X0
static int u8500_l2x0_init(void)
{
	void __iomem *l2x0_base;

	l2x0_base = __io_address(U8500_L2CC_BASE);

	/* 64KB way size, 8 way associativity, force WA */
	l2x0_init(l2x0_base, 0x3e060000, 0xc0000fff);

	return 0;
}
early_initcall(u8500_l2x0_init);
#endif
Commit	Line	Data
aa44ef4d SK	1	/*
	2	* Copyright (C) 2008-2009 ST-Ericsson
	3	*
	4	* Author: Srinidhi KASAGAR <srinidhi.kasagar@stericsson.com>
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License version 2, as
	8	* published by the Free Software Foundation.
	9	*
	10	*/
	11	#include <linux/types.h>
	12	#include <linux/init.h>
	13	#include <linux/device.h>
	14	#include <linux/amba/bus.h>
	15	#include <linux/irq.h>
94bdc0e2	16	#include <linux/gpio.h>
aa44ef4d	17	#include <linux/platform_device.h>
cc2c1334	18	#include <linux/io.h>
aa44ef4d	19
cc2c1334	20	#include <asm/localtimer.h>
aa44ef4d SK	21	#include <asm/hardware/gic.h>
aa44ef4d SK	22	#include <asm/mach/map.h>
8e797a7e	23	#include <asm/hardware/cache-l2x0.h>
cc2c1334	24	#include <plat/mtu.h>
aa44ef4d	25	#include <mach/hardware.h>
cc2c1334	26	#include <mach/setup.h>
aa44ef4d	27
94bdc0e2 RV	28	#define GPIO_RESOURCE(block) \
	29	{ \
	30	.start = U8500_GPIOBANK##block##_BASE, \
	31	.end = U8500_GPIOBANK##block##_BASE + 127, \
	32	.flags = IORESOURCE_MEM, \
	33	}, \
	34	{ \
	35	.start = IRQ_GPIO##block, \
	36	.end = IRQ_GPIO##block, \
	37	.flags = IORESOURCE_IRQ, \
	38	}
	39
	40	#define GPIO_DEVICE(block) \
	41	{ \
	42	.name = "gpio", \
	43	.id = block, \
	44	.num_resources = 2, \
	45	.resource = &u8500_gpio_resources[block * 2], \
	46	.dev = { \
	47	.platform_data = &u8500_gpio_data[block], \
	48	}, \
	49	}
	50
	51	#define GPIO_DATA(_name, first) \
	52	{ \
	53	.name = _name, \
	54	.first_gpio = first, \
	55	.first_irq = NOMADIK_GPIO_TO_IRQ(first), \
	56	}
	57
	58	static struct nmk_gpio_platform_data u8500_gpio_data[] = {
	59	GPIO_DATA("GPIO-0-31", 0),
	60	GPIO_DATA("GPIO-32-63", 32), /* 37..63 not routed to pin */
	61	GPIO_DATA("GPIO-64-95", 64),
	62	GPIO_DATA("GPIO-96-127", 96), /* 97..127 not routed to pin */
	63	GPIO_DATA("GPIO-128-159", 128),
	64	GPIO_DATA("GPIO-160-191", 160), /* 172..191 not routed to pin */
	65	GPIO_DATA("GPIO-192-223", 192),
	66	GPIO_DATA("GPIO-224-255", 224), /* 231..255 not routed to pin */
	67	GPIO_DATA("GPIO-256-288", 256), /* 258..288 not routed to pin */
	68	};
	69
	70	static struct resource u8500_gpio_resources[] = {
	71	GPIO_RESOURCE(0),
	72	GPIO_RESOURCE(1),
	73	GPIO_RESOURCE(2),
	74	GPIO_RESOURCE(3),
	75	GPIO_RESOURCE(4),
	76	GPIO_RESOURCE(5),
	77	GPIO_RESOURCE(6),
	78	GPIO_RESOURCE(7),
	79	GPIO_RESOURCE(8),
	80	};
	81
	82	static struct platform_device u8500_gpio_devs[] = {
	83	GPIO_DEVICE(0),
	84	GPIO_DEVICE(1),
	85	GPIO_DEVICE(2),
	86	GPIO_DEVICE(3),
	87	GPIO_DEVICE(4),
	88	GPIO_DEVICE(5),
	89	GPIO_DEVICE(6),
	90	GPIO_DEVICE(7),
	91	GPIO_DEVICE(8),
92	};
93
aa44ef4d	94	static struct platform_device *platform_devs[] __initdata = {
94bdc0e2 RV	95	&u8500_gpio_devs[0],
	96	&u8500_gpio_devs[1],
	97	&u8500_gpio_devs[2],
	98	&u8500_gpio_devs[3],
	99	&u8500_gpio_devs[4],
	100	&u8500_gpio_devs[5],
	101	&u8500_gpio_devs[6],
	102	&u8500_gpio_devs[7],
	103	&u8500_gpio_devs[8],
aa44ef4d SK	104	};
	105
	106	#define __IO_DEV_DESC(x, sz) { \
	107	.virtual = IO_ADDRESS(x), \
	108	.pfn = __phys_to_pfn(x), \
	109	.length = sz, \
	110	.type = MT_DEVICE, \
	111	}
	112
	113	/* minimum static i/o mapping required to boot U8500 platforms */
	114	static struct map_desc u8500_io_desc[] __initdata = {
59778fb6	115	__IO_DEV_DESC(U8500_UART2_BASE, SZ_4K),
aa44ef4d SK	116	__IO_DEV_DESC(U8500_GIC_CPU_BASE, SZ_4K),
aa44ef4d SK	117	__IO_DEV_DESC(U8500_GIC_DIST_BASE, SZ_4K),
aa44ef4d SK	118	__IO_DEV_DESC(U8500_TWD_BASE, SZ_4K),
	119	__IO_DEV_DESC(U8500_SCU_BASE, SZ_4K),
	120	__IO_DEV_DESC(U8500_BACKUPRAM0_BASE, SZ_8K),
1df20afc RV	121	__IO_DEV_DESC(U8500_PRCMU_BASE, SZ_4K),
	122	__IO_DEV_DESC(U8500_CLKRST1_BASE, SZ_4K),
	123	__IO_DEV_DESC(U8500_CLKRST2_BASE, SZ_4K),
	124	__IO_DEV_DESC(U8500_CLKRST3_BASE, SZ_4K),
	125	__IO_DEV_DESC(U8500_CLKRST5_BASE, SZ_4K),
	126	__IO_DEV_DESC(U8500_CLKRST6_BASE, SZ_4K),
c9c09572	127	__IO_DEV_DESC(U8500_GPIO0_BASE, SZ_4K),
94bdc0e2 RV	128	__IO_DEV_DESC(U8500_GPIO1_BASE, SZ_4K),
	129	__IO_DEV_DESC(U8500_GPIO2_BASE, SZ_4K),
	130	__IO_DEV_DESC(U8500_GPIO3_BASE, SZ_4K),
8e797a7e	131	__IO_DEV_DESC(U8500_L2CC_BASE, SZ_4K),
aa44ef4d SK	132	};
aa44ef4d SK	133
75a36ee0 RV	134	static struct map_desc u8500ed_io_desc[] __initdata = {
75a36ee0 RV	135	__IO_DEV_DESC(U8500_MTU0_BASE_ED, SZ_4K),
1df20afc	136	__IO_DEV_DESC(U8500_CLKRST7_BASE_ED, SZ_8K),
75a36ee0 RV	137	};
	138
	139	static struct map_desc u8500v1_io_desc[] __initdata = {
c9c09572	140	__IO_DEV_DESC(U8500_MTU0_BASE, SZ_4K),
75a36ee0 RV	141	};
75a36ee0 RV	142
aa44ef4d SK	143	void __init u8500_map_io(void)
	144	{
	145	iotable_init(u8500_io_desc, ARRAY_SIZE(u8500_io_desc));
75a36ee0 RV	146
	147	if (cpu_is_u8500ed())
	148	iotable_init(u8500ed_io_desc, ARRAY_SIZE(u8500ed_io_desc));
	149	else
	150	iotable_init(u8500v1_io_desc, ARRAY_SIZE(u8500v1_io_desc));
aa44ef4d SK	151	}
	152
	153	void __init u8500_init_irq(void)
	154	{
	155	gic_dist_init(0, __io_address(U8500_GIC_DIST_BASE), 29);
	156	gic_cpu_init(0, __io_address(U8500_GIC_CPU_BASE));
	157	}
	158
	159	/*
	160	* This function is called from the board init
	161	*/
	162	void __init u8500_init_devices(void)
	163	{
	164	/* Register the platform devices */
	165	platform_add_devices(platform_devs, ARRAY_SIZE(platform_devs));
	166
	167	return ;
	168	}
cc2c1334 RV	169
	170	static void __init u8500_timer_init(void)
	171	{
	172	#ifdef CONFIG_LOCAL_TIMERS
	173	/* Setup the local timer base */
	174	twd_base = __io_address(U8500_TWD_BASE);
	175	#endif
	176	/* Setup the MTU base */
75a36ee0 RV	177	if (cpu_is_u8500ed())
	178	mtu_base = __io_address(U8500_MTU0_BASE_ED);
	179	else
c9c09572	180	mtu_base = __io_address(U8500_MTU0_BASE);
cc2c1334 RV	181
	182	nmdk_timer_init();
	183	}
	184
	185	struct sys_timer u8500_timer = {
	186	.init = u8500_timer_init,
	187	};
8e797a7e SK	188
	189	#ifdef CONFIG_CACHE_L2X0
	190	static int u8500_l2x0_init(void)
	191	{
	192	void __iomem *l2x0_base;
	193
	194	l2x0_base = __io_address(U8500_L2CC_BASE);
	195
	196	/* 64KB way size, 8 way associativity, force WA */
	197	l2x0_init(l2x0_base, 0x3e060000, 0xc0000fff);
	198
	199	return 0;
	200	}
	201	early_initcall(u8500_l2x0_init);
	202	#endif