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1a59d1b8 | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
3ba7222a GL |
2 | /* |
3 | * Versatile board support using the device tree | |
4 | * | |
5 | * Copyright (C) 2010 Secret Lab Technologies Ltd. | |
6 | * Copyright (C) 2009 Jeremy Kerr <jeremy.kerr@canonical.com> | |
7 | * Copyright (C) 2004 ARM Limited | |
8 | * Copyright (C) 2000 Deep Blue Solutions Ltd | |
3ba7222a GL |
9 | */ |
10 | ||
11 | #include <linux/init.h> | |
a8e2894c RH |
12 | #include <linux/io.h> |
13 | #include <linux/of.h> | |
14 | #include <linux/of_address.h> | |
3ba7222a GL |
15 | #include <linux/of_irq.h> |
16 | #include <linux/of_platform.h> | |
a8e2894c | 17 | #include <linux/slab.h> |
a7096789 RH |
18 | #include <linux/amba/bus.h> |
19 | #include <linux/amba/clcd.h> | |
20 | #include <linux/platform_data/video-clcd-versatile.h> | |
21 | #include <linux/amba/mmci.h> | |
3ba7222a GL |
22 | #include <asm/mach-types.h> |
23 | #include <asm/mach/arch.h> | |
a7096789 | 24 | #include <asm/mach/map.h> |
3ba7222a | 25 | |
a7096789 RH |
26 | /* macro to get at MMIO space when running virtually */ |
27 | #define IO_ADDRESS(x) (((x) & 0x0fffffff) + (((x) >> 4) & 0x0f000000) + 0xf0000000) | |
28 | #define __io_address(n) ((void __iomem __force *)IO_ADDRESS(n)) | |
3ba7222a | 29 | |
a7096789 RH |
30 | /* |
31 | * ------------------------------------------------------------------------ | |
32 | * Versatile Registers | |
33 | * ------------------------------------------------------------------------ | |
34 | */ | |
a8e2894c | 35 | #define VERSATILE_SYS_PCICTL_OFFSET 0x44 |
a7096789 | 36 | #define VERSATILE_SYS_MCI_OFFSET 0x48 |
a7096789 RH |
37 | #define VERSATILE_SYS_CLCD_OFFSET 0x50 |
38 | ||
a7096789 RH |
39 | /* |
40 | * VERSATILE peripheral addresses | |
41 | */ | |
42 | #define VERSATILE_MMCI0_BASE 0x10005000 /* MMC interface */ | |
43 | #define VERSATILE_MMCI1_BASE 0x1000B000 /* MMC Interface */ | |
44 | #define VERSATILE_CLCD_BASE 0x10120000 /* CLCD */ | |
45 | #define VERSATILE_SCTL_BASE 0x101E0000 /* System controller */ | |
46 | #define VERSATILE_IB2_BASE 0x24000000 /* IB2 module */ | |
47 | #define VERSATILE_IB2_CTL_BASE (VERSATILE_IB2_BASE + 0x03000000) | |
48 | ||
49 | /* | |
50 | * System controller bit assignment | |
51 | */ | |
52 | #define VERSATILE_REFCLK 0 | |
53 | #define VERSATILE_TIMCLK 1 | |
54 | ||
55 | #define VERSATILE_TIMER1_EnSel 15 | |
56 | #define VERSATILE_TIMER2_EnSel 17 | |
57 | #define VERSATILE_TIMER3_EnSel 19 | |
58 | #define VERSATILE_TIMER4_EnSel 21 | |
59 | ||
a8e2894c | 60 | static void __iomem *versatile_sys_base; |
a7096789 RH |
61 | static void __iomem *versatile_ib2_ctrl; |
62 | ||
a7096789 RH |
63 | unsigned int mmc_status(struct device *dev) |
64 | { | |
65 | struct amba_device *adev = container_of(dev, struct amba_device, dev); | |
66 | u32 mask; | |
67 | ||
68 | if (adev->res.start == VERSATILE_MMCI0_BASE) | |
69 | mask = 1; | |
70 | else | |
71 | mask = 2; | |
72 | ||
73 | return readl(versatile_sys_base + VERSATILE_SYS_MCI_OFFSET) & mask; | |
74 | } | |
75 | ||
76 | static struct mmci_platform_data mmc0_plat_data = { | |
77 | .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, | |
78 | .status = mmc_status, | |
a7096789 RH |
79 | }; |
80 | ||
81 | static struct mmci_platform_data mmc1_plat_data = { | |
82 | .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, | |
83 | .status = mmc_status, | |
a7096789 RH |
84 | }; |
85 | ||
86 | /* | |
87 | * CLCD support. | |
88 | */ | |
89 | #define SYS_CLCD_MODE_MASK (3 << 0) | |
90 | #define SYS_CLCD_MODE_888 (0 << 0) | |
91 | #define SYS_CLCD_MODE_5551 (1 << 0) | |
92 | #define SYS_CLCD_MODE_565_RLSB (2 << 0) | |
93 | #define SYS_CLCD_MODE_565_BLSB (3 << 0) | |
94 | #define SYS_CLCD_NLCDIOON (1 << 2) | |
95 | #define SYS_CLCD_VDDPOSSWITCH (1 << 3) | |
96 | #define SYS_CLCD_PWR3V5SWITCH (1 << 4) | |
97 | #define SYS_CLCD_ID_MASK (0x1f << 8) | |
98 | #define SYS_CLCD_ID_SANYO_3_8 (0x00 << 8) | |
99 | #define SYS_CLCD_ID_UNKNOWN_8_4 (0x01 << 8) | |
100 | #define SYS_CLCD_ID_EPSON_2_2 (0x02 << 8) | |
101 | #define SYS_CLCD_ID_SANYO_2_5 (0x07 << 8) | |
102 | #define SYS_CLCD_ID_VGA (0x1f << 8) | |
103 | ||
104 | static bool is_sanyo_2_5_lcd; | |
105 | ||
106 | /* | |
107 | * Disable all display connectors on the interface module. | |
108 | */ | |
109 | static void versatile_clcd_disable(struct clcd_fb *fb) | |
110 | { | |
111 | void __iomem *sys_clcd = versatile_sys_base + VERSATILE_SYS_CLCD_OFFSET; | |
112 | u32 val; | |
113 | ||
114 | val = readl(sys_clcd); | |
115 | val &= ~SYS_CLCD_NLCDIOON | SYS_CLCD_PWR3V5SWITCH; | |
116 | writel(val, sys_clcd); | |
117 | ||
118 | /* | |
119 | * If the LCD is Sanyo 2x5 in on the IB2 board, turn the back-light off | |
120 | */ | |
121 | if (of_machine_is_compatible("arm,versatile-ab") && is_sanyo_2_5_lcd) { | |
122 | unsigned long ctrl; | |
123 | ||
124 | ctrl = readl(versatile_ib2_ctrl); | |
125 | ctrl &= ~0x01; | |
126 | writel(ctrl, versatile_ib2_ctrl); | |
127 | } | |
128 | } | |
129 | ||
130 | /* | |
131 | * Enable the relevant connector on the interface module. | |
132 | */ | |
133 | static void versatile_clcd_enable(struct clcd_fb *fb) | |
134 | { | |
135 | struct fb_var_screeninfo *var = &fb->fb.var; | |
136 | void __iomem *sys_clcd = versatile_sys_base + VERSATILE_SYS_CLCD_OFFSET; | |
137 | u32 val; | |
138 | ||
139 | val = readl(sys_clcd); | |
140 | val &= ~SYS_CLCD_MODE_MASK; | |
141 | ||
142 | switch (var->green.length) { | |
143 | case 5: | |
144 | val |= SYS_CLCD_MODE_5551; | |
145 | break; | |
146 | case 6: | |
147 | if (var->red.offset == 0) | |
148 | val |= SYS_CLCD_MODE_565_RLSB; | |
149 | else | |
150 | val |= SYS_CLCD_MODE_565_BLSB; | |
151 | break; | |
152 | case 8: | |
153 | val |= SYS_CLCD_MODE_888; | |
154 | break; | |
155 | } | |
156 | ||
157 | /* | |
158 | * Set the MUX | |
159 | */ | |
160 | writel(val, sys_clcd); | |
161 | ||
162 | /* | |
163 | * And now enable the PSUs | |
164 | */ | |
165 | val |= SYS_CLCD_NLCDIOON | SYS_CLCD_PWR3V5SWITCH; | |
166 | writel(val, sys_clcd); | |
167 | ||
168 | /* | |
169 | * If the LCD is Sanyo 2x5 in on the IB2 board, turn the back-light on | |
170 | */ | |
171 | if (of_machine_is_compatible("arm,versatile-ab") && is_sanyo_2_5_lcd) { | |
172 | unsigned long ctrl; | |
173 | ||
174 | ctrl = readl(versatile_ib2_ctrl); | |
175 | ctrl |= 0x01; | |
176 | writel(ctrl, versatile_ib2_ctrl); | |
177 | } | |
178 | } | |
179 | ||
180 | /* | |
181 | * Detect which LCD panel is connected, and return the appropriate | |
182 | * clcd_panel structure. Note: we do not have any information on | |
183 | * the required timings for the 8.4in panel, so we presently assume | |
184 | * VGA timings. | |
185 | */ | |
186 | static int versatile_clcd_setup(struct clcd_fb *fb) | |
187 | { | |
188 | void __iomem *sys_clcd = versatile_sys_base + VERSATILE_SYS_CLCD_OFFSET; | |
189 | const char *panel_name; | |
190 | u32 val; | |
191 | ||
192 | is_sanyo_2_5_lcd = false; | |
193 | ||
194 | val = readl(sys_clcd) & SYS_CLCD_ID_MASK; | |
195 | if (val == SYS_CLCD_ID_SANYO_3_8) | |
196 | panel_name = "Sanyo TM38QV67A02A"; | |
197 | else if (val == SYS_CLCD_ID_SANYO_2_5) { | |
198 | panel_name = "Sanyo QVGA Portrait"; | |
199 | is_sanyo_2_5_lcd = true; | |
200 | } else if (val == SYS_CLCD_ID_EPSON_2_2) | |
201 | panel_name = "Epson L2F50113T00"; | |
202 | else if (val == SYS_CLCD_ID_VGA) | |
203 | panel_name = "VGA"; | |
204 | else { | |
205 | printk(KERN_ERR "CLCD: unknown LCD panel ID 0x%08x, using VGA\n", | |
206 | val); | |
207 | panel_name = "VGA"; | |
208 | } | |
209 | ||
210 | fb->panel = versatile_clcd_get_panel(panel_name); | |
211 | if (!fb->panel) | |
212 | return -EINVAL; | |
213 | ||
214 | return versatile_clcd_setup_dma(fb, SZ_1M); | |
215 | } | |
216 | ||
217 | static void versatile_clcd_decode(struct clcd_fb *fb, struct clcd_regs *regs) | |
218 | { | |
219 | clcdfb_decode(fb, regs); | |
220 | ||
221 | /* Always clear BGR for RGB565: we do the routing externally */ | |
222 | if (fb->fb.var.green.length == 6) | |
223 | regs->cntl &= ~CNTL_BGR; | |
224 | } | |
225 | ||
226 | static struct clcd_board clcd_plat_data = { | |
227 | .name = "Versatile", | |
228 | .caps = CLCD_CAP_5551 | CLCD_CAP_565 | CLCD_CAP_888, | |
229 | .check = clcdfb_check, | |
230 | .decode = versatile_clcd_decode, | |
231 | .disable = versatile_clcd_disable, | |
232 | .enable = versatile_clcd_enable, | |
233 | .setup = versatile_clcd_setup, | |
234 | .mmap = versatile_clcd_mmap_dma, | |
235 | .remove = versatile_clcd_remove_dma, | |
236 | }; | |
237 | ||
238 | /* | |
239 | * Lookup table for attaching a specific name and platform_data pointer to | |
240 | * devices as they get created by of_platform_populate(). Ideally this table | |
241 | * would not exist, but the current clock implementation depends on some devices | |
242 | * having a specific name. | |
243 | */ | |
244 | struct of_dev_auxdata versatile_auxdata_lookup[] __initdata = { | |
245 | OF_DEV_AUXDATA("arm,primecell", VERSATILE_MMCI0_BASE, "fpga:05", &mmc0_plat_data), | |
246 | OF_DEV_AUXDATA("arm,primecell", VERSATILE_MMCI1_BASE, "fpga:0b", &mmc1_plat_data), | |
247 | OF_DEV_AUXDATA("arm,primecell", VERSATILE_CLCD_BASE, "dev:20", &clcd_plat_data), | |
248 | {} | |
249 | }; | |
250 | ||
251 | static struct map_desc versatile_io_desc[] __initdata __maybe_unused = { | |
252 | { | |
253 | .virtual = IO_ADDRESS(VERSATILE_SCTL_BASE), | |
254 | .pfn = __phys_to_pfn(VERSATILE_SCTL_BASE), | |
255 | .length = SZ_4K * 9, | |
256 | .type = MT_DEVICE | |
257 | } | |
258 | }; | |
259 | ||
260 | static void __init versatile_map_io(void) | |
261 | { | |
262 | debug_ll_io_init(); | |
263 | iotable_init(versatile_io_desc, ARRAY_SIZE(versatile_io_desc)); | |
264 | } | |
265 | ||
266 | static void __init versatile_init_early(void) | |
267 | { | |
268 | u32 val; | |
269 | ||
270 | /* | |
271 | * set clock frequency: | |
272 | * VERSATILE_REFCLK is 32KHz | |
273 | * VERSATILE_TIMCLK is 1MHz | |
274 | */ | |
275 | val = readl(__io_address(VERSATILE_SCTL_BASE)); | |
276 | writel((VERSATILE_TIMCLK << VERSATILE_TIMER1_EnSel) | | |
277 | (VERSATILE_TIMCLK << VERSATILE_TIMER2_EnSel) | | |
278 | (VERSATILE_TIMCLK << VERSATILE_TIMER3_EnSel) | | |
279 | (VERSATILE_TIMCLK << VERSATILE_TIMER4_EnSel) | val, | |
280 | __io_address(VERSATILE_SCTL_BASE)); | |
281 | } | |
282 | ||
a8e2894c RH |
283 | static void __init versatile_dt_pci_init(void) |
284 | { | |
285 | u32 val; | |
286 | struct device_node *np; | |
287 | struct property *newprop; | |
288 | ||
289 | np = of_find_compatible_node(NULL, NULL, "arm,versatile-pci"); | |
290 | if (!np) | |
291 | return; | |
292 | ||
293 | /* Check if PCI backplane is detected */ | |
294 | val = readl(versatile_sys_base + VERSATILE_SYS_PCICTL_OFFSET); | |
295 | if (val & 1) { | |
296 | /* | |
297 | * Enable PCI accesses. Note that the documentaton is | |
298 | * inconsistent whether or not this is needed, but the old | |
299 | * driver had it so we will keep it. | |
300 | */ | |
301 | writel(1, versatile_sys_base + VERSATILE_SYS_PCICTL_OFFSET); | |
302 | return; | |
303 | } | |
304 | ||
305 | newprop = kzalloc(sizeof(*newprop), GFP_KERNEL); | |
306 | if (!newprop) | |
307 | return; | |
308 | ||
309 | newprop->name = kstrdup("status", GFP_KERNEL); | |
310 | newprop->value = kstrdup("disabled", GFP_KERNEL); | |
311 | newprop->length = sizeof("disabled"); | |
312 | of_update_property(np, newprop); | |
313 | ||
314 | pr_info("Not plugged into PCI backplane!\n"); | |
315 | } | |
316 | ||
3ba7222a GL |
317 | static void __init versatile_dt_init(void) |
318 | { | |
a8e2894c RH |
319 | struct device_node *np; |
320 | ||
321 | np = of_find_compatible_node(NULL, NULL, "arm,core-module-versatile"); | |
322 | if (np) | |
323 | versatile_sys_base = of_iomap(np, 0); | |
324 | WARN_ON(!versatile_sys_base); | |
325 | ||
a7096789 RH |
326 | versatile_ib2_ctrl = ioremap(VERSATILE_IB2_CTL_BASE, SZ_4K); |
327 | ||
a8e2894c RH |
328 | versatile_dt_pci_init(); |
329 | ||
435ebcbc | 330 | of_platform_default_populate(NULL, versatile_auxdata_lookup, NULL); |
3ba7222a GL |
331 | } |
332 | ||
543c5040 | 333 | static const char *const versatile_dt_match[] __initconst = { |
3ba7222a GL |
334 | "arm,versatile-ab", |
335 | "arm,versatile-pb", | |
336 | NULL, | |
337 | }; | |
338 | ||
339 | DT_MACHINE_START(VERSATILE_PB, "ARM-Versatile (Device Tree Support)") | |
340 | .map_io = versatile_map_io, | |
341 | .init_early = versatile_init_early, | |
3ba7222a GL |
342 | .init_machine = versatile_dt_init, |
343 | .dt_compat = versatile_dt_match, | |
344 | MACHINE_END |