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1 | /* linux/arch/arm/mach-vt8500/devices-vt8500.c |
2 | * | |
3 | * Copyright (C) 2010 Alexey Charkov <alchark@gmail.com> | |
4 | * | |
5 | * This software is licensed under the terms of the GNU General Public | |
6 | * License version 2, as published by the Free Software Foundation, and | |
7 | * may be copied, distributed, and modified under those terms. | |
8 | * | |
9 | * This program is distributed in the hope that it will be useful, | |
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
12 | * GNU General Public License for more details. | |
13 | * | |
14 | */ | |
15 | ||
16 | #include <linux/platform_device.h> | |
17 | ||
18 | #include <mach/vt8500_regs.h> | |
19 | #include <mach/vt8500_irqs.h> | |
20 | #include <mach/i8042.h> | |
21 | #include "devices.h" | |
22 | ||
23 | void __init vt8500_set_resources(void) | |
24 | { | |
25 | struct resource tmp[3]; | |
26 | ||
27 | tmp[0] = wmt_mmio_res(VT8500_LCDC_BASE, SZ_1K); | |
28 | tmp[1] = wmt_irq_res(IRQ_LCDC); | |
29 | wmt_res_add(&vt8500_device_lcdc, tmp, 2); | |
30 | ||
31 | tmp[0] = wmt_mmio_res(VT8500_UART0_BASE, 0x1040); | |
32 | tmp[1] = wmt_irq_res(IRQ_UART0); | |
33 | wmt_res_add(&vt8500_device_uart0, tmp, 2); | |
34 | ||
35 | tmp[0] = wmt_mmio_res(VT8500_UART1_BASE, 0x1040); | |
36 | tmp[1] = wmt_irq_res(IRQ_UART1); | |
37 | wmt_res_add(&vt8500_device_uart1, tmp, 2); | |
38 | ||
39 | tmp[0] = wmt_mmio_res(VT8500_UART2_BASE, 0x1040); | |
40 | tmp[1] = wmt_irq_res(IRQ_UART2); | |
41 | wmt_res_add(&vt8500_device_uart2, tmp, 2); | |
42 | ||
43 | tmp[0] = wmt_mmio_res(VT8500_UART3_BASE, 0x1040); | |
44 | tmp[1] = wmt_irq_res(IRQ_UART3); | |
45 | wmt_res_add(&vt8500_device_uart3, tmp, 2); | |
46 | ||
47 | tmp[0] = wmt_mmio_res(VT8500_EHCI_BASE, SZ_512); | |
48 | tmp[1] = wmt_irq_res(IRQ_EHCI); | |
49 | wmt_res_add(&vt8500_device_ehci, tmp, 2); | |
50 | ||
100d4597 TP |
51 | /* vt8500 uses a single IRQ for both EHCI and UHCI controllers */ |
52 | tmp[0] = wmt_mmio_res(VT8500_UHCI_BASE, SZ_512); | |
53 | tmp[1] = wmt_irq_res(IRQ_EHCI); | |
54 | wmt_res_add(&vt8500_device_uhci, tmp, 2); | |
55 | ||
21f47fbc AC |
56 | tmp[0] = wmt_mmio_res(VT8500_GEGEA_BASE, SZ_256); |
57 | wmt_res_add(&vt8500_device_ge_rops, tmp, 1); | |
58 | ||
59 | tmp[0] = wmt_mmio_res(VT8500_PWM_BASE, 0x44); | |
60 | wmt_res_add(&vt8500_device_pwm, tmp, 1); | |
61 | ||
62 | tmp[0] = wmt_mmio_res(VT8500_RTC_BASE, 0x2c); | |
63 | tmp[1] = wmt_irq_res(IRQ_RTC); | |
64 | tmp[2] = wmt_irq_res(IRQ_RTCSM); | |
65 | wmt_res_add(&vt8500_device_rtc, tmp, 3); | |
66 | } | |
67 | ||
68 | static void __init vt8500_set_externs(void) | |
69 | { | |
70 | /* Non-resource-aware stuff */ | |
71 | wmt_ic_base = VT8500_IC_BASE; | |
72 | wmt_gpio_base = VT8500_GPIO_BASE; | |
73 | wmt_pmc_base = VT8500_PMC_BASE; | |
74 | wmt_i8042_base = VT8500_PS2_BASE; | |
75 | ||
76 | wmt_nr_irqs = VT8500_NR_IRQS; | |
77 | wmt_timer_irq = IRQ_PMCOS0; | |
78 | wmt_gpio_ext_irq[0] = IRQ_EXT0; | |
79 | wmt_gpio_ext_irq[1] = IRQ_EXT1; | |
80 | wmt_gpio_ext_irq[2] = IRQ_EXT2; | |
81 | wmt_gpio_ext_irq[3] = IRQ_EXT3; | |
82 | wmt_gpio_ext_irq[4] = IRQ_EXT4; | |
83 | wmt_gpio_ext_irq[5] = IRQ_EXT5; | |
84 | wmt_gpio_ext_irq[6] = IRQ_EXT6; | |
85 | wmt_gpio_ext_irq[7] = IRQ_EXT7; | |
86 | wmt_i8042_kbd_irq = IRQ_PS2KBD; | |
87 | wmt_i8042_aux_irq = IRQ_PS2MOUSE; | |
88 | } | |
89 | ||
90 | void __init vt8500_map_io(void) | |
91 | { | |
92 | iotable_init(wmt_io_desc, ARRAY_SIZE(wmt_io_desc)); | |
93 | ||
94 | /* Should be done before interrupts and timers are initialized */ | |
95 | vt8500_set_externs(); | |
96 | } |