[mirror_ubuntu-hirsute-kernel.git] / arch / arm / mach-w90x900 / gpio.c

/*
 * linux/arch/arm/mach-w90x900/gpio.c
 *
 * Generic nuc900 GPIO handling
 *
 *  Wan ZongShun <mcuos.com@gmail.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <linux/clk.h>
#include <linux/errno.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/debugfs.h>
#include <linux/seq_file.h>
#include <linux/kernel.h>
#include <linux/list.h>
#include <linux/module.h>
#include <linux/io.h>
#include <linux/gpio/driver.h>

#include <mach/hardware.h>

#define GPIO_BASE 		(W90X900_VA_GPIO)
#define GPIO_DIR		(0x04)
#define GPIO_OUT		(0x08)
#define GPIO_IN			(0x0C)
#define GROUPINERV		(0x10)
#define GPIO_GPIO(Nb)		(0x00000001 << (Nb))

#define NUC900_GPIO_CHIP(name, base_gpio, nr_gpio)			\
	{								\
		.chip = {						\
			.label		  = name,			\
			.direction_input  = nuc900_dir_input,		\
			.direction_output = nuc900_dir_output,		\
			.get		  = nuc900_gpio_get,		\
			.set		  = nuc900_gpio_set,		\
			.base		  = base_gpio,			\
			.ngpio		  = nr_gpio,			\
		}							\
	}

struct nuc900_gpio_chip {
	struct gpio_chip	chip;
	void __iomem		*regbase;	/* Base of group register*/
	spinlock_t 		gpio_lock;
};

static int nuc900_gpio_get(struct gpio_chip *chip, unsigned offset)
{
	struct nuc900_gpio_chip *nuc900_gpio = gpiochip_get_data(chip);
	void __iomem *pio = nuc900_gpio->regbase + GPIO_IN;
	unsigned int regval;

	regval = __raw_readl(pio);
	regval &= GPIO_GPIO(offset);

	return (regval != 0);
}

static void nuc900_gpio_set(struct gpio_chip *chip, unsigned offset, int val)
{
	struct nuc900_gpio_chip *nuc900_gpio = gpiochip_get_data(chip);
	void __iomem *pio = nuc900_gpio->regbase + GPIO_OUT;
	unsigned int regval;
	unsigned long flags;

	spin_lock_irqsave(&nuc900_gpio->gpio_lock, flags);

	regval = __raw_readl(pio);

	if (val)
		regval |= GPIO_GPIO(offset);
	else
		regval &= ~GPIO_GPIO(offset);

	__raw_writel(regval, pio);

	spin_unlock_irqrestore(&nuc900_gpio->gpio_lock, flags);
}

static int nuc900_dir_input(struct gpio_chip *chip, unsigned offset)
{
	struct nuc900_gpio_chip *nuc900_gpio = gpiochip_get_data(chip);
	void __iomem *pio = nuc900_gpio->regbase + GPIO_DIR;
	unsigned int regval;
	unsigned long flags;

	spin_lock_irqsave(&nuc900_gpio->gpio_lock, flags);

	regval = __raw_readl(pio);
	regval &= ~GPIO_GPIO(offset);
	__raw_writel(regval, pio);

	spin_unlock_irqrestore(&nuc900_gpio->gpio_lock, flags);

	return 0;
}

static int nuc900_dir_output(struct gpio_chip *chip, unsigned offset, int val)
{
	struct nuc900_gpio_chip *nuc900_gpio = gpiochip_get_data(chip);
	void __iomem *outreg = nuc900_gpio->regbase + GPIO_OUT;
	void __iomem *pio = nuc900_gpio->regbase + GPIO_DIR;
	unsigned int regval;
	unsigned long flags;

	spin_lock_irqsave(&nuc900_gpio->gpio_lock, flags);

	regval = __raw_readl(pio);
	regval |= GPIO_GPIO(offset);
	__raw_writel(regval, pio);

	regval = __raw_readl(outreg);

	if (val)
		regval |= GPIO_GPIO(offset);
	else
		regval &= ~GPIO_GPIO(offset);

	__raw_writel(regval, outreg);

	spin_unlock_irqrestore(&nuc900_gpio->gpio_lock, flags);

	return 0;
}

static struct nuc900_gpio_chip nuc900_gpio[] = {
	NUC900_GPIO_CHIP("GROUPC", 0, 16),
	NUC900_GPIO_CHIP("GROUPD", 16, 10),
	NUC900_GPIO_CHIP("GROUPE", 26, 14),
	NUC900_GPIO_CHIP("GROUPF", 40, 10),
	NUC900_GPIO_CHIP("GROUPG", 50, 17),
	NUC900_GPIO_CHIP("GROUPH", 67, 8),
	NUC900_GPIO_CHIP("GROUPI", 75, 17),
};

void __init nuc900_init_gpio(int nr_group)
{
	unsigned	i;
	struct nuc900_gpio_chip *gpio_chip;

	for (i = 0; i < nr_group; i++) {
		gpio_chip = &nuc900_gpio[i];
		spin_lock_init(&gpio_chip->gpio_lock);
		gpio_chip->regbase = GPIO_BASE + i * GROUPINERV;
		gpiochip_add_data(&gpio_chip->chip, gpio_chip);
	}
}
Commit	Line	Data
c52d3d68	1	/*
35c9221a	2	* linux/arch/arm/mach-w90x900/gpio.c
c52d3d68	3	*
35c9221a	4	* Generic nuc900 GPIO handling
c52d3d68	5	*
	6	* Wan ZongShun <mcuos.com@gmail.com>
	7	*
	8	* This program is free software; you can redistribute it and/or modify
	9	* it under the terms of the GNU General Public License version 2 as
	10	* published by the Free Software Foundation.
	11	*/
	12
	13	#include <linux/clk.h>
	14	#include <linux/errno.h>
	15	#include <linux/interrupt.h>
	16	#include <linux/irq.h>
	17	#include <linux/debugfs.h>
	18	#include <linux/seq_file.h>
	19	#include <linux/kernel.h>
	20	#include <linux/list.h>
	21	#include <linux/module.h>
	22	#include <linux/io.h>
c788aab7	23	#include <linux/gpio/driver.h>
c52d3d68	24
	25	#include <mach/hardware.h>
	26
	27	#define GPIO_BASE (W90X900_VA_GPIO)
	28	#define GPIO_DIR (0x04)
	29	#define GPIO_OUT (0x08)
	30	#define GPIO_IN (0x0C)
	31	#define GROUPINERV (0x10)
	32	#define GPIO_GPIO(Nb) (0x00000001 << (Nb))
c52d3d68	33
35c9221a	34	#define NUC900_GPIO_CHIP(name, base_gpio, nr_gpio) \
c52d3d68	35	{ \
	36	.chip = { \
	37	.label = name, \
35c9221a	38	.direction_input = nuc900_dir_input, \
	39	.direction_output = nuc900_dir_output, \
	40	.get = nuc900_gpio_get, \
	41	.set = nuc900_gpio_set, \
c52d3d68	42	.base = base_gpio, \
	43	.ngpio = nr_gpio, \
	44	} \
	45	}
	46
35c9221a	47	struct nuc900_gpio_chip {
c52d3d68	48	struct gpio_chip chip;
	49	void __iomem regbase; / Base of group register*/
	50	spinlock_t gpio_lock;
	51	};
	52
35c9221a	53	static int nuc900_gpio_get(struct gpio_chip *chip, unsigned offset)
c52d3d68	54	{
c788aab7	55	struct nuc900_gpio_chip *nuc900_gpio = gpiochip_get_data(chip);
35c9221a	56	void __iomem *pio = nuc900_gpio->regbase + GPIO_IN;
c52d3d68	57	unsigned int regval;
	58
	59	regval = __raw_readl(pio);
	60	regval &= GPIO_GPIO(offset);
	61
	62	return (regval != 0);
	63	}
	64
35c9221a	65	static void nuc900_gpio_set(struct gpio_chip *chip, unsigned offset, int val)
c52d3d68	66	{
c788aab7	67	struct nuc900_gpio_chip *nuc900_gpio = gpiochip_get_data(chip);
35c9221a	68	void __iomem *pio = nuc900_gpio->regbase + GPIO_OUT;
c52d3d68	69	unsigned int regval;
	70	unsigned long flags;
	71
35c9221a	72	spin_lock_irqsave(&nuc900_gpio->gpio_lock, flags);
c52d3d68	73
	74	regval = __raw_readl(pio);
	75
	76	if (val)
	77	regval \|= GPIO_GPIO(offset);
	78	else
	79	regval &= ~GPIO_GPIO(offset);
	80
	81	__raw_writel(regval, pio);
	82
35c9221a	83	spin_unlock_irqrestore(&nuc900_gpio->gpio_lock, flags);
c52d3d68	84	}
c52d3d68	85
35c9221a	86	static int nuc900_dir_input(struct gpio_chip *chip, unsigned offset)
c52d3d68	87	{
c788aab7	88	struct nuc900_gpio_chip *nuc900_gpio = gpiochip_get_data(chip);
35c9221a	89	void __iomem *pio = nuc900_gpio->regbase + GPIO_DIR;
c52d3d68	90	unsigned int regval;
	91	unsigned long flags;
	92
35c9221a	93	spin_lock_irqsave(&nuc900_gpio->gpio_lock, flags);
c52d3d68	94
	95	regval = __raw_readl(pio);
	96	regval &= ~GPIO_GPIO(offset);
	97	__raw_writel(regval, pio);
	98
35c9221a	99	spin_unlock_irqrestore(&nuc900_gpio->gpio_lock, flags);
c52d3d68	100
	101	return 0;
	102	}
	103
35c9221a	104	static int nuc900_dir_output(struct gpio_chip *chip, unsigned offset, int val)
c52d3d68	105	{
c788aab7	106	struct nuc900_gpio_chip *nuc900_gpio = gpiochip_get_data(chip);
35c9221a	107	void __iomem *outreg = nuc900_gpio->regbase + GPIO_OUT;
35c9221a	108	void __iomem *pio = nuc900_gpio->regbase + GPIO_DIR;
c52d3d68	109	unsigned int regval;
	110	unsigned long flags;
	111
35c9221a	112	spin_lock_irqsave(&nuc900_gpio->gpio_lock, flags);
c52d3d68	113
	114	regval = __raw_readl(pio);
	115	regval \|= GPIO_GPIO(offset);
	116	__raw_writel(regval, pio);
	117
	118	regval = __raw_readl(outreg);
	119
	120	if (val)
	121	regval \|= GPIO_GPIO(offset);
	122	else
	123	regval &= ~GPIO_GPIO(offset);
	124
	125	__raw_writel(regval, outreg);
	126
35c9221a	127	spin_unlock_irqrestore(&nuc900_gpio->gpio_lock, flags);
c52d3d68	128
	129	return 0;
	130	}
	131
35c9221a	132	static struct nuc900_gpio_chip nuc900_gpio[] = {
	133	NUC900_GPIO_CHIP("GROUPC", 0, 16),
	134	NUC900_GPIO_CHIP("GROUPD", 16, 10),
	135	NUC900_GPIO_CHIP("GROUPE", 26, 14),
	136	NUC900_GPIO_CHIP("GROUPF", 40, 10),
	137	NUC900_GPIO_CHIP("GROUPG", 50, 17),
	138	NUC900_GPIO_CHIP("GROUPH", 67, 8),
	139	NUC900_GPIO_CHIP("GROUPI", 75, 17),
c52d3d68	140	};
c52d3d68	141
35c9221a	142	void __init nuc900_init_gpio(int nr_group)
c52d3d68	143	{
c52d3d68	144	unsigned i;
35c9221a	145	struct nuc900_gpio_chip *gpio_chip;
c52d3d68	146
c52d3d68	147	for (i = 0; i < nr_group; i++) {
35c9221a	148	gpio_chip = &nuc900_gpio[i];
c52d3d68	149	spin_lock_init(&gpio_chip->gpio_lock);
c52d3d68	150	gpio_chip->regbase = GPIO_BASE + i * GROUPINERV;
c788aab7	151	gpiochip_add_data(&gpio_chip->chip, gpio_chip);
c52d3d68	152	}
c52d3d68	153	}